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IPADand (Application Specific Devices) Flip-Chip: Package description recommendations
This document provides package usage recomendation information pitch Flip-Chips. information FlipChips, Application note AN2348. competitive market portable equipment, notably mobile phone market, driven challenging development highly integrated products. allow manufacturers portable equipment reduce dimension their products, STMicroelectronics developed packages with reduced size, thickness weight form Flip-Chip. electrical performance such components FlipChips improved thanks shorter connections than ones standard plastic packages (such TSSOP, SSOP BGA).
Flip-Chip package family been designed fulfil same quality levels same reliability performances standard semiconductor plastic packages. This means these Flip-Chip packages should considered surface mount devices which will assembled printed circuit board (PCB) without special additionnal process steps required. particular this package does require extra underfill increase reliability performances protect device. This package compatible with existing pick place equipment board mounting. Only leadfree, RoHS compliant FlipChips available mass production. This application note addresses following topics:
Product description Mechanical description Packing specifications labelling description Recommended storage shipping instructions Soldering assembly recommendations User responsability returns Changes Delivery quantity Quality
October 2006
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www.st.com
Product description
AN1235
Product description
Flip-Chips manufactured with wafer level process that STMicroelectronics developed attaching solder bumps I/Os pads active wafer side, thus allowing bumped dice produced. contact layout either matrix shape periphery. redistribution layer used. This allows parasitic inductances coming from redistribution metal tracks minimized. near eutectic 95.5Sn 0.5Cu leadfree bumps make this package compatible with standard reflow processes. bumps' dimension (310 bump diameter) allows pick place process compatible with existing equipment particular with equipment used Ball Grid Array packages) makes also compatible with design rules used standard ICs. Optional coating flat side package available. These components delivered tape reel packing with bumps turned down (placed bottom carrier tape cavity). other face component flat allows picking standard packages. Devices 100% electrically tested before packing. product references marked flat side device.
Mechanical description
Mechanical dimensions Flip-Chips provided through product example Figure Bumps leaded leadfree. Leadfree bumps 95.5Sn 0.5Cu alloy with near eutectic melting point 221° size bump count adapted connection requirements. Figure Mechanical dimensions bump matrix array (sample).
2.42
Optional coating
2.42
Note:
package height 0.65 (0.695 optionally coated packages) valid thickness 0.40 With thickness 0.64 total height 0.89
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AN1235
Packing specifications labelling description Flip-Chip tolerance bump diameter bump height very narrow. This constant bump shape insures good coplanarity between bumps. Optical measurements performed through vertical focuses show bump plus coplanarity below 80µm. product marking flat side shown Figure (product example). Flip-Chip marker (see illustration page both flat side bump side that orientation component easily determined before after assembly. dots marked flat side bump side have been designed that they detected standard vision systems. Marking dimensions linked size. Figure Flip-Chip marking example bump matrix array.
Dot, logo marking manufacturing location datecode year week) When very small sizes leave insufficient space, logo ECOPACK symbol omitted from marking.
Packing specifications labelling description
Flip-Chip products delivered tape reel fully compatible with standard high volume components. features tape reel materials accordance with EIA-481-C 60286-3 standards (783). features specified this section accordance with EIA-481-C, 60286-3 (783) standards.
Carrier tape
Flip-Chips placed carrier tape with their bump side facing bottom cavity that components picked-up their flat side. flipping package necessary mounting PCB. products positioned carrier tape with sprocket hole side. Carrier tape mechanical dimensions shown example Figure Standard tape width sizes smaller than (dimension B0).
Note:
carrier tape width used larger size line with standards.
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Packing specifications labelling description Figure Tape dimensions Flip-Chips (650 thickness).
identifying location*
AN1235
1.75
0.73 0.05
dimensions
bump location varying with product layout
User direction unreeling
Table
Dimension
Tape cavity sizing
with both sides smaller than equal side size with side larger than Cavity dimensions established ensure that component rotation cannot exceed max.
cavities carrier tape have been designed avoid damage components. hole present cavity order avoid impact external contamination solder bumps. embossed carrier tape black conductive material (surface resistivity within 10E4 10E8 ohm/sq). this material protects component against damage from electrostatic discharge ensures total discharge component prior placement PCB. Conductivity guaranteed constant affected shelf life humidity. material will break when bent does have residue off, powder, flake.
Cover tape
carrier tape sealed with transparent, antistatic (surface resistivity within 10E5 ohm/sq 10E12 ohm/sq) polyester film cover tape with heat activated adhesive. cover tape tensile strength higher than peeling force cover tape between accordance with testing method EIA-481-C 60286-3. Cover tape peeled back direction opposite carrier tape travel; angle between cover tape carrier tape between degrees test done speed mm/minute.
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AN1235
Packing specifications labelling description
Reels
sealed carrier tape with Flip-Chip reeled inch reels (see Figure reel mechanical dimensions). These reels compliant with EIA-481-C standard. particular, they made antistatic polystyrene material. Color reel vary delending supplier. Dice quantity reel 5000 (with typical package thickness equal µm). compliance with 60286-3, each reel contains maximum 0.1% empty cavities. successive empty cavities allowed. Each reel contain components coming from different wafer lots. Each reel minimum leader minimum trailer (compliant with 481-C 60286-3 standards). leader makes portion carrier tape with empty cavities sealed cover tape beginning reel (external side). leader affixed last turn carrier tape using adhesive tape. trailer reel consists empty, sealed cavities. Figure reel mechanical dimensions.
(external)
+2.5 -0.5
Material: ANTISTATIC POLYSTYRENE
+0.5 -0.2
20.2
(Hub)
+1.5
14.4
dimensions
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Packing specifications labelling description
AN1235
Final packing
Each reel heat sealed under inert atmosphere transparent, recyclable antistatic polyethylene (minimum mils material thickness). Reels then packed cardboard boxes. complete description packing shown Figure Figure Packing flow chart.
dice into reel
Reel sealed plastic within inert atmosphere reel packed cardbox storage shipment
Labelling
ensure components' traceability, labels stuck reels cardboard box. seven inch reels cardboard identified labels including part number, shipped quantity traceability references (Figure 6.). traceability ensured each production each shipment through labeling. trace code number printed labels ensures backward traceability from received customer each step process: dates quantity diffusion, assembly, test final store. Likewise, forward traceability able trace history from wafer customer's location. Figure Example reel label.
Assembled Moisture sensitivity level Perforation line First type line commercial product Second type line finished goods Bulk quantity Trace code line Trace code line Marking Bulk number
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AN1235
Recommended storage, shipping instructions descriptions
Recommended storage, shipping instructions descriptions
Flip-Chip reels packed under inert atmosphere sealed bag. shipment handling, reels packed cardboard box. STMicroelectronics thus recommends following shipping storage conditions
relative humidity between temperature range from -55° +150°
Components opened sealed stored months after shipment. Components tape reel must protected from exposure direct sunlight. Moisture sensitivity level (MSL JEDEC J-STD-020C) applicable Flip-Chip devices since there plastic encapsulation risk moisture absorption related possible package cracks.
Soldering assembly recommendations
design recommendations
optimum electrical performance highly reliable solder joints, STMicroelectronics recommends design guidelines listed Table Table design recommendations.
Solder Mask Defined Micro under bump allowed (circular) recommended (for diameter pad) (2-6 (0.2 max)
design size Solder mask opening finishing
optimize natural self centering effect Flip-Chips PCB, positioning size have properly designed. Note: thick gold layer finishing recommended (low joint reliability).
Micro vias
alternative routing surface route burried layers. achive this, pads connected lower layers using micro vias.
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Soldering assembly recommendations
AN1235
assembly guidelines
Flip-Chip mounting PCB, STMicroelectronics recommends solder stencil aperture µm2maximum typical stencil thickness FlipChips fully compatible with near eutectic 95.5Sn 0.5Cu solder paste with no-clean flux. ST's recommendations Flip-Chip board mounting illustrated soldering reflow profile shown Figure Figure Ecopack® recommended soldering reflow profile Flip-Chip mounting PCB.
Temperature (°C)
260°C 255°C 220°C 180°C
2°C/s recommended 2°C/s recommended 6°C/s 6°C/s
3°C/s 3°C/s
10-30
Time (min)
Dwell time soldering zone (with temperature higher than 220° kept short possible prevent component substrate damages. Peak temperature must exceed 260° Controlled atmosphere N2H2) recommended during whole reflow, specially above 150° Flip-Chips able withstand three times previous recommended reflow profile order compatible with double reflow when SMDs mounted both sides plus additional repair. maximum three soldering reflows allowed these leadfree packages (with repair step included). no-clean flux highly recommended avoid cleaning operation. prevent bump cracks, ultrasonic cleaning methods recommended.
Underfilling
Underfilling needed Flip-Chips devices withstand dispense underfill process temperature does exceed 175° process time short (typically minutes).
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AN1235
Soldering assembly recommendations
Manual rework
Flip-Chips able tolerate repair addition reflows mentionned Section 5.2. other type packages, laser systems most suitable form FlipChip repair. Manual soldering acceptable iron soldering recommended. leaded Flip-Chip manual rework, maximum temperature allowed 260° (leadfree compatibility) dwell time must exceed seconds. leadfree Flip-Chip manual rework, maximum temperature allowed 260° typical soldering profile Figure used.
5.4.1
Rework procedure
Remove device
Rework process start with removal device. remove device, heat must applied melt solder joints that component lifted from board. Large area bottom side preheaters used raise temperature board. This help minimize warpage board, minimize amount heat that must applied component. heating applied component using laser convective nozzle. Nozzle size must selected match component footprint appropriately. After heating melted solder, vacuum applied through pick-up nozzle, component lifted from board. heat should carefully directed component removed avoid adjacent components solder joints being reflowed. Shielding, control flow from nozzle, accurate temperature control parameters.
Removing solder
Next step cleaning solder from worksite. space constraints need accurate temperature control, automatic tools recommended. Typically, site cleaners consist controlled non-contact heating vacuuming tools. objective remove residual solder from site without damaging pads, solder masks adjacent components, prepare site application component.
device soldering
placement device several solutions possible
mini-stencil solder paste then place device. This preferred solution ensure homogeneity assembly conditions assembly WLCSP (Wafer Level Chip Scale Package) performed with solder paste, even small footprints tight dimensions make this operation difficult. noclean flux site place device. WLCSP noclean flux, place board.
Next operation reflow solder joint applying controlled heat component. This done much same described above component removal, accurate temperature control necessary ensure good soldering joint.
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Soldering assembly recommendations
AN1235
Alternatively this done putting whole board furnace. Figure reflow profile recommendations.
Equipment
Systems these operations available various levels automation. Methods techniques used more sophisticated automatic systems copied using manual equipment. Soldering iron should avoided these operations. Tweezers picking tools pressuring sides bottom (bump side) WLCSP must avoided since such tools damage silicon create chip outs. Figure shows example semi-automatic equipment component rework. (See site Comintec more information.) Figure Comintec ONYX32 Semi-automatic equipment component rework
ONYX32 Features
Fully automated X,Y,Z theta control Fully automated alignment using digital feature separation (DFS) technology Precision force sensor mass flow controller Four zone bottom preheater Flux dipping station FireWire (IEEE 1394) controls Visual machinesT software Machine table including power supply cabinet
ONYX32 Options
Dispensing head solder paste, flux, underfill adhesives Non-contact temperature sensor Site solder removal system
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AN1235
Changes
Changes
STMicroelectronics reserves right implement minor changes geometry manufacturing processes without prior notice. Such changes will affect electrical characteristics die, layout maximum size. However confirmed orders, variation will made without customer's approval.
Quality
Electrical inspection
Products Flip-Chip 100% electrically probed according critical parameters product specification. last operation before packing 100% electrical testing. other parameters guaranteed technology, design rules continuous monitoring systems.
Visual inspection
visual control performed manufacturing lots according MIL-STD-883 method 2010.
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Conclusion
AN1235
Conclusion
Leadfree Flip-Chip packages have been developped STMicroelectronics electronic applications where integration performance main concerns designers. STMicroelectronics Flip-Chips offer:
Remarkable board space saving (package size equal size total height less than Enhanced electrical performance (minimized parasitic inductance very short electrical paths absence redistribution layer) High reliability integration whole function traditionally based discrete interconnected components.
Flip-Chips delivered tape reel fully compatible with other high volume components (standard plastic packages CSP/BGA packages) regarding existing pick place equipment, standard solder reflow assembly equipment standard techniques.
Revision history
Date June-2002 January-2004 25-May-2004 15-Sep-2006 15-Oct-2006 Revision First issue Lead free information added Mechanical description notes updated page Reformatted current standard. Added section 5.4.1 Rework procedure. Description Changes
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AN1235
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