Half-bridge gate driver High voltage rail dV/dt immunity V/nsec f
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L6393
Half-bridge gate driver
High voltage rail dV/dt immunity V/nsec full temperature range Driver current capability: source, sink Switching times 75/35 nsec rise/fall with load CMOS/TTL inputs comparators with hysteresys Integrated bootstrap diode Uncommitted comparator Adjustable dead-time Compact simplified layout Bill material reduction Flexible, easy fast design
SO-14
DIP-14
Description
L6393 high-voltage device manufactured with "OFF-LINE" technology. monolithic half-bridge gate driver N-channel Power MOSFET IGBT. high side (floating) section designed stand voltage rail logic inputs CMOS/TTL compatible down easy interfacing µC/DSP. embeds uncommited comparator available protections against over-current, over-temperature, etc.
Application
Motor driver home appliances, factory automation, industrial drives fans. ballasts, power supply units.
Table
Device summary
Order codes L6393 L6393D L6393D013TR Package DIP-14 SO-14 SO-14 Packaging Tube Tube Tape reel
March 2008
1/20
www.st.com
This preliminary information product development undergoing evaluation. Details subject change without notice.
Contents
L6393
Contents
Block diagram connection
description
Truth table Electrical data
Absolute maximum ratings Thermal data Recommended operating conditions
Electrical characteristics
operation operation
Waveforms definition Typical application diagram Bootstrap driver
CBOOT selection charging
Package mechanical data Revision history
2/20
L6393
Block diagram
Block diagram
Figure
DETECTION
Block diagram
BOOTSTRAPDRIVER FLOATINGSTRUCTURE
BOOT
from
DETECTION DRIVER
PHASE
LEVEL SHIFTER
LOGIC BRAKE SHOOT THROUGH PREVENTION DRIVER
CPOUT
COMPARATOR
DEAD TIME
3/20
connection
L6393
connection
Figure connection (top view)
PHASE BRAKE CPOUT BOOT
description
Table
description
name PHASE
Type
Function Driver logic input (active high) Shut down input (active low) Driver logic input (active low) Lower section supply voltage Dead time setting Comparator output (open drain) Ground Comparator negative input Comparator positive input side driver output connected
BRAKE CPOUT CPCP+
High side (floating) common voltage High side driver output Bootstrapped supply voltage
BOOT
circuit guarantees less than pins Isink mA), with This allows omitting "bleeder" resistor connected between gate source external MOSFET normally used hold low; gate driver assures impedance also condition.
4/20
L6393
Truth table
Truth table
Table Truth table
INPUTS PHASE BRAKE OUTPUTS
Note:
don't care L6393 input signals PHASE BRAKE into logic port resulting signal phase with high side output opposition phase with side output LVG. This means that BRAKE kept high level, PHASE signal drives half-bridge phase with output opposition phase with output. BRAKE level side output always high side output always OFF, whatever PHASE signal. This kind logic interface provides possibility control power stages using PHASE signal select current direction bridge BRAKE signal perform current slow decay sides. From point view logic operations signals PHASE BRAKE completely equivalent, that means signals exchanged without change behavior resulting output signals (see Block Diagram Fig.1). Note: dead time between turn power switch turn other power switch defined resistor connected between ground.
5/20
Electrical data
L6393
Electrical data
Absolute maximum ratings
Table
Symbol Vout VcpVcp+ Vboot Vhvg VIvg Vcpout
Absolute maximum rating
Parameter Output voltage Supply voltage Comparator negative input voltage Comparator positive input voltage Floating supply voltage High side gate output voltage output voltage High side gate output voltage output voltage Logic input voltage Open drain voltage Value Vboot Vboot -0.3 -0.3 Vout Vboot -0.3 +0.3 -0.3 -0.3 Unit V/ns
dVout/dt Allowed output slew rate Ptot Tstg Total power dissipation Junction temperature Storage temperature
Note:
immunity pins guaranteed (Human Body Model)
Thermal data
Table
Symbol Rth(JA)
Thermal data
Parameter Thermal resistance junction ambient max. SO-14 DIP-14 Unit °C/W
6/20
L6393
Electrical data
Recommended operating conditions
Table Recommended operating conditions
Parameter
Symbol Vout
Test condition
Unit
Output voltage
Floating supply voltage Switching frequency Supply Voltage Junction Temperature HVG, load
condition Vboot Vout Vboot guaranteed, Vout range from Vboot -Vout
7/20
Electrical characteristics
L6393
Table
Symbol
Electrical characteristics
operation
operation electrical characteristics (VCC
Parameter Test condition Unit
operation toff High/low side driver turnon propagation delay High/low side driver turnoff propagation delay
Shut down high/low side propagation delay Delay matching, turn-ON/OFF
Vout Vboot Figure page
k;CL nF;CDT k;CL nF;CDT k;CL nF;CDT 1000 1000 0.15
Dead time setting range
Matching dead time
Rise time Fall time
8/20
L6393 Figure Timing
Logic Input
(PHASE BRAKE)
Electrical characteristics
toff
Logic Input
(PHASE BRAKE)
toff
LVG/HVG
toff
9/20
Electrical characteristics
L6393
Table
Symbol
operation
opereation electrical characteristics (VCC
Parameter Test condition Unit
supply voltage section Vcc_hys Vcc_thON Vcc_thOFF hysteresis Turn threshold Turn threshold PHASE BRAKE GND; GND; PHASE BRAKE GND; GND; 1500
Iqccu
Undervoltage quiescent supply current
Iqcc
Quiescent current
1000
Bootstrapped supply voltage section VBS_hys VBS_thON VBS_thOFF hysteresis turn Threshold turn Threshold PHASE BRAKE GND; PHASE BRAKE GND; Vhvg Vout Vboot 1000
IQBSU
Undervoltage Vboot quiescent current
IQBS
Vboot quiescent current
Rdson
High voltage leakage current Bootstrap driver resistance
10/20
L6393 Table
Symbol
Electrical characteristics opereation electrical characteristics (VCC (continued)
Parameter Test condition Unit
Driving buffers section Logic inputs IPHASEh IPHASEl IBRAKEh IBRAKEl ISDh ISDl logic input bias current BRAKE logic input bias BRAKE current logic input bias current PHASE logic input bias PHASE current BRAKE logic input bias BRAKE current High level logic threshold voltage PHASE logic input bias PHASE current 2.21 level logic threshold voltage 0.83 High/low side sink short circuit current High/low side source short circuit current
RDSon tested following way: RDSon [(VCC VCBOOT1) (VCC VCBOOT2)] [I1(VCC,VCBOOT1) I2(VCC,VCBOOT2)] where current when VCBOOT VCBOOT1, when VCBOOT VCBOOT2.
Table
Symbol td_comp
Sense comparator
Input bias current Open drain level Output voltage Comparator delay Slew rate CPOUT pulled through 100k resistor Parameter Input offset voltage Test conditions Unit V/µs
11/20
Waveforms definition
L6393
Figure
PHASE BRAKE
Waveforms definition
Dead time waveform definition
12/20
L6393
Typical application diagram
Figure
Typical application diagram
Application diagram
BOOTSTRAP DRIVER FLOATING STRUCTURE BOOT
DETECTION
from
DETECTION DRIVER
H.V.
Cboot
PHASE
LEVEL SHIFTER
LOGIC BRAKE SHOOT THROUGH PREVENTION CPOUT COMPARATOR CPLVG DRIVER
LOAD
DEAD TIME
13/20
Bootstrap driver
L6393
Bootstrap driver
bootstrap circuitry needed supply high voltage section. This function normally accomplished high voltage fast recovery diode (Figure 6.a). L6393 patented integrated structure replaces external diode. realized high voltage DMOS, driven synchronously with side driver (LVG), with diode series, shown Figure 6.b. internal charge pump (Figure 6.b) provides DMOS driving voltage. diode connected series DMOS been added avoid undesirable turn
CBOOT selection charging
choose proper CBOOT value external seen equivalent capacitor. This capacitor CEXT related total gate charge:
gate gate
ratio between capacitors CEXT CBOOT proportional cyclical voltage loss.
CBOOT CEXT e.g.: Qgate 30nC Vgate CEXT With CBOOT drop would supplied long time, CBOOT selection take into account also leakage quiescent losses. e.g.: steady state consumption lower than CBOOT supply CEXT. This charge capacitor means voltage drop internal bootstrap driver gives great advantage: external fast recovery diode avoided usually great leakage current). This structure work only VOUT close lower) meanwhile charging time (Tcharge CBOOT time which both conditions fulfilled long enough charge capacitor. bootstrap driver introduces voltage drop DMOS RDSon (typical value: frequency this drop neglected. Anyway increasing frequency must taken account. following equation useful compute drop bootstrap DMOS:
gate drop dson drop dson
14/20
L6393
Bootstrap driver where Qgate gate charge external power MOS, RDSon resistance bootstrap DMOS, Tcharge charging time bootstrap capacitor. example: using power with total gate charge drop bootstrap DMOS about Tcharge fact:
30nC drop 0.7V
Vdrop taken into account when voltage drop CBOOT calculated: this drop high, circuit topology doesn't allow sufficient charging time, external diode used. Figure Bootstrap driver
DBOOT
BOOT H.V.
BOOT H.V.
CBOOT VOUT LOAD
CBOOT VOUT LOAD
D99IN1067
15/20
Package mechanical data
L6393
Package mechanical data
order meet environmental requirements, offers these devices ECOPACK® packages. These packages have Lead-free second level interconnect category second level interconnect marked package inner label, compliance with JEDEC Standard JESD97. maximum ratings related soldering conditions also marked inner label. ECOPACK trademark. ECOPACK specifications available www.st.com
16/20
L6393 Figure
DIM. MIN. 1.27 2.54 0.050 2.54 15.24 0.130 0.51 1.39 0.25 0.335 0.100 0.600 0.280 0.201 1.65
Package mechanical data DIP-14 mechanical data package dimensions
TYP. MAX. MIN. 0.020 0.055 0.020 0.010 0.787 0.065 inch TYP. MAX.
OUTLINE MECHANICAL DATA
DIP-14
0.100
17/20
Package mechanical data Figure SO-14 mechanical data package dimensions
DIM. MIN.
L6393
inch MAX. 1.75 0.30 1.65 0.51 0.25 8.75 MIN. 0.053 0.004 0.043 0.013 0.007 0.337 0.150 0.050 6.20 0.50 1.27 0.228 0.01 0.016 0.244 0.02 0.050 TYP. MAX. 0.069 0.012 0.065 0.020 0.01 0.344 0.157
TYP.
OUTLINE MECHANICAL DATA
1.35 0.10 1.10 0.33 0.19 8.55 3.80 1.27 0.25 0.40
(min.), (max.) 0.10 0.004
dimension does include mold flash, protusions gate burrs. Mold flash, protusions gate burrs shall exceed 0.15mm side.
SO-14
0016019
18/20
L6393
Revision history
Revision history
Table
Date 03-Mar-2008 18-Mar-2008
Document revision history
Revision Initial release Cover page updated Changes
19/20
L6393
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