High-voltage high side driver High voltage rail dV/dt immunity V/
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L6390
High-voltage high side driver
High voltage rail dV/dt immunity V/nsec full temperature range Driver current capability: source, sink Switching times 75/35 nsec rise/fall with load TTL/CMOS inputs with hysteresis Integrated bootstrap diode Operational amplifier advanced current sensing Comparator fault protections Smart shut down function Adjustable dead-time Interlocking function Compact simplified layout Bill material reduction Effective fault protection Flexible, easy fast design
SO-16
DIP-16
Description
L6390 high-voltage device manufactured with "OFF-LINE" technology. monolithic half-bridge gate driver N-channel Power MOSFET IGBT. high side (floating) section designed stand voltage rail logic inputs CMOS/TTL compatible down easy interfacing microcontroller/DSP. embeds operational amplifier suitable advanced current sensing applications such field oriented motor control. integrated comparator available protections against over-current, over-temperature, etc.
Applications
Motor driver home appliances, factory automation, industrial drives. ballasts, power supply units.
Table
Device summary
Order codes L6390 L6390D L6390D013TR Package DIP-16 SO-16 SO-16 Packaging Tube Tube Tape reel
July 2008
1/22
www.st.com
Contents
L6390
Contents
Block diagram connection Truth table Electrical data
Absolute maximum ratings Thermal data Recommended operating conditions
Electrical characteristics
operation operation
Waveforms definitions Smart shut down function Typical application diagram Bootstrap driver
CBOOT selection charging
Package mecanichal data Revision history
2/22
L6390
Block diagram
Block diagram
Figure Block diagram
BOOTSTRAP DRIVER from DETECTION FLOATING STRUCTURE BOOT
DETECTION DRIVER LEVEL SHIFTER
LOGIC SHOOT THROUGH PREVENTION
DRIVER COMPARATOR VREF
SD/OD
SMART
LATCH
DEAD TIME OPAMP
OPOUT
3/22
connection
L6390
connection
Figure connection (top view)
SD/OD OPOPOUT BOOT
Table
description
name SD/OD OPOPOUT
Type
Function side driver logic input (active low) Shut down logic input (active low)/open drain (comparator output) High side driver logic input (active high) Lower section supply voltage Dead time setting Opamp inverting input Opamp output Ground Opamp inverting input Comparator input side driver output connected
High side (Floating) common voltage High side driver output Bootstrap supply voltage
BOOT
circuit provides less than pins Isink mA), with This allows omitting "bleeder" resistor connected between gate source external MOSFET normally used hold low; gate driver assures impedance also condition.
4/22
L6390
Truth table
Truth table
Table Truth table
Input Output
Note:
don't care
5/22
Electrical data
L6390
Electrical data
Absolute maximum ratings
Table
Symbol Vout Vboot Vhvg Vlvg Vop+ VopVcp+ dVout/dt Ptot Tstg Supply voltage Output voltage Bootstrap voltage High side gate output voltage side gate output voltage OPAMP non-inverting input OPAMP inverting input Comparator input voltage Logic input voltage Open drain voltage Allowed output slew rate Total power dissipation Junction temperature Storage temperature
Absolute maximum rating
Value Parameter Vboot Vout Vboot Vboot V/ns Unit
Thermal data
Table
Symbol Rth(JA)
Thermal data
Parameter Thermal resistance junction ambient SO-16 DIP-16 Unit °C/W
6/22
L6390
Electrical data
Recommended operating conditions
Table
Symbol
Recommended operating conditions
16-14 Parameter Supply voltage Floating supply voltage output voltage Switching frequency Junction temperature HVG, load Test condition 12.5 12.4
Unit
Vout
Vboot Vout off. Vcc=12.5 Logic operational Vboot Refer AN2378 more details
7/22
Electrical characteristics
L6390
Electrical characteristics
operation
Table
Symbol toff
operation electrical characteristics (VCC
Parameter Test condition Unit
High/low side driver turn1 propagation delay Vout High/low side driver turn- Vboot propagation delay Shut down high/low Figure side driver propagation delay Comparator triggering Measured applying high/low side driver turn- voltage step from propagation delay CP+. Delay matching, turn-on/off 0.48 1.35
tisd
0.18 0.25 0.72 1.85
Dead time setting range
Matching dead time
Rise time Fall time
8/22
L6390 Figure Timing
Electrical characteristics
toff
toff
LVG/HVG
toff
9/22
Electrical characteristics
L6390
Table
Symbol
operation
operation electrical characteristics (VCC
Parameter Test condition Unit
supply voltage section Vcc_hys Vcc_thON Vcc_thOFF hysteresis turn threshold turn threshold GND; CP+=OP+=GND; OP-=5 GND; CP+=OP+=GND; OP-=5 1200 11.5 1500 10.5 1800 12.5
Iqccu
Undervoltage quiescent supply current
Iqcc
Quiescent current
1000
Vref
Internal reference voltage
Bootstrapped supply voltage section VBO_hys VBO_thON VBO_thOFF hysteresis
1200 10.6
1500 11.5
1800 12.4 10.9
turn threshold turn threshold Undervoltage quiescent current CP+=OP+=GND; OP-=5 CP+=OP+=GND; OP-=5
IQBOU
IQBO
quiescent current
RDS(on)
High voltage leakage current Vhvg Vout Vboot Bootstrap driver resistance
Driving buffers section High/low side source short circuit current High/low side sink short circuit current (tp<10 (tp<10
10/22
L6390 Table
Symbol Logic inputs IHINh IHINl ILINl ILINh ISDh ISDl
Vboot Vout RDSON tested following way: RDSON [(VCC VCBOOT1) (VCC VCBOOT2)] [I1(VCC,VCBOOT1) I2(VCC,VCBOOT2)] where current when VCBOOT VCBOOT1, when VCBOOT VCBOOT2.
Electrical characteristics operation electrical characteristics (VCC (continued)
Parameter Test condition Unit
logic level voltage High logic level voltage logic input bias current logic input bias current logic input bias current logic input bias current logic input bias current logic input bias current 2.25
11/22
Electrical characteristics
L6390
Table
Symbol
OPAMP characteristics (VCC
Parameter Input bias current
Test condition
Unit
Vicm
Input common mode voltage range level output voltage High level output voltage Source, Sink, Slew rate Gain bandwidth product Large signal voltage gain Supply voltage rejection ratio Common mode rejection ratio unity gain
14.7
V/µs
Output short circuit current
GBWP CMRR
direction input current
Table
Symbol td_comp
Sense comparator characteristics (VCC
Parameter Input bias current Open drain level output voltage Comparator delay Slew rate Test conditions VCP+ SD/OD pulled through resistor Unit V/µsec
12/22
L6390
Waveforms definitions
Waveforms definitions
Figure Dead time interlocking waveforms definitions
gate driver outputs (HALF-BRIDGE TRI-STATE)
INTE
INTE
CONTROL SIGNAL EDGES OVERLAPPED: INTERLOCKING DEAD TIME
KING
KING
gate driver outputs (HALF-BRIDGE TRI-STATE)
CONTROL SIGNALS EDGES SYNCHRONOUS (*): DEAD TIME
gate driver outputs (HALF-BRIDGE TRI-STATE) gate driver outputs (HALF-BRIDGE TRI-STATE)
CONTROL SIGNALS EDGES OVERLAPPED, INSIDE DEAD TIME: DEAD TIME
gate driver outputs (HALF-BRIDGE TRI-STATE) gate driver outputs (HALF-BRIDGE TRI-STATE)
CONTROL SIGNALS EDGES OVERLAPPED, OUTSIDE DEAD TIME: DIRECT DRIVING
gate driver outputs (HALF-BRIDGE TRI-STATE) gate driver outputs (HALF-BRIDGE TRI-STATE)
connected togheter driven just control signal
13/22
Smart shut down function
L6390
Smart shut down function
L6390 integrates comparator committed fault sensing function. comparator internal voltage reference Vref connected inverting input, while non-inverting input available comparator input connected external shunt resistor order implement simple over-current detection function. output signal comparator integrated MOSFET with open drain output available shared with input. When comparator triggers, device shut down state both outputs level leaving half-bridge tri-state. Figure Smart shut down timing waveforms
comp Vref
PROTECTION
HIN/LIN
HVG/LVG
SD/OD
upper threshold lower threshold
open drain gate (internal)
real disable time Fast shut down: driver outputs state immediately after comparator triggering even signal reach lower input threshold
TIME CONSTANTS
(RON_OD RSD)
SHUT DOWN CIRCUIT
VBIAS
FROM/TO CONTROLLER
SD/OD
SMART LOGIC
RON_OD
14/22
L6390
Smart shut down function common over-current protection architectures comparator output usually connected input network connected this SD/OD line order provide mono-stable circuit, which implements protection time that follows fault condition. Differently from common fault detection systems, L6390 Smart shut down architecture allows immediately turn-off outputs gate driver case fault, minimizing propagation delay between fault detection event actual outputs switch-off. fact time delay between fault outputs turn more dependent value external network connected pin.In Smart shut down circuitry, fault signal preferential path which directly switch outputs after comparator triggering. same time internal logic turns open drain output holds until voltage goes below logic input lower threshold. Smart shut down system provides possibility increase time constant external network (that disable time after fault event) very large values without increasing delay time protection. external signal provided latched used control signal order perform, instance, chopping through this pin. fact when signal applied input logic inputs gate driver stable, outputs switch from level state defined logic inputs vice versa.
15/22
Typical application diagram
L6390
Typical application diagram
Figure Application diagram
BOOTSTRAP DRIVER from DETECTION FROM CONTROLLER
FLOATING STRUCTURE
DETECTION DRIVER LEVEL SHIFTER
H.V.
Cboot
LOGIC SHOOT THROUGH PREVENTION
LOAD
FROM CONTROLLER VBIAS FROM/TO CONTROLLER
DRIVER COMPARATOR VREF VBIAS
SD/OD
LATCH SMART
DEAD TIME OPAMP
OPOUT
16/22
L6390
Bootstrap driver
Bootstrap driver
bootstrap circuitry needed supply high voltage section. This function normally accomplished high voltage fast recovery diode (Figure 7.a). L6390 patented integrated structure replaces external diode. realized high voltage DMOS, driven synchronously with side driver (LVG), with diode series, shown Figure 7.b. internal charge pump (Figure 7.b) provides DMOS driving voltage.
CBOOT selection charging
choose proper CBOOT value external seen equivalent capacitor. This capacitor CEXT related total gate charge: Equation
gate gate
ratio between capacitors CEXT CBOOT proportional cyclical voltage loss. Equation CBOOT CEXT
e.g.: Qgate Vgate CEXT With CBOOT drop would supplied long time, CBOOT selection take into account also leakage quiescent losses. e.g.: steady state consumption lower than CBOOT supply CEXT. This charge capacitor means voltage drop internal bootstrap driver gives great advantage: external fast recovery diode avoided usually great leakage current). This structure work only VOUT close lower) meanwhile charging time (Tcharge) CBOOT time which both conditions fulfilled long enough charge capacitor. bootstrap driver introduces voltage drop DMOS RDSON (typical value: frequency this drop neglected. Anyway increasing frequency must taken account. following equation useful compute drop bootstrap DMOS:
17/22
Bootstrap driver Equation
L6390
gate drop dson drop dson
where Qgate gate charge external power MOS, Rdson resistance bootstrap DMOS Tcharge charging time bootstrap capacitor. example: using power with total gate charge 30nC drop bootstrap DMOS about Tcharge 5µs. fact: Equation
30nC drop 0.7V
Vdrop taken into account when voltage drop CBOOT calculated: this drop high, circuit topology doesn't allow sufficient charging time, external diode used. Figure Bootstrap driver
DBOOT
BOOT H.V. LOAD
BOOT H.V. LOAD
CBOOT
CBOOT
D99IN1067
18/22
L6390
Package mechanical data
Package mechanical data
order meet environmental requirements, offers these devices ECOPACK® packages. These packages have lead-free second level interconnect. category second level interconnect marked package inner label, compliance with JEDEC Standard JESD97. maximum ratings related soldering conditions also marked inner label. ECOPACK trademark. ECOPACK specifications available www.st.com Figure DIP-16 mechanical data package dimensions
DIM. MIN. 1.27 2.54 17.78 0.130 0.51 0.77 0.25 0.335 0.100 0.700 0.280 0.201 1.65 TYP. MAX. MIN. 0.020 0.030 0.020 0.010 0.787 0.065 inch TYP. MAX.
OUTLINE MECHANICAL DATA
DIP16
0.050
19/22
Package mechanical data Figure
DIM. MIN. D(1) F(1)
REF. 0.35 MIN.
L6390
SO-16 narrow mechanical data package dimensions
TYP. MAX. 1.75 0.25 0.004 DIMENSIONS mm1.6
TYP. MAX. MIN. 0.46 0.014
1.75 1.65 0.013 0.46(typ.)
inch MIN. TYP. MAX. 0.069 0.009
inch 0.063 TYP. 0.018 MAX.
0.068 0.008
OUTLINE MECHANICAL DATA
PACKAGE PACKING INFORMATION
0.19
0.25
0.35 0.19
0.007
0.004
0.010 0.020
0.064 0.018
0.25
0.386
0.007 0.019
0.394 0.244
0.010
16-LEAD SMALL OUTLINE PACKAGE
Weight: available
1.27
(typ.) 0.228
1.27 8.894.0 0.385 0.050 0.228
0.393 0.244
8.89
0.350
0.050
4.60
0.150
0.350 0.157 0.157 0.208 0.208
0.149 5.30 0.181 0.181
1.27
1.27
0.150
0.019
0.050
0.050
0.620.62
(max.) (max.)
0.024 0.024
SO-16
SO16 (Narrow)
include mold flash protrusions Mold flash protrusions shall exceed 0.15mm (.006inc.)
0016020
20/22
L6390
Revision history
Revision history
Table
Date 29-Feb-2008 09-Jul-2008 17-Jul-2008
Document revision history
Revision First release Updated: Cover page, Table page Table page Section page Section page Section page Updated test condition values Table Table Changes
21/22
L6390
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