STMicroelectronics ASSEMBLY TOOL CHAIN HIWARE TOOL CHAIN COSMIC TOOL C

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STMicroelectronics ASSEMBLY TOOL CHAIN HIWARE TOOL CHAIN COSMIC TOOL C

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SOFTWARE TOOLS
STMicroelectronics ASSEMBLY TOOL CHAIN HIWARE TOOL CHAIN COSMIC TOOL CHAIN
GENERAL ENGLISH HELP THIS TRAINING: curly brackets, square brackets, quote, sharp sign pound), colon, semi-colon, coma ADVANTAGES language: READABLE PORTABLE (code above used with ST9) STANDARD (ANSI library, includind floats!) consider developping DISADVANTAGES wasn't made micros. nothing defined ANSI standard for: memory placement (constants, code, data, stack), access portable standard), interrupt handling. GOING SEE: Compilers able solve these problems these problems solved. Tools Environnements coming with these compilers. Programming tips AVAILABLE TOOLS: From third parties only HIWARE COSMIC THIS TRAINING SESSION close look what SPECIFIC compilers give development HINTS
HIWARE TOOLCHAIN
HIWARE TOOLCHAIN OVERVIEW
Packages, install usage
HIWARE COMPILER
Overview, memory management.
OTHER HIWARE TOOLS
Linker, maker, decoder, burner, simulator, debugger.
CONCLUSION
HIWARE TOOLCHAIN PACKAGES
Compiler. Macro Assembler Linker. Librarian. Maker. Decoder. Burner. PANTA
v5.0.5 v5.0.12 v5.0.11 v5.0.3 v5.0.7 v5.0.7 v5.0.6
DVP.
Simulator. v6.1.2
V6.1.2
Emulator. v6.1.2
different packages: Compiler+Tools Hicross Panta Debugger Hiwave Complete package (Hicross+Hiwave) Bundle versions often released comparison Assembly toolchain, Hiware toolchain easy manage beginninig: many tools, many files.
TOOLCHAIN USAGE
Three ways toolchain: each tool independently With PANTA With STVD7
INSTALL PROCEDURE
STVD7 USAGE
PANTA USAGE
Install STVD7
Family
Install HIWARE toolchain
Family
Hiware
Installation directory
MORE ETAIL REFE
Setup.exe
CONFIGURATION FILES
.hds
needed
.cnf
Configuration files needed order emulate devices that were available after affording toolchain.
HIWARE PROGRAM DIRECTORIES
Family
Sample programs assembly language Documentation
Hiware
time libraries assembly language HI-CROSS programs: PANTA, Compilers, Linker, Make utility, Debugger, Decoder Librarian Templates (Typical makefile, Typical devices
FILE APPLICATION FLOWS
PANTA USAGE:
WINDOWS
.s19
Trig gers
Dedica Board
.prm
WINDOWS WINDOWS
.abs
WINDOWS
.asm
ASSEMBLER
WINDOWS
LINKER
WINDOWS
.map
HIWAVE
WINDOWS
COMPILER
.pre
LIBRARIAN
WINDOWS WINDOWS
.lib
SIMULATOR
WINDOWS
.lst .psp .pjt
PANTA
DECODER
MAKER
BURNER
.mak
Project files: Different STEPS process: sources compilation files link hexadecimal file (abs), debug eventually hexadecimal file (s19 hex) ready program device After compilation/link step, possible simulate application with simulator emulate application with Hiwave obtain file with Burner. This file used program chip, using (Eprom Programming Board).
PANTA USAGE: APPLICATION FILE
ORGANIZATION
User files:
Source files:
*.asm *.inc
Generated files:
Debug hexa files:
Programmable file: Debuggable file:
Compilation-Link files:
Compilation result: Link result:
Project files:
Project space: Project file:
Linker setup:
Files written user: file sources (*.asm, *.inc, *.c, *.h) Files generated automatically: Project files Generated files
PANTA STVD7 USAGE:
LINKER PARAMETER SETUP
Linker able place variables through file
LINK NAMES
appli.abs appli_00.o appli_01.o+ ansi.lib
Don't this with Panta.*/
Object file list link
OBJPATH GENPATH
Force memory allocation
Hiware library.*/
SECTIONS
RAM_0 RAM_1 RAM_2 READ_WRITE 0x0080 0x00FF; READ_WRITE 0x0100 0x017F; READ_WRITE 0x0200 0x03FF;
PLACEMENT
Memory mapping definition
ST7_IO_PA INTO ST7_IO_PB INTO _ZEROPAGE, _OVERLAP DEFAULT_RAM DEFAULT_ROM
NO_INIT 0x0000 0x0003; NO_INIT 0x0004 0x0007; INTO RAM_0; INTO RAM_1, RAM2; INTO READ_ONLY 0x4000 0xFFDF;
register area initialized RESET consecutive memory locations Hiware startup then Correct "start07.o" Object list. INIT line VECTOR ADDRESS 0xFFFE _Startup Custom startup then INIT main VECTOR ADDRESS 0xFFFE main
Interrupt vector definition
/*Statup routine definition notdefault "Hiware Startup".*/
INIT VECTOR ADDRESS VECTOR ADDRESS VECTOR ADDRESS 0xFFFE 0xFFFC 0xFFFA main main INT_Trap INT_Extern
This file must still written programmer. file first step solve interrupt problem memory placement problem language. Although should written user, application team provides typical files dedicated micros, with memory segments interrupt vectors already declared. This part software library.
START (1/2) Create project space (.psp) Create project (.pjt) project properties:
Choose your your available, choose your derivative Else write your file
PANTA USAGE:
START (2/2) Choose your .prm file needed (your one)
PANTA USAGE:
path
Create sources! them project Build Finished!
FILE APPLICATION FLOWS
STVD7 USAGE:
WINDOWS
.s19
Triggers
Dedicated Board
.prm
WINDOWS WINDOWS
.abs
WINDOWS
.asm
ASSEMBLER
WINDOWS
LINKER
WINDOWS
.map
EMULATOR
WINDOWS
COMPILER
.pre .lst
LIBRARIAN
WINDOWS WINDOWS
.lib
SIMULATOR
WINDOWS
DECODER STVD7
MAKER
.mak
BURNER
Default.env .wsp
Different STEPS process: sources compilation files link hexadecimal file (abs), debug eventually hexadecimal file (s19 hex) ready program device After compilation/link step, possible obtain file with Burner. This file used program chip, using (Eprom Programming Board). STVD7 simulation emulation processes. STVD7 free provided which contains: TEXT EDITOR SIMULATOR EMULATOR INTERFACE
STVD7 USAGE: APPLICATION FILE
ORGANIZATION
User files:
Source files:
*.asm *.inc
Generated files:
Debug hexa files:
Debuggable file:
Compilation-Link files:
Compilation result: Link result:
Project files:
Project workspace: Project file: default.env Makefile:
Linker setup:
Files written user: Default.env file file sources (*.asm, *.inc, *.c, *.h)
STVD7 USAGE: DEFAULT.ENV FILE
Default.env file indicating paths compilation flags often same through applications With PANTA, this file automatically generated, according your settings
semicolon separator allows multiple path declarations. Each path taken into account definition order
default.env
LIBPATH=C:\HICROSS\LIB\ST7C OBJPATH=C:\APPLI\OBJECT ABSPATH=C:\APPLI\OBJECT TEXTPATH=C:\APPLI\OBJECT COMP=C:\HIWARE\PROG\CST7.EXE LINK=C:\HIWARE\PROG\LINKER.EXE FLAGS= -Cni -Wpd ASMOPTIONS= ERRORFILE=
Used libs General path map, lst, pre, Short access Hiware tools Default flags compilation
Customize existing ones!
STVD7 USAGE: MAKEFILE
Looks like Unix makefiles Always similar, projects: customize existing ones. With PANTA, this file automatically generated, according your project files
EXECUTABLE COMMAND DEFINES default.env $(COMP) $(FLAGS) OBJECT FILES DEFINES OBJ_LIST appli_00.o appli_01.o appli_50.o LIBRARY FILES DEFINES LIB_ST7 appli_00.h LIB_APPLI appli_25.h appli_12.h LINK appli.abs $(ENV) $(OBJ_LIST) appli.prm $(LINK) appli.prm FILE COMPILATION appli_00.o $(ENV) appli_00.c $(LIB_APPLI) $(CC) appli_00.c appli_50.o $(ENV) appli_50.c $(CC) appli_50.c FILE
Customize existing ones!
START (1/2) Create workspace your project settings:
Choose Hiware toolchain Fill makefile info, already exists
STVD7 USAGE:
START (2/2) Create default.env file Create makefile Create your file Create sources Build
STVD7 USAGE:
HIWARE COMPILER
LOCAL VARIABLES PARAMETERS
STRATEGY, OVERLAPPING
MEMORY ALLOCATION ACCESS
CONSTANT, DATA (POINTER, BIT), CODE
INTERRUPT MANAGEMENT ASSEMBLER COMPILER OPTIONS
We're going Hiware answers disadvantages identified beginning
LOCAL VARIABLES PARAMETERS STRATEGY
LOCAL VARIABLES PARAMETERS STORED INTO STACK
LOCAL VARIABLES PARAMETERS STORED INTO DEDICATED MEMORY AREA CALLED "OVERLAP"
A,[SP,#
Prm1 Prm0 high STACK
TERS SIMPLE RAME LOWS VARIA TACK LOCAL
#0x0100+n
OPTIMIZATION MEMORY ALLOCATION
microcontroller easy commands set, accessing single location stack, without modifying solution OVERLAP memory area: local variables parameters shares memory locations, while they used same time. OVERLAP memory area default behaviour recommended memory model ST7.
LOCAL VARIABLES PARAMETERS OVERLAPPING
void fct2 (void) static char var2; Memory Allocation var1 Without #pragma var2 var3 static NO_OVERLAP PRAGMA void fct3 (void) char var3; Execution tree fct2 With void fct1 (void) var2 static PRAGMA fct3 char var1; var3 fct2(); pragma fct3(); only fct1 next defin functio var1
OVERLAP SEGMENT
FAUL RIABLES ETERS PARA INTO OVER
Memory Allocation
var1 var2 var3
OVERLAP SEGMENT DEFAULT SEGMENT
Remind: static local variable usable function value kept between function calls. static local variable, from memory point view, behaves like global variable shareable. Therefore can't allocated overlap segment. This solves stack problem identified beginnning.
MEMORY ALLOCATION OPTIONS
Option
Memory Model SMALL
Local Data Parameter zeropage
Global Data zeropage
used with
application with used into page [0x00.0xFF].
force memory access outside zeropage "far" pointer access used.
LARGE
zeropage
page
Most efficient code generation standard applications (local variables parameters used more often than global ones)
Global variable forced allocated zeropage through pragma "#pragma DATA_SEG SHORT".
FILE
LARGE
Extended
page
page
Very large application with local variables parameters which stored into zeropage.
Large model recommended
MEMORY ALLOCATION: CONSTANTS
Pragma valid next one. #pragma CONST_SEG MY_ROM const char table {.};
MY_ROM with option DEFAULT_ROM with option DEFAULT_RAM without option DEFAULT_ROM DEFAULT_RAM
Pragma only valid following declaration. #pragma INTO_ROM const char ptr_table ={.};
@0x0100 @0x0BFF @0x1000 @0x3FFF @0x4000 @0xFFDF DEFAULT_RAM MY_ROM DEFAULT_ROM
PLACEMENT DEFAULT_RAM MY_ROM DEFAULT_ROM 0xFFDF;
INTO READ_WRITE 0x0100 0x0BFF; INTO READ_ONLY 0x1000 0x3FFF; INTO READ_ONLY 0x4000
waste allocate constants RAM! With option (which stands for: allocate const ROM), user able choose where allocate constants, with help #pragma CONST_SEG directive. From same point view, pointers which never changes considered constants, therefore allocated ROM, with help #pragme INTO_ROM directive.
MEMORY ALLOCATION: CONSTANTS
with option DEFAULT-RAM
const char ptr_tab1 ={.}; const char tab1 {.}; #pragma CONST_SEG MY_ROM const char table {.}; const char tab2 {.}; #pragma INTO_ROM const char ptr_table ={.}; const char ptr_tab2 ={.};
MY-ROM DEFAULT-ROM
PLACEMENT DEFAULT_RAM MY_ROM DEFAULT_ROM
INTO READ_WRITE INTO READ_ONLY INTO READ_ONLY
0x0100 0x0BFF; 0x1000 0x3FFF; 0x4000 0xFFDF;
Solution: default_ram: ptr_tab1 ptr_tab2 my_rom: table tab2 default_rom: tab1 ptr_table Now, know allocate constants.
MEMORY ALLOCATION: DATA
ILER #pragma DATA_SEG SHORT ADC_SEG volatile char ADCDR; volatile char ADCCSR;
Pragma valid
next one.
ADCDR ADCCSR var1 var2
ADC_SEG Segment
#pragma DATA_SEG SHORT _ZEROPAGE
char var1;
Without PRAGMA: DEFAULT_RAM Segment
@100
#pragma DATA_SEG DEFAULT
char var2;
NAMES map_72XX.o PLACEMENT ADC_SEG _ZEROPAGE DEFAULT_RAM
INTO NO_INIT INTO READ_WRITE INTO READ_WRITE
0x0070 0x0071; 0x0080 0x00FF; 0x0100 0x0BFF;
Without ADCDR used
ADCDR ADCCSR
volatile char ADCDR@0x70;
#pragma DATA_SEG directive allows user place global variables memory. volatile keyword usefull variable mapping registers. will allow compiler optimize these variables, because they could modified hardware. sign behind name file file usefull, order compile optimize memory allocation.
MEMORY ALLOCATION: DATA
char var2; #pragma DATA_SEG SHORT PortA_SEG volatile char PADR; volatile char PADDR; volatile char PAOR; #pragma DATA_SEG SHORT _ZEROPAGE char var3; char var1; #pragma DATA_SEG DEFAULT char var4; char var5;
PortA_SEG
_ZEROPAGE DEFAULT_RAM
PLACEMENT PortA_SEG _ZEROPAGE DEFAULT_RAM
INTO NO_INIT INTO READ_WRITE INTO READ_WRITE
0x0000 0x0003; 0x0080 0x00FF; 0x0100 0x0BFF;
Solution: Port1_SEG: PADR PADDR PAOR _ZEROPAGE: var3 var1 DEFAULT_RAM: var2 var4 var5 this time, know place global variables memory mapping.
MEMORY ALLOCATION: CODE
void fct1 (void) #pragma CODE_SEG MY_ROM void fct2 (void) #pragma CODE_SEG DEFAULT void fct3 (void)
@1000
fct2 code
MY_ROM Segment
@4000
fct1 code fct3 code
DEFAULT_ROM Segment
Remark: Pragma CODE_SEG valid next one.
PLACEMENT MY_ROM DEFAULT_ROM
INTO READ_ONLY INTO READ_ONLY
0x1000 0x3FFF; 0x4000 0xFFDF;
#pragma CODE_SEG directive allows user place code memory.
MEMORY ALLOCATION: CODE
void fct1 (void) #pragma CODE_SEG MY_ROM2 void fct2 (void) #pragma CODE_SEG MY_ROM1 void fct3 (void) void fct4 (void) #pragma CODE_SEG DEFAULT void fct5 (void) void fct6 (void)
MY_ROM1 MY_ROM2 DEFAULT_ROM
PLACEMENT MY_ROM1 MY_ROM2 DEFAULT_ROM
INTO READ_ONLY INTO READ_ONLY INTO READ_ONLY
0x1000 TO0x2FFF; 0x3000 TO0x4FFF; 0x5000 0xFFDF;
Solution: MY_ROM1: fct3 fct4 MY_ROM2: fct2 DEFAULT_ROM: fct1 fct5 fct6 this time, know deal with code placement ST7.
MEMORY ALLOCATION TIPS INCLUDE FILE
declaration.h
#pragma DATA_SEG SHORT ADC_SEG extern volatile char ADCDR; extern volatile char ADCCSR; #pragma DATA_SEG SHORT _ZEROPAGE extern char zeropage_var; #pragma DATA_SEG DEFAULT
ADC_SEG
ADCDR ADCCSR zeropage_var default_var
_ZEROPAGE DEFAULT_RAM
With DEFAULT pragma appli.c
#include "declaration.h" char default_var; void appli_fct1 (void)
declaration.c
#pragma DATA_SEG SHORT ADC_SEG volatile char ADCDR; volatile char ADCCSR; #pragma DATA_SEG SHORT _ZEROPAGE char zeropage_var;
ADC_SEG
ADCDR ADCCSR zeropage_var default_var
_ZEROPAGE
DEFAULT_RAM
default_var
Without DEFAULT pragma
variable will placed memory, depending pragma above. programmer should then give particular attention pragma definition above variable declaration, especially while files included.
POINTER MEMORY ACCESS
char near (char near ptr) (char near) 0x1234; return(ptr);
char (char ptr) (char far) 0x1234; return(ptr);
near: forces SHORT addressing mode.
OPCODE Without 0000 0002 0004 0006 0008 0000 0002 0004 A,#0x34 ptr:1,A X,#0x12 ptr,X
far: forces LONG addressing mode.
With
Without With A,#0x34 ptr,A
Although chosen memory model fixes default addressing mode (short long), user still able force using "near" "far" keywords
PORTABLE FIELD
MEMORY ALLOCATION ORDER PORTABLE
inside zeropage MACRO
bitfield.bit1
CODE
Place) Place) 255) Place)
GENERATED CODE
BSET VAR,#Place BRES VAR,#Place BTJT VAR,#Place, BTJF VAR,#Place,
#define SetBit(VAR,Place) #define ClrBit(VAR,Place) #define ValBit(VAR,Place)
fields, like defined ANSI standard portable! Indeed, real places will depend little-endian/big-endian first/ first) nature processor. access longer problem.
struct unsigned bit0:1 unsigned bit1:1 bitfield;
MASKING METHOD
WORD ACCESS TIPS
#define LSB(WORD) #define MSB(WORD) #define WORD(MSB,LSB) char msb, lsb; word1, word2; void Convertion (void) MSB(word1); =LSB(word1); word2 WORD(msb,lsb);
WORD WORD>>8 (int) (((int) LSB)
A,word1 lsb,A A,word:0x01 msb,A word2:0x1,X word2,A
These macros usefull order work with bits values.
INTERRUPT MANAGEMENT
#pragma TRAP_PROC SAVE_REGS void IntFct (void) IntFct: IRET
#pragma TRAP_PROC void Int_Dummy (void)
IntFct: PUSH PUSH PUSH PUSH PUSH PUSH IRET _R_Z _LEX:1 _LEX _SEX:1 _SEX
ISTE
0xFF;
VECTOR ADDRESS 0xFFFC VECTOR ADDRESS 0xFFFA
IntFct
Hiware uses pieces internal memory purpose. This memory must then saved under interrupt routines. Interrupts longer problem thanks #pragma TRAP_PROC file
ASSEMBLER: SYNTAX BRANCH
CRITICAL CODE PART DESIGN (timer output compare register update)
OPCODE
void HLI_Branch (void) clear; return; 0xFF clear: SKIP loop: JRNE loop
SYNTAXES
OPTIMIZED
Data insertion code "INC instruction skipped loop roll
0000 0002 0003 0004 0005 0006 0007 0009 (X),X /abs 0004
SKIP <JRF> JRNE /abs 0005
LABELS ONLY VALID CURRENT FUNCTION
Assembler line used, order optimize parts code have better control execution: use, precise waiting loops,
ASSEMBLER: MEMORY ACCESS
#pragma #define #define
NO_STRING_CONSTR LDA10 A,#10 CST10
Disable preprocessor string construction capability. Valid current module.
acce Direc emory
struct char field1; char field2; str; char array[10]; void HLI_Access (void) A,0xA123 Comment A,#CST10 Comment LDA10 A,str.field2 A,array[7] A,array:7
23LD A,0xA123 A,#0x0A A,#0x0A A,str.field2 A,array:0x7 A,array:0x7 A,#c A,#c A,#HIGH(c)
SAME GENERATED CODE
ADDRE VARIABL ACCESS
A,#c A,#LOW(c) A,#HIGH(c)
allows access definitions: chars, ints arrays structures
DEBUGGING COMPILER OPTIONS
OPTION
-Wpd -Fsi
DESCRIPTION
code generation.
Only compiler preprocessor processed.
D-UP SPEE TION MPILA
GENERATED FILES
source.PRE LOGFILE.TXT (append) source.O MAKE.TXT (append) source.O source.O source.O source.O
Statistics about functions (size, stack used, compiling time) Include files Make file list generate update make file (dependancy format). Online macro definition (-DMYMACRO=0) Display notify window when compiler error detected. ERROR Implicit Parameter Declaration (WARNING default) SHORT type converted type debugging visibility.
Many compiler options available. Please refer Hiware documentation more details. Interesting options: order output preprocessor allows generate makefile, browsing file dependencies. generates list object files.
TEXTPATH
OPTIMIZATION COMPILER OPTIONS
OPTION
DESCRIPTION
Optimum code term SIZE (-Os) default EXECUTION TIME (-Ot) Remove dead assignment code Disable sequential field set/clear optimization (for register sequential behaviour) Disable standard ANSI-C Integral promotion
-Onbf char void cni_option (void)
-Cni
char Function (char ptr) char dead; (char*) 0x1234; dead=10; return(ptr);
-Cni
OPTIMUM CODE GENERATION WITH OPTION
A,#0x34 ptr:1,A X,#0x12 ptr,X A,#0x0A dead,A
a:0x1,A
PUSH PUSH CALL
_IMULS a:0x1,A
A,#0x34
Interesting options: -Os/Ot order optimize code size speed remove dead code -Cni which forces compiler consider char suggested ANSI standard)
COMPILER LIMITATIONS
RECURSIVITY INDIRECT RECURSIVE CALLS, CODE REANTRANCY
OVERLAP STRATEGY
RESULTS OPERATOR LIMITED BYTES FUNCTION POINTERS ALLOW ONLY BYTE PARAMETER "CALLR" INSTRUCTION LIMITED LOCAL LABELS
ASSEMBLER
COMPILER BENEFITS
POWERFUL GENERATED CODE OPTIMIZATION ANSI-C COMPILER
EASY PORTING
FLEXIBLE MEMORY ALLOCATION POWERFUL HLI-ASSEMBLER
AVOID SPLIT CODE ASSEMBLER FILES
SOON AVAILABLE
PANTA
Hiware able solve potential problems identified beginning.
OTHER HIWARE TOOLS
LINKER LIBRARIAN TOOLS
LINKER.EXE, LIBMAKER.EXE
MAKER TOOL
MAKER.EXE
DECODER TOOL
DECODER.EXE
WINDOW BATCH BURNER
BURNER.EXE (FILE CONVERTER)
WINDOW DEBUGGER SIMULATOR
LINKER LIBRARIAN SYNTHAX
linker files .lib files, order create file, which allows debug application. librarian allows user make libraires like ansi.lib one.
HIWARE MAKER TOOL
MAKER.EXE
EXECUTABLE COMMAND DEFINES default.env $(COMP) $(FLAGS)
Subset UNIX make
VARIABLE DEFINITION RULES LIST
OBJECT FILES DEFINES OBJ_LIST appli_00.o appli_01.o appli_50.o LIBRARY FILES DEFINES LIB_ST7 appli_00.h LIB_APPLI appli_25.h appli_12.h LINK appli.abs $(ENV) $(OBJ_LIST) appli.prm $(LINK) appli.prm FILE COMPILATION appli_00.o $(ENV) appli_00.c $(LIB_APPLI) $(CC) appli_00.c appli_50.o $(ENV) appli_50.c $(CC) appli_50.c FILE
user must write makefile.
HIWARE DECODER TOOL
Source File char void (void) A,c2 A,c3 c1,A char c1,c2,c3; void (void)
DECODER.EXE
.abs
C/ASM Information File void (void) 00000000 A,c2 00000003 A,c3 00000006 c1,A 00000009
Analysis code generated compiler. Building list file with mixed source assembler instructions. Inline assembler code generator from source code.
HIWARE WINDOWS BURNER
(Linker output) CONVERTER (EPB)
Start address length (end@+1 minimum
burner tool after linker.
HIWAVE DEBUGGER SIMULATOR (1/2)
DEBUGGER FEATURES:
Real time debugging code source level Session recorder player Debug step step with controlpoints Trace analyser
SIMULATOR FEATURES:
True-Time simulation (cycle based) shot periodical stimulation possible Interrupt handling Time measurement Complex breakpoints Graphical profiler coverage analyser Peripheral builder (Phone, tail light, LEDs,
HI-WAVE used with Emulators development Kits third-parties tools
HIWAVE advantages: Graphical code profiler coverage Peripheral builder STVD7 advantages: IDE. Waveform editor Free charge!
HIWAVE DEBUGGER SIMULATOR (2/2)
HIWARE TOOLCHAIN BENEFITS CONCLUSION
COMPLETE DEVELOPMENT TOOLCHAIN
COMPILER MACRO-ASSEMBLER BUILDER TOOLS (LINKER, BURNER.) DEBUGGING TOOLS (SIMULATOR, DECODER.) soon available (PANTA)
POWERFULL COMPILER
ANSI-C DEDICATED CAPABILITIES OPTIMIZED GENERATED CODE (ARRAY, LIB.)

STMicroelectronics ASSEMBLY TOOL CHAIN HIWARE TOOL CHAIN COSMIC TOOL C

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