Lutz Bierl Version April 1997 Metering Application Report MS
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Metering Application Report
Lutz Bierl Version April 1997
Metering Application Report
MSP430 Family
INTRODUCTION_
Notation MSP430 Family
1.2.1 MSP430x31x 1.2.2 MSP430x32x 1.2.3 MSP430x33x
Some Advantages MSP430 Concept
1.3.1 1.3.2 1.3.3 1.3.4 RISC Architecture without RISC-Disadvantages Realtime Capability Stability System Clock Generator_ Stack Processing Capability
Operating Modes used Metering Applications
1.4.1 Active Mode 1.4.2 Power Mode 1.4.3 Power Mode
ANALOG-TO-DIGITAL CONVERTERS
14-bit Analog-to-Digital Converter
2.1.1 Current Source_ 2.1.2 14-bit Analog-to-Digital Converter used 14-bit Mode 2.1.2.1 with signed signals_ 2.1.2.2 Four-Wire Circuitry Sensors 2.1.2.3 Referencing with Reference Resistors 2.1.2.4 Interrupt Handling_ 2.1.2.5 Enlargement 16-bit Mode 2.1.3 14-bit Analog-to-Digital Converter used 12-bit Mode 2.1.3.1 with signed signals_ 2.1.3.2 Interrupt Handling_ 2.1.4 Connection long Sensor Lines 2.1.5 Grounding_ 2.1.6 Connection Current consuming Loads SVcc 2.2.1 2.2.2 2.2.3 2.2.4 Interrupt Handling Connection long Sensor Lines Grounding_ Voltage Measurement with Universal Timer Port/Module
Universal Timer/Port Module used
HARDWARE APPLICATIONS_
I/O-Port Usage
3.1.1 General Usage 3.1.2 Zero Crossing Detection 3.1.3 Output Buffering_ 3.1.4 Universal Timer/Port I/Os 3.1.4.1 I/Os used with Analog-to-Digital Converter 3.1.4.2 I/Os used without ADC_ 3.1.5 I/Os used fast serial Transfer_
Storage Calibration Constants_
3.2.1 External EEPROM Calibration Constants 3.2.2 Internal Calibration Constants_
M-BUS Connection Connection
MSP430 Family
Metering Application Report
Hardware Optimization
3.5.1 unused Analog Inputs 3.5.1.1 Analog Inputs used Digital Inputs 3.5.1.2 Analog Inputs used Digital Outputs 3.5.2 unused Segment Lines Digital Outputs 3.6.1 R/2R Method 3.6.2 Weighted Resistors Method 3.6.3 Digital-to-Analog Converters connected Bus_ 3.6.4 PWM-Digital-to-Analog Converter with Universal Timer/Port Module 3.6.5 PWM-Digital-to-Analog Converter with Timer_A_ 3.6.5.1 PWM-DAC with Timer_A running Continuous Mode 3.6.5.2 PWM-DAC with Timer_A running Mode 3.6.5.3 PWM-DAC with Timer_A running Up-Down Mode
Digital-to-Analog Converters
Connection large external Memories Power Supplies MSP430 Systems
3.8.1 Battery Driven Systems 3.8.2 Accumulator Driven Systems 3.8.3 Mains Driven Systems 3.8.3.1 Transformer Power Supplies_ 3.8.3.1.1 Half-Wave Rectification 3.8.3.1.2 Full-Wave Rectification 3.8.3.2 Capacitor Power Supplies 3.8.3.2.1 Capacitor Supplies Single Voltage 3.8.3.2.2 Capacitor Supplies Voltages_ 3.8.4 Supply from other System DC-Voltages_ 3.8.4.1 Zener Diode 3.8.4.2 Zener Diode Operational Amplifier 3.8.4.3 Reference Diode with Operational Amplifier 3.8.4.4 Integrated Voltage Regulator 3.8.5 Supply from M-Bus 3.8.5.1 M-BUS Supply 3.8.5.2 Mixed Supply 3.8.6 Supply Glass Fiber Cable 3.8.6.1 Description Hardware 3.8.6.2 Working Sequence 3.8.7 Conclusion
Metering Application Report
MSP430 Family
INTRODUCTION
MSP430 16-bit microcomputer having special features commonly available with other microcomputers: Complete system on-chip (LCD, ADC, I/Os, ROM, RAM, Watchdog, UART, Basic Timer) Extremely power consumption: only 4.2nWs/instruction max. High speed (300ns/instruction 3.3MHz with register, register addressing mode) RISC structure core instructions) Orthogonal architecture (any instruction with addressing mode) Seven addressing modes source operand Four addressing modes destination operand Constant generator most often used constants (-1, Only crystal necessary Frequency Locked Loop (FLL) oscillator Full real time capability: stable, nominal system clock frequency reached after only clocks when woken-up from Power Mode this means waiting coming-up main crystal.
These features make very easy program MSP430 assembler C-language. example, despite instruction count only MSP430 capable emulating almost complete instruction legendary PDP11. NOTES advised have "MSP430 Architecture User's Guide Module Library" readily available. This book contains valuable information, illustrations detailed description MSP430 hardware. Additionally "MSP430 Software User's Guide" recommended. contains further information regarding instruction set, besides other more common software information. examples given refer "MSP430 Family Architecture User's Guide 1996". guaranteed that revisions will behave exactly same manner described this User's Guide. "Important Notice" above. given software examples tested functionality. They used freely customer's software developments.
Notation following abbreviations special notations used: R4|R3 R1||R2 AGND .or. .and. .xor. .not. 32-bit number. MSBs register LSBs Resistor connected parallel with resistor Ground connection Analog-to-Digital Converter (Vss resp. AVss) Logical function Logical function Logical Exclusive function Logical Inversion Source (location where data read from)
MSP430 Family MCLK ACLK ACTL.1 Foreground Background [ns]
Metering Application Report Destination (location where data written Stack Pointer register set) Program Counter register set) Stack (data word Stack Pointer points Most significant byte) Least significant byte) Digitally Controlled Oscillator Binary Coded Decimal (numbers coded binary with bits) Analog-to-Digital Converter Central Processing Unit Liquid Crystal Display Input Output Line Read Only Memory (program memory) Random Access Memory (data memory) Master Clock (output oscillator) Auxiliary Clock (output 32kHz oscillator) (value register ACTL Interrupt driven software parts (interrupt handlers) Normal program Square brackets contain used unit value (here nanoseconds)
NOTE units defined shown equations then standard units used. This means Volt, Ampere, Farad, Seconds millivolt, microamps, nanofarads kiloohms a.s.o.
MSP430 Family MSP430 family currently consists currently three sub-families: MSP430x31x sub-family MSP430x32x sub-family MSP430x33x sub-family three sub-families described depth "MSP430 Family Architecture User's Guide Module Library". hardware features different sub-families are:
Metering Application Report Table 12.1: Differences between MSP430 Sub-families Hardware Item MSP430x31x MSP430x32x Segment lines 14-Bit Universal Timer/Port Module I/Os with Interrupt I/Os without Interrupt 16-Bit Timer_A USART (SCI SPI) HW/SW UART Watchdog Timer HW-Multiplier Basic Timer Oscillator Package 56SSOP 64QFP
MSP430 Family
MSP430x33x 100QFP
mentioned otherwise, examples explanations valid categories. 1.2.1 MSP430x31x
XOut XBUF RST/NMI P0.0 P0.7
Oscillator
System Clock
ACLK MCLK
4/8/12kB
'C': `P':
256/512B
SRAM
PoweronReset
Timer/ Counter
Serial Protocol Support
Port
I/O's, with interr. capability Int. Vectors
MAB, 16bit
incl. reg.
Test JTAG
MAB,4bit conv. MDB,8bit
MDB, 16bit Watchdog Timer 15bit Timer/Port Applications: Conv. Timer,
Basic Timer
Segment Lines
Com0.3 0.18,22,23,26
TP.0
Figure 12.1: MSP430C31x with Peripherals
MSP430 Family 1.2.2 MSP430x32x
XOut XBUF RST/NMI
Metering Application Report
P0.0
P0.7
Oscillator
System Clock
ACLK MCLK
8/16kB 16kB
'C': 'P':
256/512B
SRAM
Power onReset
Timer/ Counter
Serial Protocol Support
Port
I/O's, with interr. capability Int. Vectors
MAB, 16bit
incl. reg.
Test JTAG
MAB,4bit conv. MDB,8bit
MDB, 16bit 12+2bit Channels Current A0.5 SVCC Watchdog Timer 15bit Timer/Port Applications: Conv. Timer,
Basic Timer1
Segments
Com0.3 0.19
TP.0
Figure 12.2: MSP430C32x with Peripherals
Metering Application Report 1.2.3 MSP430x33x
XOut XBuf VCC1 VCC2 VSS1 VSS2 VSS3 RST/NMI P4.0 P4.7 P2.x Oscillator
System Clock
MSP430 Family
P1.x P3.0
P3.7 P0.0
P0.7
ACLK MCLK
24kB 32kB 32kB EPROM
1024B
SRAM
PoweronReset
Port
dig. I/O's
Port
I/O's with interr. cap. Int. Vectors
Port
dig. I/O's
Port
I/O's, with interr. cap. Int. Vectors
UART MAB, 16bit incl. reg. Test JTAG MDB, 16bit MPYS 16x16bit 8x8bit Watchdog Timer 15bit TimerA 16bit USART
UART
MAB,4bit conv. MDB,8bit
TimerA
RXD,
8bit Timer/ Counter
Timer/Port
Appl.'s: Timer,
Basic Timer
CMPI
Segment Lines
Com0.3 S0.28/O2.28 S29/O29/CMPI
function
1,2,3,4
SIMO SOMI TACLK TA0.0.5
TP.0
Figure 12.3: MSP430C33x with Peripherals Some Advantages MSP430 Concept MSP430 concept differs strongly from concepts used other microcomputer families. This section will shortly explain MSP430 developed this way. 1.3.1 RISC Architecture without RISC-Disadvantages Normal RISC architectures proof their capabilities best when running environment calculations: (numerous) registers loaded with input data beginning, calculations made within registers result stored back into RAM. This concept makes memory accesses this means addressing modes necessary only STORE LOAD instructions. MSP430 programmed this way; example this floating point package, doing pure calculation task without access. pure RISC architecture shows disadvantages when running real time applications: here wasting time operand needs loaded first, modified then stored back finally. Therefore MSP430 architecture uses best worlds: RISC concept with few, strong instructions, numerous registers single cycle execution times. microcomputer concept with addressing modes provided instructions only load store instructions. This concept brought with 100% orthogonality used, which means seven addressing modes usable with instructions.
MSP430 Family 1.3.2 Real-time Capability
Metering Application Report
complete concept MSP430 family developed full real time capability additional Ultra Power Consumption. main reason this capability system clock generation made: second high frequency crystal used, with inherent time delay until full oscillator amplitude reached 200ms) Instead sophisticated Frequency Locked Loop (FLL) system clock generator used whose output frequency MCLK nominal frequency within cycles woken-up from Power Mode (LPM3 Sleep Mode)
above mentioned concept allows real time capability also power modes active time. Only additional MCLK cycles (2µs 1MHz) necessary LPM3 first instruction interrupt handler. 1.3.3 Stability System Clock Generator used Digitally Controlled Oscillator (DCO) voltage temperature dependent; this does mean that frequency stable. During Active Mode every 30.5µs (2-15s) integral error corrected nearly zero. This made adequate switching between different frequencies: them higher than programmed MCLK frequency lower. overall error nearly zero this way. frequencies interlaced much possible smallest possible error time. section "The System Clock Generator" more information. 1.3.4 Stack Processing Capability MSP430 true stack processor: most seven addressing modes were implemented first Stack Pointer proved later that these addressing modes very useful other registers (PC, R15) too. capabilities stack cover: Free access items stack (not only stack TOS) Possibility modify subroutine interrupt return addresses located stack Possibility modify stored Status Register interrupt returns located stack special stack instructions: implemented instructions used stack Stack Pointer Byte word capability stack Free subroutine interrupt handling: long stack modification made (PUSH, a.s.o.) errors occur.
more information concerning stack Appendix
Metering Application Report Operating Modes used Metering Applications
MSP430 Family
MSP430 metering applications fall into main classes depending power supply: Mains driven applications like electricity meters. microcomputer needs active time, current consumption MSP430 (max. 1.4mA 5V/1MHz this problem, despite need power consumption (system consumption 40mA). Battery driven applications such meters, water flow meters, heat volume counters etc. these applications power consumption plays overwhelming role because these applications have from battery more than years. current drawn MSP430 needs range self discharge current battery, which means
MSP430 offers operating modes, with different current consumption. Three them important battery-driven applications: Active Mode with running CPU. Power Mode (LPM3): normal mode applications during 99.9% time. This mode also called Done Mode Sleep Mode. Power Mode (LPM4): mode used during storage times. This mode also called Mode. 1.4.1 Active Mode This mode used calculations, decisions, I/O-functions other activities that make running necessary. peripherals used provided that they enabled. examples shown this guide Active Mode. 1.4.2 Power Mode most important mode battery driven applications. disabled, enabled peripherals stay active: driver, Basic Timer, I/O-ports, 8-bit Timer. running Basic Timer allows precise time base. Enabled interrupts wake-up CPU, switch MCLK start normal operation. Table 14.1 shows status complete MSP430 system when Power Mode (LPM3): Table 14.1: System during Power Mode Active Active ACLK MCLK 32768Hz Oscillator Disabled Peripherals Driver enabled) Disabled Interrupts Basic Timer enabled) I/O-Ports 8-bit Timer Enabled Peripherals RESET Logic enter Power Mode following code necessary: Definitions Operating Modes
MSP430 Family
Metering Application Report
.EQU 008h General Interrupt enable CPUOFF .EQU 010h OSCOFF .EQU 020h Oscillator SCG0 .EQU 040h System Clock Generator SCG1 .EQU 080h System Clock Generator HOLD .EQU 080h Hold Watchdog CNTCL .EQU 008h Watchdog Reset Enter Power Mode enable interrupts. Watchdog must held ACLK used timing #05A00h+HOLD+CNTCL,&WDTCTL Define #CPUOFF+GIE+SCG1+SCG0,SR Enter LPM3 After completion interrupt routine software returns instruction that CPUoff bit. normal wake-up LPM3 comes from Basic Timer: programmed wake-up regular intervals (ranging from 0.5Hz 64Hz higher) maintain software timer. This software timer controls necessary system activities. EXAMPLE: MSP430 system runs normally LPM3. enabled interrupt Basic Timer wakes-up system every second. minute elapses, measurements made afterwards system returns LPM3. Interrupt handler Basic Timer: Wake-up with BT_HAN #05A00h+CNTCL,&WDTCTL Reset watchdog INC.B SECCNT Counter seconds CMP.B #60,SECCNT minute elapsed? MIN1 Yes, necessary tasks RETI return LPM3 minute elapsed: Return removed from stack, branch necessary tasks made. There decided proceed MIN1 MINCNT Minute counter SECCNT SECCNT #4,SP House keeping: Stack #TASK tasks TASK Start necessary tasks measurements calculations made: Return LPM3 #05A00h+HOLD+CNTCL,&WDTCTL Hold #CPUOFF+GIE+SCG0+SCG1,SR Enter LPM3 Power Mode mode with lowest current consumption that allows real time clock: Basic Timer interrupt LPM3 relatively long time intervals update real time clock. Status Register changed during interrupt routines then RETI instruction returns instruction that CPUoff (and moved
Metering Application Report
MSP430 Family
into LPM3). Program Counter points next instruction this instruction executed unless interrupt routine resets CPUoff during run. woken-up from LPM3 additional cycles needed until loaded with interrupt vector address interrupt handler started cycles instead when Active Mode). EXAMPLE: MSP430 system runs normally LPM3. enabled interrupt Basic Timer wakes-up system every second. minute elapsed, measurements made afterwards system returns LPM3. branch task made resetting CPU0ff inside interrupt routine. Interrupt handler Basic Timer: Wake-up with BT_HAN #05A00h+CNTCL,&WDTCTL Reset watchdog INC.B SECCNT Counter seconds CMP.B #60,SECCNT minute over? MIN1 Yes, necessary tasks RETI return LPM3 minute elapsed: CPUoff reset, program continues after instruction that CPUoff (label TASK) MIN1 SECCNT SECCNT MINCNT Minute counter #CPUOFF,0(SP) Reset CPUoff-bit continue RETI label TASK Background part: Return LPM3 DONE #05A00h+HOLD+CNTCL,&WDTCTL Hold #CPUOFF+GIE+SCG0+SCG1,SR Enter LPM3 Program continues here CPUoff reset inside Basic Timer Handler. TASK Tasks made every minute DONE Back LPM3 1.4.3 Power Mode Power Mode (LPM4) used lowest supply current necessary timing needed desired change content allowed). This normally case storage times preceding following calibration process. Table 14.2 shows status complete MSP430 system when LPM4:
MSP430 Family
Metering Application Report
Table 14.2: System during Power Mode Active Active I/O-Ports MCLK Enabled Interrupts ACLK RESET Logic Disabled Peripherals Disabled Interrupts Watchdog Timers
When woken-up software decide necessary enter LPM4 again wakeup caused e.g.) other operating modes entered. ensure this decision code given port that checked MSP430 software: only this code present, Active Mode entered. start-up frequency approx. 500kHz; last until stable MCLK frequency reached. enter Power Mode following code necessary: Enter LPM4, enable #CPUOFF+OSCOFF+GIE+SCG1+SCG0,SR LPM4 principally same shown with LPM3. software interrupt handler decide stays active return power mode necessary. When entering LPM4 information control registers SCFI0 SCFI1 System Clock Frequency Integrator remains stored. this time ambient temperature high, register SCFI1 contains relatively high value compensate negative temperature dependence DCO. LPM4 left afterwards with very ambient temperature then possible that resulting frequency outside oscillator's range. Therefore good programming practice System Clock Frequency Integrator value before entering LPM4. Enter LPM4, enable CLRC Ensure that &SCFI1 halved number #CPUOFF+OSCOFF+GIE+SCG1+SCG0,SR Enter LPM4
Metering Application Report
MSP430 Family
ANALOG-TO-DIGITAL CONVERTERS
completely different Analog-to-Digital Converters (ADCs) used, depending MSP430 device type: MSP430C32x contains successive approximation with 12-bit resolution Nearly MSP430s contain capacitor discharge unit which allows comparison discharge times measured with resistive sensors (Universal Timer/Port Module) 14-bit Analog-to-Digital Converter 14-bit MSP430 usable different modes: 14-bit with input range complete voltage SVcc. searches automatically which four ranges currently appropriate input voltage. This searching adds ADCLK cycles conversion time. complete conversion time 14-bit conversion ADCLK cycles. ADCLK cycle equal MCLK cycles dependent bits ACTL.13 ACTL.14) 12-bit with four ranges. Each range covers fourth voltage SVcc. This conversion mode used voltage range input signal known. conversion needs ADCLK cycles. sampling input takes ADCLK cycles, this means sampling gate open during this time (12µs@1MHz). input seen pass filter: series with 42pF. 42pF capacitor (the sample-and-hold capacitor) must charged during ADCLK cycles final value measured. This means within 2-14 this value. This time limits internal resistance source measured:
42pF ADCLK
Solved with ADCLK 1MHz this results
27.4k
This means: full resolution internal resistance input signal must lower than 27.4k. resolution bits sufficient then internal resistance input source higher (ADCLK 1MHz):
285714 42pF
EXAMPLE: resolution bits, what maximum internal resistance input signal?
285714 285714 31.7k 29.7k 9.0109
MSP430 Family
Metering Application Report
internal resistance input signal must lower than 29.7k. next figure shows different methods connect analog signals MSP430: Current supply resistive sensors Voltage supply resistive sensors Direct connection input signals 4-Wire circuitry with current supply 4-Wire circuitry with voltage supply (Rsens1 (Rsens2 (Vin (Rsens3 (Rsens4
SVcc Rsens2 Rsens1 Rext
SVcc
MSP430
Rsens3
Rsens4
AGND
AGND
Figure 21.1: Possible Sensor Connections MSP430 NOTE SVcc-pin used input (external supply, ACTL.1 then external source must able deliver current max. 80µA supply ADC.
2.1.1 Current Source stable, programmable Current Source available analog inputs With programming resistor Rext between pins SVcc possible defined currents programmed analog input current directly related voltage SVcc. analog input measured analog input Current Source independent each other: this means that Current Source programmed measurement taken from shown example above (see figure 21.1). When using Current Source, possible full range ADC: only range defined with "Load Compliance" Electrical Description usable Revision 0.44, which means only ranges Current Source used with external amplifier (operational amplifier) that amplifies output signal coming from Current Source, then full range used with other input. current defined external resistor Rext
Metering Application Report
0.25 SVcc Rext
MSP430 Family
input voltage analog input with current sensor Rsens
Rsens Rsens 0.25 SVcc Rext
2.1.2 14-bit Analog-to-Digital Converter used 14-bit Mode 14-bit mode used range input voltage exceeds range. input signal range from analog ground (AVss) SVcc (AVcc).
Value 03FFFh 03000h 02000h 01000h 00000h 0.25 SVcc SVcc 0.75 SVcc SVcc Input Voltage
Figure 21.2: Complete 14-Bit Range nominal formulas 14-bit conversion are:
Vref Vref
Where:
Vref
14-bit result conversion Input voltage selected analog input Voltage SVcc (external reference internal AVcc)
current source used, above equation changes
0.25 Vref Rext Vref Rext
This gives resistor
Rext
Where:
Rext
Resistor between SVcc (defines current Ics) Resistor measured (connected between AGND)
MSP430 Family 2.1.2.1 with signed signals
Metering Application Report
MSP430 measures unsigned signals from AVss AVcc. signed measurements necessary then virtual zero-point provided. Signals above this zero-point treated positive signals; signals below treated negative ones. Three possibilities virtual zero-point shown: Virtual Ground Split power supply current source
chapter "Electricity Meters" shows applications signed measurements with ADC. Virtual Ground With "Phase Splitter" TLE2426 common reference built which lies exactly middle voltage SVcc. signed input voltages connected this virtual ground with their reference potential (0V). virtual ground voltage measured regular time intervals measured value stored subtracted from measured signal A1). This gives signed, offset corrected result input Virtual Ground method used with some electronic electricity meters shown chapter "Electricity Meters".
SVcc
-2V.+2V TLE2426 AGND DVss DVcc +2.5V MSP430
Figure 21.3: Virtual Ground Level Shifting NOTE definitions given next example valid examples which follow. They accordance with "MSP430 Family Architecture User's Guide 1995". EXAMPLE: virtual ground voltage measured stored VIRTGR. value VIRTGR subtracted from value measured input this gives signed value input. HARDWARE DEFINITIONS ANALOG-TO-DIGITAL CONVERTER .EQU 0110h INPUT REGISTER (FOR DIGITAL INPUTS) .EQU 0112h ANALOG INPUT DIGITAL INPUT
Metering Application Report ACTL VREF CSA0 CSA1 CSOFF CSON RNGA RNGB RNGC RNGD RNGAUTO ADCLK1 ADCLK2 ADCLK3 ADCLK4 .EQU .EQU .EQU .EQU .EQU .EQU .EQU .EQU .EQU .EQU .EQU .EQU .EQU .EQU .EQU .EQU .EQU .EQU .EQU .EQU 0114h 100h 000h 200h 400h 600h 800h 1000h 0000h 2000h 4000h 6000h
MSP430 Family CONTROL REGISTER: Control Bits CONVERSION START EXT. REFERENCE SVCC INPUT INPUT INPUT CURRENT SOURCE CURRENT SOURCE CURRENT SOURCE Current Source RANGE SELECT 0.25SVCC) RANGE SELECT (0.25.0.50SVCC) RANGE SELECT (0.5.0.75SVCC) RANGE SELECT (0.75.SVCC) RANGE SELECTED AUTOMATICALLY POWERED DOWN ADCLK MCLK ADCLK MCLK/2 ADCLK MCLK/3 ADCLK MCLK/4
ADAT .EQU 0118h Data Register 14-bit) IFG2 .EQU INTERRUPT FLAG REGISTER ADIFG .EQU "EOC" (IFG2.2) .EQU Interrupt Enable Register ADIE .EQU interrupt enable (IE2.2) VIRTGR .EQU Virtual Ground value MEASURE VIRTUAL GROUND INPUT STORE VALUE REFERENCE MCLK 3MHz: DIVIDE MCLK BIC.B #ADIFG,&IFG2 Reset ADC-Flag L$101 BIT.B #ADIFG,&IFG2 CONVERSION COMPLETED? L$101 Z=1: &ADAT,VIRTGR STORE 14-BIT VALUE MEASURE INPUT .03FFFh) COMPUTE SIGNED, OFFSET CORRECTED VALUE (0E000h .01FFFh). BIC.B #ADIFG,&IFG2 Reset ADC-Flag L$102 BIT.B #ADIFG,&IFG2 CONVERSION COMPLETED? L$102 Z=1: &ADAT,R5 VIRTGR,R5 READ VALUE CONTAINS SIGNED VALUE
Split Power Supply With power supplies, example with +2.5V -2.5V, potential middle range MSP430 created. signed input voltages connected this voltage with
MSP430 Family
Metering Application Report
their reference potential (0V). range voltage measured regular time intervals measured value stored subtracted from measured signal A1). This gives signed, offset corrected result input Split Power Supply method used with some Electronic Electricity Meters shown chapter "Electricity Meters".
+2.5V SVcc -2V.+2V MSP430
-2.5V AGND DVss DVcc
-2.5V
+2.5V
Figure 21.4: Split Power Supply Level Shifting same software used shown with Virtual Ground Current Source With Current Source voltage which partially completely below AGND potential shifted middle usable range MSP430. This accomplished resistor whose voltage drop shifts input voltage accordingly. This method useful especially differential measurements necessary, because value signal's midpoint available easily with methods shown previously. example below shows input signal ranging from +1V. shift signal's midpoint (0V) midpoint usable range (SVcc/4) current used. necessary current shift input signal
SVcc SVcc
includes internal resistance voltage source current current source defined
0.25 SVcc Rext
Therefore necessary shift resistor
SVcc Rext Rext 0.25 SVcc
voltage analog input
Metering Application Report
MSP430 Family
0.25 SVcc Rext
Therefore unknown voltage
0.25 SVcc 0.25 SVcc Rext Rext
SVcc Rext V1+(Iadc Iadc MSP430
.+1V AGND DVss
DVcc
Figure 21.5: Current Source Level Shifting method described used with current path MSP430 Battery Charge Meter shown chapter 2.1.2.2 Four-Wire Circuitry Sensors proven method eliminating error coming from voltage drop connection lines sensor 4-wire circuitry: instead lines, lines used, measurement current sensor voltages. These sensor lines carry current (the input current analog inputs only some nanoamps) which means that voltage drop falsifies measured values. formula voltage supply
Rsens
Where:
result input result input
MSP430 Family
Metering Application Report
SVcc Rsens AGND DVss DVcc MSP430
Figure 21.6: 4-Wire Circuitry with Voltage Supply EXAMPLE: sensor Rsens measured value resistance computed difference results measured result stored further calculations. MEASURE UPPER BIC.B L$103 BIT.B MEASURE INPUT BIC.B L$104 BIT.B VALUE Rsens INPUT STORE VALUE #ADIFG,&IFG2 Reset ADC-Flag #RNGAUTO+CSOFF+A1+VREF+CS,&ACTL #ADIFG,&IFG2 CONVERSION COMPLETED? L$103 Z=1: &ADAT,R5 STORE VALUE
COMPUTE VALUE Rsens #ADIFG,&IFG2 Reset ADC-Flag #RNGAUTO+CSOFF+A0+VREF+CS,&ACTL #ADIFG,&IFG2 CONVERSION COMPLETED? L$104 Z=1: &ADAT,R5 CONTAINS Rsens VALUE
next figure shows more common 4-wire circuitry with Current Supply:
Rsens
Rext
same software shown before used this hardware too, only Current Source must switched additionally.
Metering Application Report
MSP430 Family
Rext SVcc Rsens AGND DVss MSP430
DVcc
Figure 21.7: 4-Wire Circuitry with Current Supply 2.1.2.3 Referencing with Reference Resistors system that uses sensors normally needs calibrated, tolerances sensors themselves ADC. omit this costly calibration procedure reference resistors. different methods used, depending type sensor: Platinum sensors: these sensors with precisely known temperature-resistance characteristic. Precision resistors used with sensor resistances temperatures limits range. Other sensors: nearly other sensors have insufficiently close tolerances. This makes necessary group sensors with similar characteristics, select reference resistors according upper lower limits these groups. reference resistors have precisely values sensors range limits other well-defined points) then tolerances eliminated during calculation. formula shown below.
SVcc Rext MSP430 AGND DVss
Rref1
Rsens1 Rsens2 Rref2
DVcc
Figure 21.8: Referencing with Precision Resistors nominal formulas given previous section need changed offset slope considered. value given resistor now:
MSP430 Family
Metering Application Report
0.25 Slope ffset Rext
With known resistors Rref1 Rref2 possible calculate slope offset values unknown resistors exactly. result solved equations gives:
Nref2 (Rref2 Rref1) Rref2 Nref2 Nref1
Where:
Nref1 Nref2 Rref1 Rref2
conversion result conversion result Rref1 conversion result Rref2 Resistance Rref1 Resistance Rref2
shown only known measurable values needed computation from Slope offset influences disappear completely. 2.1.2.4 Interrupt Handling software examples shown above polling techniques check conversion completion. This takes computing power which used otherwise interrupt techniques used. EXAMPLE: Analog input (without Current Source) (with Current Source) measured alternately. measured 14-bit results stored address MEAS0 MEAS1 background software uses these measured values sets them 0FFFFh after use. time interval between measurements defined 8-bit timer: every timer interrupt starts conversion prepared analog input. HARDWARE DEFINITIONS EXAMPLE ANALOG INPUT CURRENT SOURCE RESULT MEAS0 MEAS1 RANGE SELECTION AUTO AUTO REFERENCE SVCC SVCC INITIALIZATION PART ADC: #RNGAUTO+CSOFF+A0+VREF,&ACTL BIS.B #ADIE,&IE2 ENABLE INTERRUPT #0FFh-3,&AEN ONLY ANALOG INPUTS INITIALIZE OTHER MODULES INTERRUPT HANDLER: MEASURED ALTERNATING next measurement prepared started. AD_INT #A1,&ACTL RESULT ADAT? &ADAT,MEAS0 VALUE ACTUAL
Metering Application Report RETI RETI #RNGAUTO+CSON+A1+VREF,&ACTL
MSP430 Family NEXT MEAS.
&ADAT,MEAS1 VALUE ACTUAL #RNGAUTO+CSOFF+A0+VREF,&ACTL NEXT MEAS.
8-BIT TIMER INTERRUPT HANDLER: CONVERSION STARTED PREPARED INPUT T8BINT #CS,&ACTL START CONVERSION other tasks RETI .SECT "INT_VEC0",0FFEAh INTERRUPT VECTORS .WORD AD_INT INTERRUPT VECTOR; .SECT "INT_VEC1",0FFF8h .WORD T8BINT 8-BIT TIMER INTERRUPT VECTOR EXAMPLE: best results switched during measurements. measurement subroutine starts conversion switches afterwards. interrupt routine called conversion completion resets CPUoff stored allows continue with measured ADC-result. CPUoff .equ EINT BIS.B BIC.B CALL 010h
Enable interrupt #ADIE,&IE2 Intrpt Enable #ADIFG,&IFG2 Reset ADC-Flag #RNGAUTO+CSOFF+A1+VREF,&ACTL Define #MEASURE Measure with &ADAT,R5 Result Process result
Subroutine: switched minimize noise MEASURE BIS.B #CS,&ACTL Start conversion BIS.B #CPUoff,SR Switch Wait completion Interrupt Handler Analog-to-Digital Converter CPUoff saved cleared allow software continue after RETI ADC_INT BIC.B #CPUoff,0(SP) Allow (CPUoff RETI Interrupt Vectors .sect "INT_VEC1",0FFEAh .WORD ADC_INT Vector
MSP430 Family 2.1.2.5 Enlargement 16-bit Mode
Metering Application Report
With additional output pins (I/O-ports TP.x) 14-bit enlarged bits. principle simple: resistor Rext Current Source modified paralleling additional resistors (see figure 21.10). These resistors have values that represent half quarter ADC-step. fact that these fractions step accurate only point ADC-range, this enlargement gives only better resolution, better accuracy. 16-bit result, four measurements necessary: every combination additional resistors. result these four measurements added together, 16-bit result reached. following figure shows this.
Value XXXX+1
XXXX
00000h
Input Voltage
Figure 21.9: Dividing ADC-Step into four Steps Table 21.1 shows different results these four measurements depending four possible input voltages inside ADC-step: table refers hardware shown figure 21.10. Table 21.1: Measurement Results 16-Bit Method Measurem. Measurem. Measurem. Measurem. TP.1 Hi-Z TP.1 Hi-Z TP.1 TP.1 TP.0 Hi-Z TP.0 TP.0 Hi-Z TP.0 XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX+1 XXXX XXXX XXXX+1 XXXX+1 XXXX XXXX+1 XXXX+1 XXXX+1
Input Voltage
Mean Value (Binary)
XXXX.00 XXXX.01 XXXX.10 XXXX.11
Metering Application Report
MSP430 Family
TP.x
Rext
TP.0 TP.1 SVcc
Rsens MSP430C32x
AGND DVss DVcc
Figure 21.10: Hardware 16-bit values resistors are:
0.25 Rsens0 Rsens0
Where:
Rsens0
Parallel resistor Rext Value sensor point highest accuracy Fraction step (0.25 0.5) caused alone
Theoretical Accuracy 16-bit Mode give impression much better results 16-bit mode compared 14bit mode ADC, results four different calculations shown table 21.2. table shows statistical results deviations correct result ADC-steps:
first column shows statistical results normal 14-bit second column shows statistical results measurements that have highest accuracy lowest sensor value: Rsens0 1000 third column shows statistical values point highest accuracy moved midpoint sensor resistance: Rsens0 1190 fourth column shows same before highest sensor value used highest accuracy: Rsens0 1380
Calculation values explanations: Rsensmax: Rsensmin: Rsens: Rext: Rsens0: R14: R15: 1380.0 1000.0 0.01 690.0000 Highest sensor resistance (+100°C PT1000) Lowest sensor resistance (0°C PT1000) Step width resistance value during calculation Calculated external resistor current source Sensor resistance highest accuracy different values) Calculated resistor 15th Same above 16th
MSP430 Family
Metering Application Report
Item
Table 21.2: Measurement Results different 16-Bit Corrections 14-Bit Rsens0 Rsens0 1000 1190 n.a. 8.2M 9.7M n.a. 16.4M 19.5M -0.5001 -0.0538 -0.1250 Mean Value 0.2887 0.1019 0.0841 Standard Deviation 0.0833 0.0104 0.0071 Variance
Rsens0 1380 11.3M 22.6M -0.1767 0.0898 0.0081
Table 21.2 shows better resolution especially best resolution programmed lowest sensor resistance (Rsens0 1000). result derived from 38,000 measurements with step width 0.01. 14-bit results show (correct) inherent error minus half step that enhanced with three 16-bit modes factor EXAMPLE: With hardware shown figure 21.10 16-bit measurement made. result placed into software written with loop too. software assumes ascending order outputs. CSA1 .EQU 040h Current Source .EQU 04Eh Address data register .EQU 04Fh Address enable register .EQU address TP.0 .EQU address TP.1 BIC.B #TP1+TP0,&TPE TP.0 TP.1 Hi-Z BIS.B #TP1+TP0,&TPD TPD.0 TPD.1 CALL #MEASA1 Measure with Hi-Z &ADAT,R5 14-bit value result ADD.B #TP0,&TPE Hi-Out CALL #MEASA1 Measure &ADAT,R5 14-bit value result ADD.B #TP0,&TPE Hi-Out, Hi-Z CALL #MEASA1 Measure &ADAT,R5 14-bit value result ADD.B #TP0,&TPE Hi-Out CALL #MEASA1 Measure &ADAT,R5 14-bit value result BIC.B #TP1+TP0,&TPE 16-Bit result TP.n Measurement Subroutine input MEASA1 BIC.B #ADIFG,&IFG2 Reset ADC-Flag #RNGAUTO+CSA1+A1+VREF+CS,&ACTL Start Def. L$101 BIT.B #ADIFG,&IFG2 CONVERSION COMPLETED? L$101 Z=1: Return with result ADAT 2.1.3 14-bit Analog-to-Digital Converter used 12-bit Mode This mode used range input voltage known. example, temperature sensor used whose signal range always fits into range (for example range then 12-bit mode
Metering Application Report
MSP430 Family
right selection. measurement time with MCLK 1MHz only 96µs compared with auto ranging mode used. following figure shows four ranges compared SVcc.
Value 0FFFh 0C00h 0800h 0400h 00000h Underflow 0.25 SVcc SVcc 0.75 SVcc SVcc Input Voltage Overflow
Figure 21.11: four Single Ranges NOTE results 0000h 0FFFh mean underflow overflow: voltage measured analog input below above limits addressed range. Figure 21.12 shows ranges appears software:
Value 0FFFh
0,1,2,3 Range Constant 0800h
Range 0000h
Range
Range Input Voltage
(n-1) 0.25 SVcc
0.25 SVcc
SVcc
Figure 21.12: Single Range possible ways connect sensors MSP430 same shown 14-bit ADC:
MSP430 Family
Metering Application Report
SVcc Rsens2 Rsens1 Rext
SVcc
MSP430
Rsens3
Rsens4
AGND DVss
AGND DVcc
Figure 21.13: Possible Sensor Connections MSP430 12-bit nominal formulas 12-bit conversion are:
0.25 Vref Vref 0.25 Vref
where:
Vref
12-bit result conversion Input voltage selected analog input Voltage SVcc (external reference internal AVcc) Range constant 0,1,2,3 ranges A,B,C,D)
formula resistor (Rsens2 above figure) which connected Vref resistor
Vref 0.25 Vref Vref
current source used Rsens1 above figure), above equation changes
0.25 Vref 0.25 Vref Rext Rext Vref
This gives unknown resistor
Rext
where: Rext Resistor between SVcc (defines current ICS) Resistor measured (connected AGND)
2.1.3.1 with signed signals Only Current Source method applicable signed signals have measured:
Metering Application Report
MSP430 Family
Normal phase splitter circuits able shift virtual ground into middle range (0.125 SVcc) (0.375 SVcc), necessary here. split power supply method would need different voltages zero point into middle range (0.625V/4.375V) range (1.875V/3.125V)
signed signals necessary shift input signal middle range range (0.375 SVcc) used necessary shift resistor figure 21.14.
SVcc Rext V1+(Iadc Iadc MSP430
.+1V AGND DVss
DVcc
Figure 21.14: Current Source Level Shifting
0.375 SVcc Rext Rext 0.25 SVcc
unknown voltage referred zero point middle range
With above equations this leads
0.25 SVcc Rext
2.1.3.2 Interrupt Handling software same 14-bit conversion. only difference omission RNGAUTO during initialization ACTL. Instead desired range included into initialization part each measurement. EXAMPLE: Analog input (without Current Source, always range external reference SVcc) (with Current Source, always range have measured alternately. measured 12-bit results have stored address MEAS0 MEAS1 background software uses these measured values sets them 0FFFFh after use. time interval between measurements defined 8-bit timer: Every timer interrupt starts conversion prepared analog input.
MSP430 Family
Metering Application Report
HARDWARE DEFINITIONS EXAMPLE ANALOG INPUT CURRENT SOURCE RESULT MEAS0 MEAS1 RANGE REFERENCE EXTERNAL SVCC INITIALIZATION PART ADC: #RNGB+CSOFF+A0,&ACTL BIC.B #ADIFG,&IFG2 Reset ADC-Flag BIS.B #ADIE,&IE2 ENABLE INTERRUPT #0FFh-3,&AEN ONLY ANALOG INPUTS INITIALIZE OTHER MODULES INTERRUPT HANDLER: MEASURED ALTERNATING next measurement prepared started AD_INT #A1,&ACTL MEASURED &ADAT,MEAS0 VALUE ACTUAL #RNGA+CSA1+A1+VREF,&ACTL NEXT MEAS. RETI RETI &ADAT,MEAS1 VALUE #RNGB+CSOFF+A0,&ACTL NEXT MEASUREMENT
8-BIT TIMER INTERRUPT HANDLER: CONVERSION STARTED addressed INPUT T8BINT #CS,&ACTL START CONVERSION RETI .SECT "INT_VECT",0FFEAh INTERRUPT VECTORS .WORD AD_INT INTERRUPT VECTOR; .SECT "INT_VECT",0FFF8h .WORD T8BINT 8-BIT TIMER INTERRUPT VECTOR EXAMPLE: best results switched during measurements. measurement subroutine starts conversion switches afterwards. interrupt routine caused conversion completion resets CPUoff stored allows continue with measured ADC-result. CPUoff RNGB .equ .equ .equ EINT BIS.B 010h 008h 0200h General Intrpt enable ACTL: Select Range
Enable interrupt #ADIE,&IE2 Intrpt Enable #RNGB+CSOFF+A1+VREF,&ACTL Define
Metering Application Report CALL #MEASURE &ADAT,R5 Measure with Result Process result
MSP430 Family
Subroutine: switched minimum noise MEASURE BIS.B #CS,&ACTL Start conversion BIS.B #CPUoff,SR Switch Wait completion Interrupt Handler Analog-to-Digital Converter CPUoff saved cleared allow software continue after RETI ADC_INT BIC.B #CPUoff,0(SP) Allow (CPUoff RETI Interrupt Vectors .sect "INT_VEC1",0FFEAh .WORD ADC_INT Vector 2.1.4 Connection long Sensor Lines distance from MSP430 sensor long (>30cm) then recommended shielded cable between microcomputer sensor. This avoid spikes input that will cause measurement errors also gives protection input. Figure 21.15 shows this schematic left hand side. same Four-Wire-Circuitry connected MSP430. shielded cable cannot used circuitry shown right hand side Figure 21.15 should used: AGND line parallel signal line gives relative good screening. Twisting lines increases protection. protect measurement against spikes, other unwanted noise chapter "Signal Averaging Noise Cancellation": this chapter shows possibilities minimization these influences software.
MSP430 Family
Metering Application Report
SVcc Rv/2 Long Cable Rsens
SVcc Rsens Long Cable
MSP43032x Shield Shield Rv/2 AGND DVss AGND DVcc
Shield, twisted pair
Figure 21.15: Sensor Connection Long Cables with Voltage Supply 2.1.5 Grounding correct grounding very important ADCs with high resolution. There some basic rules that need observed. Rules separated analog digital ground pins: AVss DVss pins existent separate analog digital ground plane wherever possible: thin connections from battery DVss AVss AVss star point analog ground connections. DVss star point digital ground connections. Battery storage capacitor connected close together (this capacitor needed batteries with relatively high internal resistance). From this capacitor different paths analog digital supply pins. small capacitors connected across digital (Cd) analog (Ca) supply pins. figure 21.16. mentioned points above also true pathes (DVcc AVcc). AVss DVss pins must connected together externally, they connected internally. same true AVcc DVcc pins. coil needed only very difficult cases.
Metering Application Report
MSP430 Family
SVcc Rext Rsens2 Rsens1 MSP430C32x
AVss AVcc
DVss
DVcc
other analog parts AGND Metallization
other digital parts
Battery
Figure 21.16: 14-Bit Grounding (Separate Supply Connections) metallized case used around printed circuit board containing MSP430 then very important connect metallization ground potential (0V) board. Otherwise behavior worse than without metallization. 2.1.6 Connection Current consuming Loads SVcc current drawn analog part exceeds then external switch switched analog voltage should considered. simple transistor used this purpose. external analog voltage which reduced saturation voltage VCEsat transistor (approx. 200mV) connected SVcc MSP430C32x. SVcc used input external reference voltage (ADC control ACTL.1 This method allows full accuracy analog-to-digital converter also with current consuming loads. Output TP.0 switches power current consuming loads. schematic shown figure 21.17 simplified clearness. connection principle shown figure 21.16 needs applied especially with larger currents used here.
MSP430 Family
Metering Application Report
+5V/3V
SVcc Rext Analog Circuit Rsens2 Rsens1 TP.0
AVcc
DVcc
MSP430C32x
AVss
DVss
Current consuming analog parts 8mA)
Figure 21.17: Connection current consuming Loads SVcc
Universal Timer/Port Module used function Universal Timer/Port Module completely different from 14-bit ADC: discharge times capacitor different resistors measured compared.
SVcc
tref tsens Time
Figure 22.1: Timing Universal Timer/Port Module where: tref tsens Threshold voltage comparator Discharge time with reference resistor Rref Discharge time with sensor Rsens Charge time capacitor
solving exponential equation leads simple equation below:
Metering Application Report
Rsens tsens tsens Rsens Rref Rref tref tref
MSP430 Family
With known reference resistors Rref1 Rref2 possible compute slope offset values unknown resistors exactly. result solved equations gives:
Rsens tsens tref2 (Rref2 Rref1) Rref2 tref2 tref1
where:
tsens tref1 tref2 Rref1 Rref2
Discharge time sensor Rsens Discharge time Rref1 Discharge time Rref2 Resistance reference resistor Rref1 Resistance reference resistor Rref2
shown only known measurable values needed computation Rsens from tsens. Slope offset measurement disappear completely. resolution bits, capacitor must have minimum capacity:
[Hz]
Where:
Rxmin Vthmax
Measurement frequency (ACLK MCLK) Lowest resistance sensor reference resistor Ohms Maximum value threshold voltage
EXAMPLE: Universal Timer Port without interrupt. measured values sensors Rsens1 Rsens2 reference resistors Rref1 Rref2 stored starting label MSTACK (Rref1 location). error occurs, 0FFFFh written location.
MSP430
Enable Control TPIN.5 TPD.5 TPE.5 TPD.4 TPE.4 TPD.3 TPE.3 TPD.2 TPE.2 TPD.1 TPE.1 TPD.0 TPE.0
TP.5
TP.4 Rref1
TP.3
TP.2
TP.1
TP.0 Rref2
Rsens1
Rsens2
Figure 22.2: Schematic Example
MSP430 Family
Metering Application Report
DEFINITION PART UT/PM TPCTL .EQU 04Bh TIMER PORT CONTROL REGISTER TPSSEL0 .EQU 040h TPSSEL.0 .EQU 020h CONTROLS TPCNT1 .EQU 010h .EQU 008h ENABLE INPUT TPCNT1 RC2FG .EQU 004h RIPPLE CARRY TPCNT2 EN1FG .EQU 001h FLAG TPCNT1 .EQU 04Ch 8-BIT COUNTER/TIMER TPCNT2 .EQU 04Dh 8-BIT COUNTER/TIMER .EQU 04Eh DATA REGISTER .EQU 080h SEPARATE TIMERS 16-BIT TIMER CPON .EQU 040h COMP COMP TPDMAX .EQU 008h POSITION OUTPUT TPD.MAX .EQU 04Fh DATA ENABLE REGISTER MSTACK .EQU 0240h Result stack word .EQU 011h TPCNT2 VALUE CHARGING MEASUREMENT SUBROUTINE WITHOUT INTERRUPT. TPD.4 TPD.5 USED THEREFORE OVERWRITTEN INITIALIZATION: STACK INDEX START WITH TPD.3 16-BIT TIMER, MCLK, ENABLES COUNTING Call: CALL #MEASURE Return: Results TP.3 TP.0 MSTACK MSTACK+6 Result 0FFFFh error MEASURE PUSH.B #TPDMAX START WITH SENSOR TPD.MAX INDEX RESULT STACK MEASLOP MOV.B #(TPSSEL0*3)+ENA,&TPCTL Reset flags CAPACITOR CHARGED TAU. OUTPUTS USED MOV.B #B16+TPDMAX-1,&TPD SELECT CHARGE OUTPUTS MOV.B #TPDMAX-1,&TPE ENABLE CHARGE OUTPUTS MOV.B #NN,&TPCNT2 LOAD NEG. CHARGE TIME MLP0 BIT.B #RC2FG,&TPCTL CHARGE TIME ELAPSED? MLP0 CONTINUE WAITING MOV.B @SP,&TPE ENABLE ONLY ACTUAL SENSOR CLR.B &TPCNT2 CLEAR BYTE TIMER SWITCH INTERRUPTS OFF, ALLOW NON-INTERRUPTED START TIMER CAPACITY DISCHARGE DINT ALLOW NEXT INSTRUCTIONS CLR.B &TPCNT1 CLEAR BYTE TIMER BIC.B @SP,&TPD SWITCH ACTUAL SENSOR
Metering Application Report MOV.B EINT
MSP430 Family
#(TPSSEL0*3)+ENA+ENB,&TPCTL Reset flags COMMON START TOOK PLACE
Wait until (EN1 overflow error (RC2FG MLP1 BIT.B #RC2FG,&TPCTL Overflow (broken sensor)? MERR Yes, error handling BIT.B #EN1,&TPCTL Ucomp? MLP1 WAIT Conversion: Store result MSTACK Address next sensor, addressed: reached MOV.B &TPCNT1,MSTACK(R5) STORE RESULT STACK MOV.B &TPCNT2,MSTACK+1(R5) BYTE L$301 INCD ADDRESS NEXT WORD RRA.B NEXT OUTPUT TPD.x MEASLOP C=1: FINISHED INCD HOUSEKEEPING: TPDMAX STACK ERROR HANDLING: ONLY OVERFLOW POSSIBLE (BROKEN SENSOR 0FFFFh WRITTEN RESULT SUBROUTINE CONTINUED MERR #0FFFFh,MSTACK(R5) Overflow L$301 2.2.1 Interrupt Handling Universal Timer/Port Module used applications that need accuracy greater than bits then digital noise generated running strong influence result. flag hardware register TPCTL polled software indication completed conversion then results normally different: they show wide distribution that reflects length polling loop i.e. results concentrated evenly spaced numbers with nothing between. avoid this effect switched during conversion woken-up completion conversion interrupt. With this method adequate hardware, results with much better accuracy possible. influence digital noise shown Figure 22.3. exponential discharge curve relatively flat nearby comparator threshold Vth. Therefore noise coming from other sources non-wanted noise) undergo threshold voltage terminate conversion: result timer value tdcw. correct value would tdcc. resulting error Ecnv
tdcw tdcc tdcc Resulting measurement time caused noise Correct measurement time Ecnv
Where:
tdcw tdcc
MSP430 Family
Metering Application Report
tdcw tdcc Time
Figure 22.3: Noise Influence during Measurement EXAMPLE: hardware schematic shown Figure 22.4. resistive temperature sensors used (Rmeas0 Rmeas1) reference resistors (Rref0 Rref1) that have resistance sensors lower resp. upper measurement range resistor Rcharge that used only charge-up capacitor This charge resistor only necessary sensors have resistance (100 approx.) otherwise reference resistors used charging.
Rref0 TP.0 Rmeas0 TP.1 Rmeas1 TP.2 Rref1
MSP430x3xx
TP.3
Rcharge TP.4
AGND
Figure 22.4: Hardware Schematic Interrupt Example example software works with status byte MEASSTAT that defines current operation: normally this byte zero which indicates activity" after complete measurement sequence "conversions made". reference resistors temperature sensors measured after other: Rref0 first, then Rmeas0, then Rmeas1 finally Rref1. measured discharge times direct measure relative resistance) placed successive words starting label ADCRESULT.
Metering Application Report
MSP430 Family
First these words zero value impossible measurement result). error occurs zero value indicates erroneous result. Basic Timer programmed 0.5s interrupt timing. measurement sequence shown figure 22.5. This sequence shortened reference resistor sensor well enlarged four sensors reference resistors: only necessary delete charging measurement states according software parts. modulation mode switched during measurement have exactly same MCLK during four measurements. Status switches modulation mode again. shown software usable MSP430C31x MSP430C32x. different interrupt enable bits different addresses interrupt vectors used correctly definition software switch "Type": this switch defined "310" MSP430C31x used otherwise MSP430C32x used.
0.5s CPUoff Measure activity Charge Rref0 Measure Charge Rmeas0 Measure Charge Rmeas1 Measure Charge Rref1 Conversions made
Status
Figure 22.5: Measurement Sequence Definitions MSP430 hardware Type .equ 310: MSP43C31x others BTCTL .equ 040h Basic Timer: Control Reg. BTCNT1 .equ 046h ;.Counter BTCNT2 .equ 047h Counter BTIE .equ 080h Intrpt Enable .equ 020h BTCTL: xCLK/256 .equ 004h BTCTL: Clock Divider2 .equ 001h Clock Divider0 SCFQCTL .equ 052h Control Register .equ 080h Modulation Bit: CPUoff .equ 010h .equ 008h General Intrpt enable TPCTL .equ 04Bh Timer Port: Control Reg. TPCNT1 .equ 04Ch Counter Reg.Lo TPCNT2 .equ 04Dh Counter Reg.Hi .equ 04Eh Data Reg. .equ 04Fh Enable Reg. Type=310 MSP430C31x? TPIE .equ 004h ADC: Intrpt Enable .else TPIE .equ 008h MSP430C32x configuration
MSP430 Family .endif .equ .equ .equ .equ .equ .equ .equ .equ .equ .equ
Metering Application Report
TPSSEL1 TPSSEL0 RC2FG RC1FG EN1FG
001h 080h 040h 020h 010h 008h 004h 002h 001h 080h
Intrpt Enable Byte Selects clock input (TPCTL) Selects clock gate (TPCTL) Gate TPCNTx (TPCTL) Carry counter (TPCTL) Carry counter (TPCTL) Conversion Flag 16-bit counter (TPD)
Rref0 .equ 001h TP.0: Reference Resistor Rmeas0 .equ 002h TP.1: Sensor0 Rmeas1 .equ 004h TP.2: Sensor1 Rref1 .equ 008h TP.3: Reference Resistor Rcharge .equ 010h TP.4: Charge Resistor Definitions ADCRESULT .equ 0200h results words) MEASSTAT .equ ADCRESULT+8 Measurement Status Byte .sect "INIT",0F000h Initialization Section INIT #0300h,SP Initialize Stack Pointer MOV.B #DIV+IP2+IP0,&BTCTL Basic Timer: BIS.B #BTIE,&IE2 Basic Timer Intrpt Enable CLR.B &BTCNT1 Clear Basic Timer Regs. CLR.B &BTCNT2 CALL #CLRRAM Clear Initialize other Modules MAINLOOP Main loop program It's time measure sensors MOV.B #1,MEASSTAT Activate Measurement MEASURE Measurement Part; Measurement Part: switched avoid noise that would falsify measurements. Interrupt used indicate conversion (and wake-up CPU). program remains until MSTAT9 clears CPUoff-bit stored stack. MEASURE ADCRESULT Clear result buffers ADCRESULT+2 indicates error ADCRESULT+4 ADCRESULT+6
Metering Application Report
MSP430 Family
#CPUoff+GIE,SR off, MCLK Wait meas. Process meas. data
Interrupt Handler Basic Timer Interrupt: BT_INT PUSH Save Help Register CALL #INCRWTCH Incr. Watch MOV.B MEASSTAT,R5 Calculate Handler MOV.B TABLE(R5),R5 Offset R5,PC Offset TABLE .BYTE MSTAT0-TABLE activity .BYTE MSTAT1-TABLE Charge Rref0 .BYTE MSTAT2-TABLE Measure Rref0 .BYTE MSTAT1-TABLE Charge Rmeas0 .BYTE MSTAT4-TABLE Measure Rmeas0 .BYTE MSTAT1-TABLE Charge Rmeas1 .BYTE MSTAT6-TABLE Measure Rmeas1 .BYTE MSTAT1-TABLE Charge Rref1 .BYTE MSTAT8-TABLE Measure Rref1 .BYTE MSTAT9-TABLE Finished, MSTAT1 MOV.B #B16+Rcharge,&TPD Charge 0.5s MOV.B #Rcharge,&TPE Rcharge BT_RET MSTAT2 #Rref0,R5 Measure Rref0 MEASCOM common Part MSTAT4 #Rmeas0,R5 Measure Rmeas0 MEASCOM common Part MSTAT6 #Rmeas1,R5 Measure Rmeas1 MEASCOM common Part MSTAT8 #Rref1,R5 Measure Rref1 MEASCOM BIS.B #MOD,&SCFQCTL Switch Modulation CLR.B &TPE TP.x HI-Z MOV.B #B16,&TPD TP.x (disabled!) MCLK ADC, Clear Flags RC2FG, RC1FG, EN1FG MOV.B #TPSSEL1+ENB+ENA,&TPCTL CLR.B &TPCNT1 Reset Counter CLR.B &TPCNT2 Reset Counter BIS.B R5,&TPE Enable selected TP.x MCLK Comparator Intrpt MOV.B BIS.B #TPIE,&IE2 Enable Intrpt BT_RET MEASSTAT next Status
MSP430 Family MSTAT0 RETI
Metering Application Report activity necessary
MSTAT9: Measurements completed, switched MSTAT zero: activity MSTAT9 #CPUoff,2(SP) Stored stack CLR.B MEASSTAT activity BIC.B #MOD,&SCFQCTL Switch Modulation MSTAT0 Return Basic Timer Handler Interrupt Handler Analog-to-Digital Converter results TPCNT1 TPCNT2 stored starting label ADCRESULT (result Rref0) ADC_INT PUSH Save Help Register MOV.B MEASSTAT,R5 Build offset results #3,R5 Status Rref0 ADC_F MEASSTAT error Check correct result: RC2FG Overflow counter high) False interrupt, conversion finished BIT.B #RC2FG+EN1,&TPCTL Error? ADC_RET Yes, error MOV.B &TPCNT1,ADCRESULT(R5) Store result MOV.B &TPCNT2,ADCRESULT+1(R5) ADC_RET BIC.B #TPIE,&IE2 Disable Intrpt BIC.B #RC2FG+RC1FG+EN1FG,&TPCTL Flags ADC_F Restore RETI Universal Timer/Port Module Handler Interrupt vectors .sect "INT_VECT",0FFE2h .WORD BT_INT Basic Timer Vector Type=310 .sect "INT_VEC1",0FFEAh MSP430C31x .else .sect "INT_VEC1",0FFE8h Others .endif .WORD ADC_INT Timer Port Vector (31x) .sect "INT_VEC2",0FFFEh .WORD INIT Reset Vector
Metering Application Report 2.2.2 Connection long Sensor Lines
MSP430 Family
distance from MSP430C31x sensor long (>30cm) then recommended shielded lead between microcomputer sensor. This give protection input. Figure 22.6 shows schematic. protection resistors Rv/2 need included into calculation: they connected series with sensor. protect measurement against spikes, other unwanted noise chapter "Signal Averaging": here some possibilities minimization these influences shown. Depending actual application omission resistors Rv/2 give best results: relatively internal resistance TP.x output capacitor alone this. shielded cable possible then twisted cable three-core cable should used: unused wire connected shown figure 22.6 with Rsens2.
Rref Shield Rv/2 Rsens1 Shield Rsens2 TP.2 Line shield, twisted wires Rv/2 TP.0 MSP430C31x TP.1
Figure 22.6: Connection long Sensor Lines 2.2.3 Grounding correct grounding very important ADCs with high resolution used. There some basic rules that need observed. With MSP430C31x MSP430C33x only exists common reference point. separate analog digital ground planes wherever possible: thin connections from battery star point connections Battery capacitor connected together this star point. figure 22.7. common path analog digital signals
MSP430 Family
Metering Application Report
Rref TPD.0 Rsens1 TPD.1 Battery Replacement other parts metallization AGND Rsens2 MSP430C31x TPD.2 other parts
Figure 22.7: Grounding Universal Timer/Port Figure 22.7 shows also mains driven power supply: connections connected where battery connected normally. capacitor across MSP430 pins smaller power supply used. metallized case used around printed circuit board containing MSP430 then very important connect metallization ground potential (0V) board. Otherwise behavior worse than without metallization. 2.2.4 Voltage Measurement with Universal Timer Port/Module measurement restricted voltage range possible with Universal Timer/Port Module: normally second circuit used this purpose. application shown measurement accumulator voltage. output TP.4 SCHMITT-Trigger input TP.5 (having same characteristic like input CIN) used. this separation sensitive measurement temperature disturbed. circuitry shown figure 22.8 right hand side.
Vbatt 14.5V) 32kHz TP.0 TP.1 MSP430 Rref Rsens TP.4 Battery Circuit Temperature Circuit TP.5 P0.2 P0.1 500k
Figure 22.8: Measurement Battery Voltage Temperature
Metering Application Report
MSP430 Family
measurement sequence follows (the numbers refer Conversion States shown figure 22.9): TP.4 switched Hi-Z, TP.5 input direction input TP.5 does have potential then capacitor charged with resistor until TP.5 shows potential discharged Vbatt resistors discharged lower threshold voltage resistor necessary time tVbatt measured 16-bit timer Timer Port Module charged resistor discharged resistor necessary time tVcc measured 16bit timer Timer Port Module battery voltage Vbatt calculated with formula:
(R1+R2)/R2 Vbatt Conversion States
tbatt tcharge tVcc Time
Figure 22.9: States Voltage Measurement
Vbatt
tbatt tVcc
Where:
Vbatt tbatt tVcc
Supply voltage MSP430 (used reference) Voltage accumulator Discharge time from divided Vbatt VTDischarge time from VTTime constant discharge circuit: Lower threshold voltage input TP.5
interesting voltage range battery 14.5V) supply voltage exponential characteristic above function simulated hyperbolic function (with only division necessary):
Vbatt (tbatt tVcc)
hardware shown figure 22.8 formula results
Vbatt 2.2277E 10.49435 (tbatt tVcc) 8.738E
MSP430 Family
Metering Application Report
MSP430 Floating Point Package used calculation. restriction input voltage range voltage (seen after resistor divider)
Metering Application Report
MSP430 Family
HARDWARE APPLICATIONS
I/O-Port Usage I/Os Port0, Port1 Port2 have very useful feature: each interrupt capability leading trailing edge input signal. This following advantages: More than interrupt input available Eight resp. external events wake-up from Power Modes glue logic necessary most applications: inputs observed without need gates connecting them single interrupt input. Wake-up possible input state (high low) edge-triggering interrupts external switch-off logic necessary input signals that long duration: multiple interrupt possible therefore. 3.1.1 General Usage peripheral registers control activities each I/O-ports Port0, Port1 Port2: Table 31.1: I/O-Port0 Registers Usage Signals I/O-pins Content output buffer Input Output interrupt pending Interrupt pending high causes Intrpt High causes Intrpt Disabled Enabled
Register Input Register Output Register Direction Register Interrupt Flags Interrupt Edges Interrupt Enable
State after Reset Signals I/O-pins Unchanged Reset input direction Reset Unchanged Reset
interrupt vectors, flags peripheral addresses I/O-port are: Table 31.2: I/O-Port0 Hardware Addresses Name Mnemonic Address Contents Input Register P0IN 010h P0IN.7 P0IN.0 Output Register P0OUT 011h P0OUT.7 P0OUT.0 Direction Register P0DIR 012h P0DIR.7 P0DIR.0 Interrupt Flags P0IFG 013h P0IFG.7 P0IFG.2 IFG1.3 002h P0IFG.1 IFG1.2 002h P0IFG.0 Interrupt Edges P0IES 014h P0IES.7 P0IES.0 Interrupt Enable P0IE 015h P0IE.7 P0IE.2 IE1.3 000h P0IE.1 IE1.2 000h P0IE.0 other ports organized same except following items: Port3 Port4 have interrupt capability: PxIFG, PxIES PxIE exist
Vector -0FFE0h 0FFF8h 0FFFAh
MSP430 Family
Metering Application Report
Port1 Port2 contain eight equal I/Os, special hardware bits implemented.
EXAMPLE: I/O-ports P0.0 P0.3 used input only. P0.4 P0.7 outputs, initially level. conditions are: P0.0 Every change counted P0.1 Hi-Lo change counted P0.2 Lo-Hi change counted P0.3 Every change counted definitions .BSS P0_0CNT,2 Counter P0.0 .BSS P0_1CNT,2 Counter P0.1 .BSS P0_2CNT,2 Counter P0.2 .BSS P0_3CNT,2 Counter P0.3 Initialization Port0 MOV.B #000h,&P0OUT Output register MOV.B #0F0h,&P0DIR P0.4 P0.7 outputs MOV.B #00Bh,&P0IES P0.0 P0.3 Hi-Lo, P0.2 Lo-Hi MOV.B #00Ch,&P0IE P0.2 P0.3 interrupt enable BIS.B #00Ch,&IE1 P0.0 P0.1 interrupt enable Interrupt handler P0.0. Every change counted P0_0HAN P0_0CNT Flag reset automatically XOR.B #1,&P0IES Change edge select RETI Interrupt handler P0.1. Hi-Lo change counted P0_1HAN P0_1CNT Flag reset automatically RETI Interrupt handler P0.2 P0.3 flags read transitions reset. Transitions occurring during interrupt routine cause interrupt after RETI P0_23HAN PUSH Save MOV.B &P0FLG,R5 Copy interrupt flags BIC.B R5,&P0FLG Reset read flags #4,R5 P0.2 flag carry P0_2CNT carry counter #8,R5 P0.3 flag carry L$304 P0_3CNT P0.3 changed XOR.B #8,P0IES Change edge select L$304 Restore RETI
Metering Application Report .SECT .WORD .WORD .SECT .WORD "INT_VECT1",0FFE0h P0_23HAN "INT_VECT",0FFF8h P0_1HAN P0_0HAN
MSP430 Family
P0.1 INTERRUPT VECTOR; P0.0 INTERRUPT VECTOR; P0.2/7 INTERRUPT VECTOR
3.1.2 Zero Crossing Detection With external components shown figure 31.1 possible build zero crossing input MSP430. components shown designed external voltage Vmains 230V. With circuit capacitance (wiring, diodes) 30pF shown, following delays will occur (all values Vmains 230V, 50Hz, +5V) (timing µs):
Vmains Protection Diodes MSP430 30pF Vportx Portx
Figure 31.1: MSP430 Input Zero-Crossing
Port Input Voltage
Vmains Vportx
Vmains Vportx
VT+max VT-max VT-min
VT+min
Time
Figure 31.2: Timing Zero Crossing Delay caused 30pF): 30µs 0.54° (same value leading trailing edges). Delay caused input thresholds: Leading edge: 35µs. (VT+ 3.4V) Trailing edge: 24µs. (VT- 1.4V)
MSP430 Family resulting delays are: Leading edge: 65µs. Trailing edge: 16µs.
Metering Application Report
These small deviations play role 50Hz 60Hz phase control applications with TRIACs. other input conditions than 230V 50Hz used then resulting delays calculated with following formulas:
Where:
cost
[V/s] [1/s]
Delay time caused input threshold voltage Threshold voltage input Slope input voltage Angular frequency Peak value input voltage Umains
(zero crossing time) above equation becomes:
3.1.3 Output Buffering outputs MSP430 (P0.x, P1.x, P2.x, P3.x, P4.x, have nominal internal resistances depending supply voltage Vcc: max. max. 0.4V max. 1.2mA) 0.4V max. 1.5mA)
These internal resistances non-linear valid only small output currents (see above). larger currents drawn then saturation effects will limit output current. These outputs intended driving digital inputs gates they normally have high impedance other applications such driving relays, lines etc. output currents greater than above mentioned ones needed then output buffering necessary. Figure 31.3 shows some possibilities. resistors shown limitation MSP430 output current minimum values. design made Vcc: values brackets Vcc:=
Metering Application Report
MSP430 Family
32kHz SVcc 2.7k (1.6k) P0.x,Oy MSP430 8.2k (3.3k) P0.x,Oy
1.5mA 1.2mA
350mA
ULN2001A P0.x,Oy =200mA ULN2003A 3.0k (2k) P0.x,Oy TRIAC Mains
Figure 31.3: Output Buffering 3.1.4 Universal Timer/Port I/Os Universal Timer/Port used analog-to-digital conversion, only partially used this purpose, then unused pins available outputs that switched HI-Z. Universal Timer/Counter Port used three different modes: 8-bit timers, input, output pins 16-bit timer, input, output pins Analog-to-digital converter with output pins
ports TP.0 TP.5 completely independent analog-to-digital converter. Which ports used sensors reference resistors does matter. Power-up resets data register zero switches TP.x ports HI-Z.
MSP430 Family
Metering Application Report
MSP430
Enable Control TPIN.5 TPD.5 TPE.5 TPD.4 TPE.4 TPD.3 TPE.3 TPD.2 TPE.2 TPD.1 TPE.1 TPD.0 TPE.0
TP.5
TP.4
TP.3
TP.2
TP.1
TP.0
Figure 31.4: Output Section Universal Timer/Port Module 3.1.4.1 I/Os used with Analog-to-Digital Converter analog-to-digital conversion uses pins least TP.x pins (one reference sensor measured): therefore outputs available other purposes. only possible instructions (BIS.B, BIC.B, XOR.B) modification outputs: this location control bits Data Register Data Enable Register TPE. programming port same described next section. NOTE precise results recommended avoid changes TP-ports during measurement. board layout physical distance switched port define influence CIN. Spikes coming from switching ports alter result measurement especially they occur near crossing threshold voltage. 3.1.4.2 I/Os used without This mode allows outputs with possibility being switched HI-Z (TP.0 TP.4) I/O-pin (TP.5). Additionally, 8-bit timers 16-bit timer available. timers used, only instructions (BIT.B, BIS.B, BIC.B, XOR.B) possible manipulation port: four control bits timers located within Data Register Data Enable Register TPE. MOV.B instruction used, bits affected. EXAMPLE: ports used outputs. possibilities port shown: Definitions Counter Port .EQU 04Eh Data Register .EQU 04Fh Data Enable Register. output enabled .EQU 001h TP.0 address .EQU 002h TP.1 address .EQU 004h TP.2 address .EQU 008h TP.3 address .EQU 010h TP.4 address .EQU 020h TP.5 address Reset ports switch output direction
Metering Application Report BIC.B BIS.B #TP0+TP1+TP2+TP3+TP4+TP5,&TPD #TP0+TP1+TP2+TP3+TP4+TP5,&TPE
MSP430 Family Data Enable outputs
Toggle TP.0 TP.4, TP.5 TP.2 afterwards XOR.B #TP0+TP4,&TPD Toggle TP.0 TP.4 BIS.B #TP5+TP2,&TPD TP.5 TP.2 Switch TP.1 TP.3 HI-Z state BIC.B #TP1+TP3,&TPE HI-Z state TP.1 TP.3 3.1.5 I/Os used fast serial Transfer combination hardware software shown below allows fast serial transfer with MSP430 family. data line needs Px.0, clock line other Portx line used. adaptation data length possible. transferred beginning; this changed easily: instead RRC. P0OUT .EQU 011h Port0 Output register P0DIR .EQU 012h Port0 Direction register .EQU address P0.0: Data .EQU address P0.1: Clock DATA,R5 16bit data CALL #SERIAL_FAST_INIT transfer, initialization DATA1,R5 16bit data CALL #SERIAL_FAST transfer, aso. Initialization fast serial transfer: uses SERIAL_FAST SERIAL_FAST_INIT Initialization part BIC.B #P00+P01,&P0OUT Reset P0.0 P0.1 BIS.B #P00+P01,&P0DIR P0.0 P0.1 output dir. Part following transfers SERIAL_FAST Initialization made carry cycle ADDC.B #P01,&P0OUT Data out, clock cycles BIC.B #P00+P01,&P0OUT Reset data clock cycles LSB+1 carry cycle ADDC.B #P01,&P0OUT Data out, clock cycles BIC.B #P00+P01,&P0OUT Reset data clock cycles Output bits same carry cycle ADDC.B #P01,&P0OUT Data out, clock cycles BIC.B #P00+P01,&P0OUT Reset data clock cycles
MSP430 Family
Metering Application Report
Each needs cycles transfer, this results maximum Baud rate transfer:
Baudratem
This means MCLK 1.024MHz then maximum Baud rate 102.4kBaud.
Data P0.0 MSP430 Clock P0.1 MCLK
Figure 31.5: Connections fast serial Transfer
Metering Application Report Storage Calibration Constants
MSP430 Family
Metering devices such electricity meters, meters etc. normally need store calibration constants (offsets, slopes, limits, addresses, correction factors) during measurements. Depending voltage supply (battery, mains) necessary possible have them stored on-chip external EEPROM. Both methods explained below. 3.2.1 External EEPROM Calibration Constants storage calibration constants, energy values, meter numbers device versions external EEPROMs necessary metering device supplied mains. This possible power failures that occur. EEPROM connected MSP430 dedicated inputs outputs. Three (two) control lines necessary proper function: Data line SDA: I/O-port needed this bi-directional line. Data read from written EEPROM Clock line SCL: output line sufficient clock line. This clock line used other peripheral devices ensured that data present data line during use. Supply line: current consumption EEPROM when high then switching EEPROM's necessary. Three possible solutions shown: EEPROM connected SVcc. This very simple have EEPROM switched when EEPROM switched external PNP-transistor driven output port. EEPROM connected permanently, power consumption does play role.
SVcc P0.z,Oy MSP430 X24LCxx
Data Clock
P0.y,Ox
P0.x
Figure 32.1: External EEPROM Connections
MSP430 Family
Metering Application Report
additional connect EEPROM MSP430 shown section describing I2C-Bus. NOTE next example does contain necessary delay times between setting resetting clock data bits. These delay times seen specifications EEPROM device. With processor frequency 1MHz each control instructions needs 5µs. EXAMPLE: EEPROM with dedicated I/O-lines controlled with normal I/O-instructions. line driven O17, line driven P0.6. line driven high resistor, output buffer. P0OUT .EQU 011h Port0 Output register P0DIR .EQU 012h Port0 Direction register .EQU 0F0h controls SCL, 039h Address .EQU 040h P0.6 CONTROLS LCDM .EQU 030h control byte INITIALIZE PORTS: INPUT DIRECTION: LINE GETS HIGH OUTPUT BUFFER LOW: PREPARATION SIGNALS BIC.B #SDA,&P0DIR INPUT DIRECTION BIS.B #SCL,&LCDM+9 CLOCK BIC.B #SDA,&P0OUT OUTPUT START CONDITION: HIGH, LOW, AFTERWARDS GOES BIS.B #SDA,&P0DIR (SDA GETS OUTPUT) BIC.B #SCL,&LCDM+9 CLOCK DATA TRANSFER: OUTPUT BIC.B #SDA,&P0DIR BIS.B #SCL,&LCDM+9 CLOCK BIC.B #SCL,&LCDM+9 CLOCK DATA TRANSFER: OUTPUT BIS.B #SDA,&P0DIR BIS.B #SCL,&LCDM+9 CLOCK BIC.B #SCL,&LCDM+9 CLOCK STOP CONDITION: LOW, BIC.B #SDA,&P0DIR BIS.B #SCL,&LCDM+9 examples shown above different conditions implemented into subroutine which outputs contents register. This shortens necessary code significantly.
Metering Application Report
MSP430 Family
Instead line line another I/O-port P0.x used. section "I2C Connection" more details such subroutine. 3.2.2 Internal Calibration Constants internal used calibration constants permanently connected battery used power supply. Power Mode necessary this kind applications battery life times reaching from years.
MSP430 Family M-BUS Connection
Metering Application Report
MSP430 connection shown next figure. Three supply modes possible when used with TSS721: Remote Supply: MSP430 fully powered from TSS721 Remote Supply/Battery support: MSP430 supplied normally from TSS721. case power fail battery powers MSP430 Battery Supply: MSP430 always supplied from battery
these operating modes described detail "TSS721 M-Bus Transceiver Applications Book".
32kHz
METER
P0.1 P0.2 Ay/RST/P0.y MSP430 Ax/P0.x TP.x/Oy/P0.y Az/RST/P0.z
TSS721
BUSL1 BUSL2
BUSL1 TSS721 BUSL2
Figure 33.1: TSS721 Connections MSP430 different TSS721 connections shown figure above: 8-bit Interval Timer with UART used then upper connection necessary. connected (P0.1) connected (P0.2). pure software UART individual protocol used, then input output combination used
more details also chapter "Power Supplies MSP430".
Metering Application Report Connection
MSP430 Family
more than device connected I2C-Bus then I/O-ports needed control I2C-peripherals. reason this need switch high impedance state. figure below shows connection three I2C-peripherals MSP430: EEPROM with 128x8-bit data EEPROM with 2048x8-bit data 8-bit DAC/ADC
lines driven high resistors (P0.x switched input direction) output ports itself (P0.x switched output direction).
TP.x/P0.a
P0.b MSP430 EEPROM 128x8 EEPROM 2048x8 ADC/DAC AINx AOUT
Figure 34.1: I2C-Bus connections NOTE next software example does contain necessary delay times between setting resetting clock data bits. These delay times seen specifications peripheral device. complete I2C-Handler byte data follows. data needs I/O-pin (Port0); clock I/O-pin output that switched HI-Z (TP-Port e.g.).
Slave Address Data
Figure 34.2: Word Format I2C-Handler Call
MSP430 Family
Metering Application Report
.EQU 080h P0.7 CONTROLS SCLDAT .EQU 011h P0OUT register address SCLEN .EQU 012h P0DIR register address .EQU 040h P0.6 CONTROLS SDAIN .EQU input register P0IN SDADAT .EQU 011h output direction register P0DIR SDAEN .EQU 012h direction register INITIALIZATION PORTS: INPUT DIRECTION: LINES HIGH PULL-UPS OUTPUT BUFFERS LOW: PREPARATION ACTIVE SIGNALS Initialization from Port0 BIC.B #SCL+SDA,&SDAEN INPUT DIRECTION BIC.B #SCL+SDA,&SDADAT OUTPUT BUFFER Initialization Port0, TP.x (MSP430C31x) BIC.B #SDA,&SDAEN INPUT DIRECTION (HI) BIC.B #SDA,&SDADAT OUTPUT BUFFER BIC.B #SCL,&SCLEN input direction (HI) BIC.B #SCL,&SDADAT OUTPUT BUFFER I2C-Handler: Outputs reads 8-bit data WRITE: R/@W contains slave address 8-bit data Return: Transfer unchanged) Error unchanged) ;Call MOV.B data,R6 8-bit data (2*addr)*0100h,R6 Address function CALL #I2CHND Call handler ERROR Error occurred ;READ: R/@W contains slave address byte undefined Return: contains 8-bit data byte, byte ;Call (2*addr+1)*0100h,R6 Address function CALL #I2CHND Call handler 8-bit info I2CHND PUSH Handler Start: Save register START CONDITION: HIGH, GOES THEN GOES BIS.B #SDA,&SDAEN BIS.B #SCL,&SCLEN LINE Sending address bits R/@W-bit #8000h,R5 mask
Metering Application Report I2CCL CALL CLRC R5,R6 #I2CSND #080h,R5 I2CCL carry Send carry Next address R/@W sent? continue
MSP430 Family
Address R/@W sent: Receive acknowledge bit, Decision read write CALL #I2CACKN I2CERR acknowledge, error #100h,R6 Read Write? I2CRI Write: Continue with 8-bit data byte I2CWL R5,R6 Write: continue with data CALL #I2CSND CLRC testbit carry: finished I2CWL CALL #I2CACKN Acknowledge carry Carry information: Error I2CEND .EQU I2CERR BIC.B #SCL,&SCLEN Stop condition BIC.B #SDA,&SDAEN Restore Carry info valid Read: read data bits byte. 080h I2CRI CALL #I2CRD Read carry RLC.B Carry mask used count I2CRI mask carry: finished CALL #I2C0 Acknowledge I2CEND Carry Subroutines I2C-Handler Send routine: Info Carry sent out. Acknowledge subroutine used clock output I2CSND I2C0 Info carry BIC.B #SDA,&SDAEN Info I2CACKN I2C0 BIS.B #SDA,&SDAEN Info Reading acknowledge data) carry
MSP430 Family I2CACKN .EQU I2CRD BIC.B BIT.B BIS.B #SCL,&SCLEN #SDA,&SDAIN #SCL,&SCLEN
Metering Application Report
clock Read data carry Clock
Metering Application Report Hardware Optimization
MSP430 Family
MSP430 permits unused analog inputs segment lines (S29 inputs outputs respectively. next sections explain detail program these inputs outputs. 3.5.1 unused Analog Inputs Unused Analog-to-Digital Converter (ADC) inputs used digital inputs with some restrictions, digital outputs. 3.5.1.1 Analog Inputs used Digital Inputs input used digital input. only necessary program (for example during initialization) this function. Three things important this feature used: activity these digital inputs stopped during ongoing sensitive measurements. This activity will cause noise which will falsify results. Activity means this case: change register (switching between digital analog mode) input change digital inputs (this allows only rarely changing input signals these inputs). bits which switched inputs will read zero when read. Therefore necessary clear them software after reading. analog inputs implemented given device Software Example: used inputs, digital inputs. .EQU 0110h Address DIGITAL INPUT REGISTER .EQU 0112h Address DIGITAL INPUT ENABLE REG. A7EN .EQU 080h Bits Dig. Input Enable Reg.: A6EN .EQU 040h Digital Input A5EN .EQU 020h INITIALIZATION: SWITCHED DIGITAL INPUTS USED ANALOG INPUTS #A7EN+A6EN+A5EN,&AEN DIGITAL MODE NORMAL PROGRAM EXECUTION: CHECK HIGH. YES: JUMP LABEL L$100 #A7EN+A5EN,&AIN .OR. L$100 CONTINUE CHECK DIG. INPUTS LOW. YES: L$200 &AIN L$200 YES, (ANALOG INPUTS READ ZERO)
MSP430 Family 3.5.1.2 Analog Inputs used Digital Outputs
Metering Application Report
outputs missing then unused inputs with Current Source connection used following restrictions considered: Only input high given time principle) Only inputs usable (only they connected Current Source) outputs high only during time does Current Source output current directly related supply voltage output voltage only about supply voltage Vcc. Logic levels have checked carefully therefore. transistor stage perhaps necessary there anyway, e.g. relay) output current given current Current Source. same considerations with point before have made. pull-down resistor high enough allow maximum output level.
example below shows part which uses inputs digital outputs driving stages: transistor stage (energy pulse e.g.with electricity meter) 3.3V gate (3.3V guarantees that input levels sufficient).
32kHz 0.25 SVcc/Rext SVcc Rext Energy Output MSP430 Logic +3.3V
Figure 35.1: Unused inputs used Outputs EXAMPLE. control outputs shown above following software part necessary: ACTL .EQU 0114h CONTROL REGISTER ACTL VREF .EQU Ext. Reference SVCC .EQU 0000h INPUT SELECT .EQU 0004h CSA0 .EQU 0000h CURRENT SOURCE CSA1 .EQU 0040h CSOFF .EQU 0100h CURRENT SOURCE 3ms: SELECT CURRENT SOURCE INPUT
Metering Application Report
MSP430 Family
CALL
#VREF+A0+CSA0,&ACTL #WAIT3MS #CSOFF,&ACTL
SVCC WAIT CURRENT SOURCE OFF;
3ms: SELECT CURRENT SOURCE INPUT CALL #VREF+A1+CSA1,&ACTL #WAIT3MS #CSOFF,&ACTL SVCC WAIT CURRENT SOURCE
3.5.2 unused Segment Lines Digital Outputs LCD-driver MSP430 provides additional digital outputs segment lines used. digital outputs possible hardware design, them will implemented given chip. addressing scheme digital outputs illustrated table 35.1. table shows dependence segment/output lines 3-bit value LCDP. Only LCDP then lines switched Mode (segment lines). Only groups four segment lines switched digital output mode. LCDP zero use). NOTES Table 35.1 shows digit environment 4MUX display. outputs available: always implemented outputs. (digit digital outputs have always addressed with four bits. This means that used addressing output. Only byte addressing allowed addressing controller bytes. switches LCD-outputs digital output mode (LCDP except
MSP430 Family
Metering Application Report Table 35.1: Output Configuration Digit Digit Digit Digit Digit Digit Digit Digit Digit Digit Digit Digit Digit Digit Digit Digit
Address 03Fh 03Eh 03Dh 03Ch 03Bh 03Ah 039h 038h 037h 036h 035h 034h 033h 032h 031h
LCDP S20/S21 S10/S11 S0/S1
Software example: drive 4MUX digits). digital outputs. Driver definitions: LCDM .EQU 030h ADDRESS CONTROL BYTE LCDM0 .EQU 001h LCDM1 .EQU 002h high Impedance .EQU 004h MUX: static, 2MUX, 3MUX, 4MUX LCDP .EQU 020h Segment/Output Definition LCDM7/6/5 .EQU 00Fh Control Definition .EQU 0F0h .EQU 00Fh .EQU 0F0h INITIALIZATION: DISPLAY LCDM0 IMPEDANCE LCDM1 4MUX: LCDM4/3/2 OUTPUTS: LCDM7/6/5 MOV.B #(LCDP*3)+(MUX*7)+LCDM0,&LCDM INIT NORMAL PROGRAM EXECUTION: SOME EXAMPLES MODIFY DIGITAL OUTPUTS O17: BIS.B #O14,&LCDM+8 O14, UNCHANGED BIC.B #O15+O14,&LCDM+8 RESET MOV.B #O15+O14,&LCDM+8 MOV.B #O17,&LCDM+9 RESET O16, XOR.B #O17,&LCDM+9 TOGGLE O17, STAYS UNCHANGED
Metering Application Report Digital-to-Analog Converters
MSP430 Family
MSP430 does contain Digital-to-Analog Converter (DAC) on-chip current versions, relatively simple implement function needed. Five different solutions with distinct hardware software requirements shown below: R/2R method Weighted Resistors method Integrated Digital-to-Analog Converters connected I2C-Bus Pulse Width Modulation (PWM) with Universal Timer/Port Module Pulse Width Modulation with Timer_A
3.6.1 R/2R Method With CMOS shift register Digital-to-Analog Converter built with length. outputs shift register switch 2R-resistors according digital input. voltage non-inverting input also output voltage Vout operational amplifier Vout Where:
Value digital input word with bits length Number outputs, maximum length input word Supply voltage
Signed output possible level shifting splitting power supply (+Vcc/2 -Vcc/2). With split power supplies voltage output operational amplifier Vout Advantages R/2R-Method: Only different resistors necessary Absolute monotony over complete output range Internal impedance independent digital value: impedance always Expandable length adding shift registers
MSP430 Family
Metering Application Report
Ox,P0.a Oy,P0.b MSP430 Clock Data
Shift Register
Length Expansion Vout Output System
Figure 36.1: R/2R Method Digital-to-Analog Conversion 3.6.2 Weighted Resistors Method simplest Digital-to-Analog Conversion Method: only (n+3) resistors operational amplifier required n-bit DAC. This method used performance low. example shown figure 36.2 delivers 2n+1 different output voltage steps. They seen signed voltage Vcc/2 seen zero point. output voltage Vout this
Vout Vninv
where:
Vout Vninv
Output voltage Voltage inverting input operational amplifier (Vcc/2) Supply voltage MSP430 periphery Normalized resistor used with Multiplication factors weighted resistors port switched port switched input direction (HI-Z) port switched
Normally ports switched same potential (Vss Vcc) disabled. This allows signed output voltages referenced Vcc/2. Advantage Weighted Resistor-Method: Simplicity Disadvantage: Monotony possible resistor tolerances
Metering Application Report
MSP430 Family
Vcc/2
P0.a P0.b P0.c P0.x MSP430
Vout Output System
Figure 36.2: Weighted Resistors Method Digital-to-Analog Conversion 3.6.3 Digital-to-Analog Converters connected figure below shows different DACs which connected MSP430 I2C-Bus: single output 8-bit Digital-to-Analog Converter (with additional inputs): analog output AOUT provided. octuple 6-bit DAC: eight analog outputs DAC0 DAC7 provided system
generic software handle these devices contained section explaining I2C-Bus.
TP.x,P0.a
P0.b MSP430 from system AINx AGND AOUT system Vmax DACx
max. output voltage Outputs system
Figure 36.3: I2C-Bus Digital-to-Analog Converter Connection 3.6.4 PWM-Digital-to-Analog Converter with Universal Timer/Port Module timers contained Universal Timer/Port Module used independent generators. ACLK frequency used timing these PWMs. Basic Timer defines period signals; interrupt handler sets programmed outputs loads timer registers TPCNT2 TPCNT1 with negated pulse length
MSP430 Family
Metering Application Report
(values table below). Universal Timer/Port Module terminates pulses; interrupt handler resets outputs when counters TPCNTx overflow from 0FFh 00h. length step always 1/ACLK which 30.51758µs 32.768kHz crystal used. next table shows necessary Basic Timer frequency dependent used resolution. Table 36.1: Resolution PWM-DAC Resolution Bits Resolution Basic Timer Steps Frequency 1024 table below shows values written into timer registers TPCNT1 TPCNT2 certain output value (related Vcc): wished value subtracted from resolution value. Switch byte) defines output enabled disabled (0). Table 36.2: Register Values PWM-DAC TPCNTx TPCNTx TPCNTx TPCNTx Value Value Value Value Steps Steps Steps Steps
Output (relative Vcc) 0.25 0.50 0.75 1.00
Switch
NOTE interrupt latency time plays important role this kind PWMgeneration. Real time programming necessary therefore: first instruction each interrupt handler must EINT instruction. EXAMPLE: outputs with resolution realized. highest speed TP.2 TP.1 used outputs (they have same addresses like interrupt flags RC2FG RC1FG). schematic shown figure 36.4. output ripple shown exaggerated manner. information needed DMC) then signal TP.x used directly.
Metering Application Report
MSP430 Family
output TP.x output TP.1 output 1/fBT MSP430 output TP.2 Buffered output
output
Figure 36.4: Digital-to-Analog Converter Figure 36.5 illustrates counting 8-bit counter during generation. interrupt handler Basic Timer sets 8-bit counter negative number counts (-n1) sets output high; interrupt handler Universal Timer/Port resets output zero when overflows.
TPCNTx 0FFh
1/128Hz
TCNTx 32768 Steps Resolution Repetition Rate
Free
n1/ACLK
Interrupt Latency execution time
Output
Basic starts
RCxFG
Basic
RCxFG
Basic
RCxFG
Interrupts generated
Figure 36.5: PWM-Timing Universal Timer/Port Module Basic Timer MSP430 Software with Universal/Timer Port Definitions MSP430 hardware Type .equ 310: MSP43C31x others BTCTL .equ 040h Basic Timer: Control Reg. BTCNT1 .equ 046h ;.Counter BTCNT2 .equ 047h Counter BTIE .equ 080h Intrpt Enable SSEL .equ 080h .equ 020h BTCTL: xCLK/256 .equ 004h BTCTL: Clock Divider2 .equ 002h .equ 001h Clock Divider0 SCFQCTL .equ 052h Control Register .equ 080h Modulation Bit:
MSP430 Family CPUoff TPCTL TPCNT1 TPCNT2 TPIE TPIE TPSSEL3 TPSSEL2 TPSSEL1 TPSSEL0 RC2FG RC1FG EN1FG
Metering Application Report
.equ .equ .equ .equ .equ .equ .equ .equ .equ .equ .equ .equ .equ .else .equ .endif .equ .equ .equ .equ .equ .equ .equ .equ .equ .equ .equ .equ
010h 008h 04Bh 04Ch 04Dh 04Eh 04Fh 002h 004h 008h 010h 020h
General Intrpt enable Timer Port: address Control Reg. Counter Reg.Lo Counter Reg.Hi Data Reg. Enable Reg. TP.1 TP.2 TP.3 TP.4 TP.5
Type=310 MSP430C31x? 004h ADC: Intrpt Enable 008h 001h 080h 040h 080h 040h 020h 010h 008h 004h 002h 001h 080h MSP430C32x configuration Intrpt Enable Byte Selects clock input (TPCTL) Selects clock gate (TPCTL) Gate TPCNTx (TPCTL) Carry counter (TPCTL) Carry counter (TPCTL) Conversion Flag 16-bit counter (TPD)
Definitions SW_PWM .equ 0200h Enable bits TP.2 TP.1 TIM_PWM1 .equ 0201h Calc. result PWM1 TIM_PWM2 .equ 0202h Calc. result PWM2 .sect "INIT",0F000h Initialization Section INIT #0300h,SP Initialize Stack Pointer MOV.B #IP2+IP1+IP0,&BTCTL Basic Timer 128Hz MOV.B #TPSSEL0+ENA,&TPCTL ACLK, EN1=1, TPCNT1 CLR.B &TPCNT1 Clear regs CLR.B &TPCNT2 CLR.B &TPD Output Data MOV.B #TPSSEL2+TP2+TP1,&TPE TPCNT2: ACLK BIS.B #TPIE+BTIE,&IE2 INTRPTS CLR.B SW_PWM output
Metering Application Report BIC.B EINT #RC2FG+RC1FG,&TPCTL Reset flags
MSP430 Family
Continue with Start both PWMs: calculation results MOV.B R6,TIM_PWM1 (256 result1) MOV.B R5,TIM_PWM2 (256 result2) BIS.B #TP2+TP1,SW_PWM Enable PWM2 PWM1 Continue Disable PWM2: Output zero BIC.B #TP2,SW_PWM Disable PWM2 Interrupt Handler Basic Timer Interrupt: 128Hz BT_INT BIC.B #RC2FG+RC1FG,&TPCTL Clear flags MOV.B TIM_PWM2,&TPCNT2 (256 time2) MOV.B TIM_PWM1,&TPCNT1 (256 time1) BIS.B SW_PWM,&TPD Switch enabled PWMs RETI Basic Timer Handler Interrupt Handler Universal Timer/Port Module max. speed TP.2 TP.1 used (same locations RC2FG RC1FG). other locations used, instructions have inserted after flag clearing UT_HNDL PUSH.B &TPCTL INTRPT from where? #RC2FG+RC1FG,0(SP) Isolate flags BIC.B @SP,&TPCTL Clear flag(s) BIC.B @SP+,&TPD Reset actual I/O(s) RETI Universal Timer/Port Module Handler .sect "INT_VECT",0FFE2h .WORD BT_INT Basic Timer Vector Type=310 .sect "INT_VEC1",0FFEAh MSP430C31x .else .sect "INT_VEC1",0FFE8h Others .endif .WORD UT_HNDL Vector (31x) .sect "INT_VEC2",0FFFEh .WORD INIT Reset Vector EXAMPLE: outputs with resolution realized. TP.4 TP.3 used outputs (this makes shifting necessary). schematic shown figure 36.6. inverting
MSP430 Family
Metering Application Report
filters outputs outputs MSP430 also inverted compensate this. output ripple shown exaggerated manner. information needed DMC) then signal TP.x used directly.
Filter TP.x output TP.3 MSP430 0.5Vcc output 1/fBT output
TP.4
output
0.5Vcc output
Figure 36.6: Digital-to-Analog Converter Figure 36.7 illustrates counting 8-bit counter during generation. interrupt handler Basic Timer sets 8-bit counter negative number counts (-n1) sets output high; interrupt handler Universal Timer/Port resets output zero when overflows.
TPCNTx 0FFh
1/256Hz
TCNTx 32768 Steps Resolution Repetition Rate
Output
n1/ACLK Interrupt Latency execution time Interrupts
Basic
RCxFG
Basic
RCxFG
Figure 36.7: PWM-Timing Universal Timer/Port Module Basic Timer MSP430 Software with Universal/Timer Port Definitions MSP430 hardware like above .sect "INIT",0F000h Initialization Section INIT #0300h,SP Initialize MOV.B #IP2+IP1,&BTCTL Basic Timer 256Hz MOV.B #TPSSEL0+ENA,&TPCTL ACLK, EN1=1, TPCNT1 CLR.B &TPCNT1 Clear regs CLR.B &TPCNT2 BIS.B #TP4+TP3,&TPD Output Data high
Metering Application Report
MSP430 Family
MOV.B #TPSSEL2+TP2+TP1,&TPE TPCNT2: ACLK BIS.B #TPIE+BTIE,&IE2 INTRPTS CLR.B SW_PWM output BIC.B #RC2FG+RC1FG,&TPCTL Clear flags EINT Start both PWMs: Calculation results MOV.B R6,TIM_PWM1 (128 result) BIS.B #TP3,SW_PWM Enable PWM1 MOV.B R5,TIM_PWM2 (128 result) BIS.B #TP4,SW_PWM Enable PWM2 Disable PWMs: Output zero BIC.B #TP4+TP3,SW_PWM output Interrupt Handler Basic Timer Interrupt: 256Hz enabled PWMs switched BT_INT BIC.B #RC2FG+RC1FG,&TPCTL Clear flags MOV.B TIM_PWM2,&TPCNT2 (128 time2) MOV.B TIM_PWM1,&TPCNT1 (128 time1) BIC.B SW_PWM,&TPD Switch enabled PWMs RETI Basic Timer Handler Interrupt Handler UT/PM. PWM-channel that caused interrupt switched off. UT_HNDL PUSH Save MOV.B &TPCTL,R6 INTRPT from where? #RC2FG+RC1FG,R6 Isolate flags BIC.B R6,&TPCTL Clear flag(s) TP.4/TP.3 BIS.B R6,&TPD actual I/O(s) Restore RETI Universal Timer/Port Module Handler Vectors like with example before 3.6.5 PWM-Digital-to-Analog Converter with Timer_A Timer_A MSP430 family ideally suited generation PWM-signals: Output Unit each five) Capture/Compare Registers able generate seven different modes. generation depends mainly used mode Timer_A: Continuous Mode: Timer Register runs continuously upwards continues zero after value 0FFFFh. Capture/Compare Register used like other
MSP430 Family
Metering Application Report
Capture/Compare Registers. This mode allows five independent timings. Continuous Mode intended applications used relatively slow applications other timings needed too: interrupt used setting resetting output. Output Unit controls PWM-output interrupt handler adds next time interval Capture/Compare Register modifies mode Output Unit (set, toggle, reset). Mode: Timer Register counts content Capture/Compare Register (here Period Register) restarts zero when reached this value. Capture/Compare Register contains period information other Capture/Compare Registers. Up-Down Mode: Timer Register counts content Capture/Compare Register (here Period Register) counts down zero when reached this value. When zero reached again Timer Register counts again. Capture/Compare Register contains period information other Capture/Compare Registers.
three modes explained detail section Timer_A. same output filters used like shown previous section output needed, only difference high, possible speed Timer_A (input frequency MCLK). 3.6.5.1 PWM-DAC with Timer_A running Continuous Mode five completely different generations possible. Timer Register equals four Capture/Compare Latches (programmed Compare Mode) hardware task programmed Output Unit performed (set, reset, toggle a.s.o.) interrupt requested. Figure 36.8 illustrates generation signals with Capture/Compare Registers interrupt handler responsible following tasks: time difference (represented clock count next interrupt added used Capture/Compare Register software: once once Output Unit programmed appropriate mode: added, reset added. Other tasks necessary NOTE Continuous Mode normal mode generation software overhead that necessary. used this purpose only other independent timings necessary that cannot realized with Mode Up-Down Mode.
Metering Application Report
MSP430 Family
0FFFFh
Interrupt Events: Example EQU0
EQU0 Interrupts CCR0 Output Unit "Reset" CCR0 Output Unit "Set"
Figure 36.8: Generation with Continuous Mode 3.6.5.2 PWM-DAC with Timer_A running Mode four different generations with equal period (repetition rate) possible. Timer Register equals four Capture/Compare Latches (programmed Compare Mode) hardware task programmed Output Unit performed (set, reset, toggle a.s.o.) interrupt requested. During execution interrupt handler necessary software task completed; re-loading Capture/Compare Register necessary except pulse width changes. Timer Register reaches programmed value Capture/Compare Register then reset zero restarts there. Figure 36.9 illustrates generation independent signals with Capture/Compare Registers
0FFFFh
CCR0
CCR1
CCR2 Output (CCR1): Output Mode Toggle/Reset Output Mode Set/Reset Output (CCR2): Output Mode Toggle/Set Output Mode Reset/Set EQU2 EQU0 EQU1 EQU0 EQU2 EQU1 EQU0 EQU2 Interrupts generated
Figure 36.9: Generation with Mode 3.6.5.3 PWM-DAC with Timer_A running Up-Down Mode four different generations with equal period possible. Timer Register equals four Capture/Compare Latches (programmed Compare Mode) hardware task programmed Output Unit performed (set, reset, toggle a.s.o.) interrupt requested. During interrupt handler necessary software task completed; re-loading Capture/Compare Register necessary except pulse width changes. Timer Register continues count upward until value Capture/Compare Register reached; then counts downward zero. When reaches value Capture/Compare Register programmed task
MSP430 Family
Metering Application Report
made Output Unit interrupt requested again. When reaching zero, sequence restarts. This symmetric generation possible: value Capture/Compare Register reached twice each up-down cycle. Figure 36.10 illustrates generation independent signals with Capture/Compare Registers
0FFFFh CCR0 CCR1
CCR3
Output (CCR3): Output Mode Toggle/Set Output Mode Toggle Output (CCR1): Output Mode Toggle/Set Output Mode Toggle TIMOV EQU3 EQU0 EQU3 EQU3 TIMOV EQU3 EQU0 EQU1 EQU1 EQU1 EQU1 Interrupts generated
Figure 36.10: Generation with Up-Down Mode
Metering Application Report Connection large external Memories
MSP430 Family
MSP430 application necessary have possibility store large amounts measured data. this purpose external memories used: Dynamic RAMs like TMS44460 bit) Synchronous Dynamic RAMs like TMS626402 bit) Flash memories like TMS28F512A (512K 8-bit) EEPROMs
DRAM versions with self-refresh feature recommended, otherwise necessary refresh cycles would waste much processing time. Figure 37.1 shows most simple way: unused segment lines used addressing control external memory. Four bi-directional lines port another available port) used exchange data both directions. necessary steps read from write shown DRAM TMS44460 memory are: Output address address lines control line Output column address address lines control lines reset back high read wished: high control lines read data from write wished: high, write information
proposal shown figure 37.1 needs approximately MCLK cycles each block 4-bit nibbles O-output lines used.
Control
TP.x/Ox TP.x/Ox TP.x/Ox TP.x/Ox MSP430 O12.O21 P0.z
CAS4.1 TMS44460
Address
A9.0
Data
DQ4.1
Figure 37.1: External Memory Control with MSP430 Ports EXAMPLE: circuit shown figure 37.1 address lines external memory connected O-outputs (LSB) (MSB). subroutine O_HNDLR used column addressing. driver software subroutine call follows: O_STRT .EQU .EQU CALL 10/2 037h O-outputs controlled (O13 Control byte (1st byte) Start with addressing Output @RAS signal Column address
#03FFh,R5 #O_HNDLR R9,R5
MSP430 Family CALL #O_HNDLR
Metering Application Report Output column address Output @CAS signals
Subroutine outputs address info O-outputs written O-outputs. destroyed Execution time: cycles O-outputs (including CALL) cycles O-outputs (like above) O_HNDLR Clear counter O_HN R5,R4 Copy actual info #3,R4 Isolate next address bits MOV.B TAB(R4),O_STRT(R6) Write address bits Prepare next address bits Increment counter #N,R6 Through? O_HN next bits Table contains pattern used O-outputs .BYTE 0,0Fh,0F0h,0FFh Patterns Figure 37.2 shows segment lines available: 8-bit shift registers used addressing control external memory. Four bi-directional lines port another available port) used exchange data both directions. Instead outputting address control signals parallel, with this solution signals output series. output enable signals used omit wrong signals shifting information. proposal shown figure 37.2 needs approximately cycles each block 4-bit nibbles.
TP.x/Ox TP.x/Ox TP.x/Ox TP.x/Ox Error
xx299
Control G2.1 CAS4.1 A9.8
MSP430
TP.x/Ox P0.z Serial Data G2.1 Data
TMS44460
Address A7.0 DQ4.1
Figure 37.2: External Memory Control with Shift Registers With nearly same hardware solutions other external memories controlled too: Synchronous Dynamic (TMS626402 bit): address lines control lines. column addressing used. Four data bits.
Metering Application Report
MSP430 Family
Flash memory (TMS28F512A 512K 8-bit): address lines control lines. Direct addressing used. Eight data bits.
combination unused outputs (port, TP.x, shift registers used. DRAMs without self-refresh used, address bits should controlled complete port (port 1,2,3 minimum overhead. MSP430C33x versions allow much simpler faster solution five available ports. Figure 37.3 illustrates connection EEPROM AT29LV010A (128K MSP430C33x. proposal shown figure 37.3 needs approximately MCLK cycles each byte read written. control lines MSP430 I/Os with second function: peripheral functions available; they changed freely. MSP30C31x address this type memory TP.x ports.
Error
xx299
P3.0 P3.1 P4.1 P4.0 MSP430C33x
Control
Address Address Data
AT29LV010A A15.A7 A7.A0 I/O7 .I/O0
Figure 37.3: EEPROM Control with direct Addressing I/O-Ports
MSP430 Family Power Supplies MSP430 Systems
Metering Application Report
Various different ways generate supply voltage(s) MSP430 systems shown. extremely power consumption MSP430 family this possible with batteries, accumulators, M-Bus, glass fiber lines mains. Every method uses completely different hardware explained depth. Wherever possible, formulas necessary hardware design given too. 3.8.1 Battery Driven Systems extremely current consumption MSP430 family possible MSP430 system with 0.5Ah battery more than years. This opens door applications that were impossible before. reach such extended time spans only necessary observe some simple rules: most important switch-off always when computing power needed (e.g. after calculations completed). This reduces current consumption from anyway 400µA further down 1.6µA. figures 38.1 38.2 drawn special that makes better visible battery needs connected MSP430 highest accuracy analog-to-digital converter. Figure 38.1 illustrates MSP430C32x with separated digital analog supply pins. This allows very strictly electrical separation noise generating digital parts noise sensitive analog parts. Figure 38.2 shows separate best parts MSP430 family members with common supply pins analog digital parts chip. used battery high internal resistance (like some long-life batteries) then parallel capacitor must have minimum capacity: supply current measurement part which cannot delivered battery delivered mainly Cch; equation includes small current coming from battery:
Cchmin tmeas
Between measurements capacitor needs time charged-up next measurement. During this charge-up time MSP430 system runs Power Mode have lowest possible power consumption. charge-up time charge
tchmin Cchmax Rimax
Where: tmeas Medium system current (MSP430 peripherals) Discharge time during measurement Tolerable discharge during time tmeas Internal resistance battery
Metering Application Report
MSP430 Family
SVcc Rext Rsens2 Rsens1 P0.x,TP.y I/Os MSP430C323
Error
AVss AVcc
DVss
DVcc
other analog parts AGND
other digital parts
Figure 38.1: Battery Driven MSP430C32x-System
Rref TPD.0 Rsens1 TPD.1 Rsens2 MSP430C31x TPD.2 other system parts AGND other system parts P0.x,TP.y I/Os
Error
Figure 38.2: Battery Driven MSP430C31x System NOTE battery connected MSP430 shown figures 38.1 38.2 restricted battery driven MSP430-systems: shown decoupling analog digital parts necessary methods supply. following schematics only drawn simpler give better readability. 3.8.2 Accumulator Driven Systems MSP430 supplied also from accumulator. advantage this solution that MSP430 take over also battery management accumulator: Current Measurement: summing-up charge discharge currents. these currents measured with sign multiplied with constants that unique used accumulator type (e.g. NiCd, then possible have relatively accurate value actual charge. current measured with shunt. measured voltage drop shifted into middle ADC-range current generated MSP430's internal Current Source that flows through resistor This method allows signed current measurements
MSP430 Family
Metering Application Report
Temperature Measurement: internal processes accumulator (e.g. maximum charge, self-discharge) strongly dependent temperature pack. Therefore temperature pack measured with sensor used afterwards with calculations. Current Source used: voltage drop current across sensor resistance measured with input Voltage Measurement: voltage accumulator pack indication states full charge complete discharge. Therefore voltage pack measured with voltage divider consisting Charge Control: dependent result charge calculations MSP430 decide charge transistor needs switched off. This made also (Pulse Width Modulation) mode. Figure 38.3 shows three possible charge modes right, lower corner. replaceable accumulators used, charge control needed. Rest Mode Handling: During periods MSP430 system used, Power Mode MSP430 allows control rest mode with nearly current consumption fact supply current same magnitude self-discharge current accumulator). system peripherals switched off; MSP430 wakesup regular intervals controlled Basic Timer calculates every hours amount self discharge accumulator. This calculated value subtracted from actual charge level. Figure 38.3 illustrates MSP430-system driven accumulator. complete battery management made MSP430 too. necessary, simple hardware resistors temperature sensor shown. actual charge accumulator indicated with graph ranging from "Empty" Full". necessary constants security copy actual charge contained external EEPROM with typically bits. NOTE hardware shown figure 38.3 used also intelligent accumulator controller: only hardware necessary this task used then. measurement parts voltage, current temperature exactly same shown.
Metering Application Report
MSP430 Family
From System P0.x SVcc Keyboard P0.y P0.1 P0.2 EEPROM Data P0.3 P0.4 MSP430C32x TP.0 VTP.0
Voltage Current Temperature Empty
Error
Full
Rext
System
Voltage Regul.
Charger
Accus
Shunt
Full Charge
Charge
Trickle Mode
Time
Figure 38.3: Accumulator driven MSP430-System with Battery Management 3.8.3 Mains Driven Systems current consumption microcomputer systems gets more more important also mains driven systems: lower power consumption microcomputer system simpler cheaper power supply 3.8.3.1 Transformer Power Supplies Transformers have advantages: Complete isolation from mains: important security attribute most systems Very good adaptation needed supply voltage resulting from this good power efficiency Most mains driven applications possible only isolation from mains transformer provides. 3.8.3.1.1 Half-Wave Rectification Half-wave rectification uses only half-wave secondary voltage Vsec powering application. Figure 38.4 illustrates voltages used with equations.
MSP430 Family
Metering Application Report
Vsec Vchmax
tdis
Figure 38.4: Voltages Timing Half Wave Rectification Advantages: Disadvantages: Simple hardware Rectification with voltage drop only diode Charge capacitor must have doubled capacity compared full-wave rectification Higher ripple supply voltage flows through secondary winding
Figure 38.5 shows most simple mains driven power supply: positive half-wave secondary side charges load capacitor Cch. voltage stabilized with Zener diode having Zener voltage equal necessary supply voltage MSP430. conditions must before final calculation possible:
Vsecm
and: Vsecmin Cchmin IAMmax charge capacitor must have minimum capacity: Cchmin Vsecmin
peak-to-peak ripple voltage Vnpp supply voltage
final necessary secondary voltage Vsec mains transformer (Vch 0.45 Cchmin 0.45
Vsecmin Where:
Metering Application Report Vsec
MSP430 Family
Medium system current (MSP430 peripherals) Period mains frequency Discharge during time tdis Supply voltage MSP430 system Voltage Zener diode Differential resistance Zener diode [V/A] Resistance series resistor Secondary (effective) voltage transformer (full load conditions)
Non-regulated voltage Mains Vsec MSP430 peripherals
Figure 38.5: Half Wave-Rectification Voltage with Zener Diode Figure 38.6 shows simple power supply that uses voltage regulator like uA78L05. charge capacitor must have minimum capacity:
Cchmin
tdis
peak-to-peak ripple Vnpp output voltage Vreg depends used voltage regulator: regulators ripple rejection value seen specification. necessary secondary voltage Vsec mains transformer under full load conditions
Vsecmin
Vreg tdis Cchmin
discharge time tdis used with above equations
tdis
arcos Vsec
Where: tdis Vreg
Discharge time Voltage drop rectifier diode Dropout voltage (voltage difference between output input) voltage regulator function Nominal output voltage voltage regulator
first estimations value tdis calculated different discharge values: discharge during tdis tdis 0.93T
MSP430 Family discharge during tdis
Non-regulated voltage Vreg Mains Vsec
Metering Application Report tdis 0.88T
peripherals
MSP430
Figure 38.6: Half-Wave Rectification Voltage with Voltage Regulator Figure 38.7 shows MSP430 system that uses supply voltages: -5V. negative supply voltage used analog interfaces. Simple resistor dividers interface analog part into range MSP430. formulas calculation charge capacitor necessary secondary voltage Vsec same shown circuitry figure 38.6. same circuitry used system with +2.5V -2.5V (see figure 38.13 details).
Non-regulated voltage Vreg
peripherals MSP430
Mains
Vsec
+2.5V
system
Non-regulated voltage
Input
Figure 38.7: Half-Wave Rectification Voltages with Voltage Regulators 3.8.3.1.2 Full-Wave Rectification Full-wave rectification uses both half-waves secondary voltage Vsec powering application.
Vsec Vchmax
tdis
Figure 38.8: Voltages Timing Full Wave Rectification
Metering Application Report Advantages: Smaller charge capacitor Lower ripple voltage current through transformer's secondary winding
MSP430 Family
Disadvantages:
Four diodes transformer with center necessary Voltage drop diodes series (except with transformer having center tap)
Figure 38.9 shows simple power supply that uses µA78L05 voltage regulator. charge capacitor must have minimum capacity: tdis
peak-to-peak ripple Vnpp voltage depends used voltage regulator. ripple rejection value seen specification. necessary secondary voltage Vsec mains transformer upper rectifier with four diodes (full load conditions):
Vsecmin Vreg tdis Cchmin
center transformer, above equation multiplied Vd). discharge time tdis used with above equations
tdis
arcos Vsec
first estimations value tdis calculated different discharge values: discharge during tdis discharge during tdis tdis 0.43T tdis 0.38T
Mains
Vsec
Non-regulated voltage Non-regulated voltage Vreg
peripherals
Vsec Mains
MSP430
Figure 38.9: Full Wave Rectification Voltage with Voltage Regulator Figure 38.10 shows MSP430 system that uses supply voltages: +2.5V -2.5V. formulas calculation charge capacitor necessary secondary voltage Vsec
MSP430 Family
Metering Application Report
same given circuitry figure 38.9. circuitry figure 38.10 used also system with supply (see figure 38.7 details). also shown connect TRIAC that used control motor. needed relatively high gate current taken from non-regulated positive voltage; this reduces noise within regulated MSP430 supply. current flowing through motor measured with control purposes. ADC-result zero volt (measured subtracted from current value results signed, offset corrected value. single supply voltage used (+5V only) then Current Source used shift signed current information into range ADC. also figure 38.3: circuit current measurement.
Non-regulated voltage peripherals Vsec Mains +2.5V
+2.5V
A.C. Mains +2.5V
Vreg
-2.5V
+2.5V -2.5V
MSP430
-2.5V
TP.0
Current Measurement
Non-regulated
Figure 38.10: Full-Wave Rectification Voltages with Voltage Regulators 3.8.3.2 Capacitor Power Supplies Applications that need isolation from mains that have defined connection mains (like electricity meters) ca
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