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LZ95D71 U95D71 CMOS timing generator which provides timing pulses


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LZ95D71
LZ95D71
U95D71 CMOS timing generator which provides timing pulses used drive area sensor, combination with (LZ95D52/M).
Timing Pulse Generator
CONNECTIONS
48-PIN
XXO* VIEW
Gckmozozzx O~LL~>~>>
FEATURES
Switchable between 410000 pixels
DS2X PSMD TVMD PWMD SLCT TEST
VHIX OFDX
470000 pixels Switchable between NTSC (EIA) (CCIR) systems Internal electronic shutter Shutter speed selectable from (PAL /50), /250, /500, 000, 000, 1/10 addition this, 1/100 (PAL 1/120 flicker -less mode using parallel code. Shutter speed also controlled period using serial code Single power supply Package 48-pin QFP(QFP048-P-0707)
11]~2 31]4115116117118 1011111112~ gogg~gg6;E2 (Jg~uuua~2z
abwnce confImtIOn
device s~ficafion *eet5 SHARP hkes rewnsdlty defects that Cccur quIpmnt usng WARPs devce$, Catalws, data bmks, htact WARP order obtatn latest veslon devtce Wlf[cahon *wts klore using WARPS devhce"
BLOCK DIAGRAM
SEL2 SELI
U95D52/M
CFMI
CFMO
TST3
HBLK
CPMD
CLKI
VINT
40TE
numbers apply 44-pin QFP,
ABSOLUTE MAXIMUM RATINGS
PARAM=ER Supply voltage Input voltage Output voltage Operation temperature Storage temperature SYMBOL Topr Tstg RATING -0.3 +0.3 to+70 to+150 UNIT
LZ95D52/M
CHARACTERISTICS
PARAMETER Input voltage Input High voltage Input High threshold voltage Input threshold voltage Hysteresis voltage Input current Input High current Output High voltage Output High voltage Output voltage Output voltage Leak output current NOTE Applied Inputs (IC, ICO, ICU). Applied schmitt-trigger input (ICSU). Applied inputs (IC, ICD). Applled inputs (ICU, ICSU). Applied inputs (IC, ICU, ICSU). Applied input (lCD). Applied outputs (0). Applied tri-state output (TO). SYMBOL CONDITIONS
(vcc=+5 Vt5%, +70"C) MIN. TYP. MAX. UNIT NOTE
-VTI IIL1 IIL2 IIH1 ilH2
vOH2 vOL1 vOL2
Vl=o
Vl=o
IoH=-2 IoH=-6 IoL=4
10L=I2
High-Z
LZ95D52/M FUNCTION (Pin numbers apply -.SVMRm lPOLARml
CFMO 44-pin NAME
QFP)
FUNCTION pulse control color frame;
Color frame output
Occurs every fields NTSC mode, occurs every fields mode. input color frame signal;
CFMI
Color frame reset input
Connect external color frame signal External Synchronous rode. Connect CFMO (pin lnternai Synchronous mode Initialize mode with VINT (pin 23).
Icsu
Horizontal reset input
input resetting internal horizontal counter. open level when resetting. output color subcarrier NTSC mode. frequency signal CLKI (pin
Subcarrier output
frequency, signal reset color frame pulse CFMI (pin When (pin level mode, held level. output color subcarrier NTSC mode. When phase (pin degree,
Subcarrier output
phase degree rode. When SCOF (pin level mode, held level.
Ground Wide Horizontal drive pulse
grounding pin. output wide Horizontal drive pulse. pulse width equal that PBLK (pin repetition horizontal frequency. input resetting internal vertical counter. input pulse necessary horizontal max.
Icsu
Vertical reset input
delay from vertical synchronous start point, because counted times horizontal frequency. open level when resetting.
pulse define burst period, When CKCH (pin Burst flag level, polarity positive, when CKCH level, polarity negative. These inputs select Interlace mode Noninterlace mode, Internal Synchronous mode. Non-interlace mode, switchable lines. SELI SEL2 Non-interlace 260H 311H 262H 312H
SELI
Non-interlace mode select
SEL2
Non-interlace mode select
mode Interlace NTSC 262.5H 312.5H
LZ~5D52/M.
SYMBOL
POLARITY
NAME
FUNCTION input select standards.
mode select
LRST
Line switch reset
input resets output from (pin 14), open level when used. signal switches between every line
Line switch
mode, level line field.
ENCP
Encoder clamp pulse
clamp pulse that used recovering level. repetition horizontal frequency. When CKCH (Pin level, phase change, Composite blanking pulses.
CBLK
Composite blanking pulse
NTSC mode; 10.97 period mode; 12.12 ,US, period When CKCH (pin level, poiarity positive, when CKCH level, polarity negative.
CSYN
Composite syncronus signal Test terminal
composite synchronous signal that comforms RS-I NTSC mode CCIR mode. tests. open level Normal mode. pulse occurs start lines invert pulse (pin 31). When LZ95D71 used timing LSI, connect timing LSI. pulse occurs start every field
TSTI
Horizontal drive pulse2
drive pulse
vert pulse (pin 34). When LZ95D71 used timing LSI, connect timing LSI.
TST2
Test terminal
tests. open level Normal mode. input select main clock polariy. When LZ95D42/M used timing LSI, level, LZ95D71 used, level. polari~ CBLK (pin 16), PBLK (pin 39), (pin WBLK (pin change, phase ENCP (pin HBLK (pin change with input level.
CKCH
Clock polarity select
TST3
Test terminal
tests. open level Normal mode. When CKCH (pin level, pulse that correspondes cease period horizontal transfer pulse. When CKCH level, PUIW gate pulse burst-flag.
HBLK
Horizontal blanking pulse
U95D52/M
SYMBOL
POLARITY
NAME
FUNCTION input stop mntinue BCPI (pin BCP2 (pin pulses within vertical blanking period, level continuous output. Open level &omes LUVV level during absence effective pixels within blanking period. grounding pin. input reference clock. Connect timing Following frequencies appear this pin; NTSC mode :14.31818 when TVMI level mode :14.1875 when TVMI level Supply power. Phase comparator output input signals (pin (pin When advanced, output level, When delayed, output High level, When phases equal, terminal impedance High. input comparison signal phase comparator. open level when comparator used. pulse occurs start lines. When U95D42/M timing LSI, connect timing LSI. input reference signal phase comparator. open level when comparator used. input initializing circuit. used field-reset input, circuit initialized with dividing pulse frequency VINT (NTSC) (PAL). open level when Internal Synchronization mode initializing pulse occurs start every field. When li!95D42/M used timing LSI, connect timing LSI. pulse used detecting field. NTSC mode field; EVEN field; HIGH mode field; field; HIGH
CPMD
Clamp Pulse mode select
Ground
CLKI
Main clock
Power supply
Phase comparator output
Horizontal comparison input
Horizontal drive pulse
Horizontal reference input
VINT
Icsu
Initialize input
drive pulse
Field index
U95D52/M
SYMBOL
CPBL
POLARITY
NAME
Blanking clamp pulses (pin Low.
FUNCTION
When input High, BCPI (pin BCP2
pulse clamp optical black signal. This pulse continuous Horizontal cycle when CPMD Optical black clamp pulse (Pin CPBL (pin Low.hen CPMD High Low, output stays during absence effective pixels within Vertical blanking, otherwise continuous Horizontal cycle.
BCPZ
Optical black
BCP2 same BCPI (pin except that BCPZ delayed from
clamp pulse
Equivalent CBLK (pin pulse except shorter Pre-blanking pulse pulse width with cut-off falling edge. When CKCH (pin level, polarity positive. When CKCH level, polarity negative. pulse used color separator. signal
PBLK
Line index pulse
switches between every line. resets 273th when NTSC mode, 326th line when mode.
connection
use. Equivalent CBLK (pin except that pulse
WBLK
Wide blanking pulse
width wider than that CBLK. When CKCH (pin level, polarity positive, When CKCH level, polarity negative.
connection
use. input controlling (pin (pin
SCOF
Subcarrier
control
NTSC mode. When level, recurred. When SCOF level, held level.
Input (CMOS level). Input (CMOS level with pull-up resistor). Input (CMOS level with pull-down resistor). ICSU Schmitt-trigger Input (CMOS level with pull-up resistor) Output pin. Tri-state output pin,
TIMING DAIGRAM
NTSC, CKCH=L
LZ95D52/M
HNo. CBL; CSYN PBLK HBLK BC:: BCP2 ENCP CFM':
Lfl-Ll
F!eld
*CPMD=H, CPBL=L
(EVEN FIELD)
HNo.
2641261262
264265266
2672W
269270271272273274275
276277278279260261282
283284285266267
CBLK CSYN PBLK HBLK BCPT BCP2 ENCP
-UUU
CFM':
CPMD CPBL
LZ95D52/M
VERTICAL PULSE PAL, CKCH=L
HNo. CBLK CSYN PBLK HBLK BCPI BCP2 ENCP
621622623624625
+CPMD=H,
CPBL=L
(2nd, FIELD)
HNo. CBLK CSYN PBLK HBLK BCPI BCP2 ENCP CFMO
309310311312313314315316317 318319320321322323324325326327 328329330331322333334335336337
Bmiii;;;;:m;;;w'
*CPMD=H, CPBL=L
U95D52/M
NTSC, CKCH=H
(ODD FIELD)
HNo. CBL~ CSYN PBLK HBLK BC:: BCP2 ENCP CFM1:
LrLnr
*CPMD=H,
CPBL=L
(EVEN FIELD)
HNo.
260261262263264265266
267268269270271272273
274275276277276279
281282283284285286267
CBL~
CSYN
HBLK
~nvuul~uuuu
U-U-U-LJ
~n-n-r~
BCPI]IIL
BCPZ ENCPJnnn CFM1:
*CPMD=H,
LZ95D52/M
VERTICAL PULSE PAL, CKCH=H
(Ist, FIELD)
HNo. CBLK CSYN PBLK HBLK BCP1 BCPZ ENCP CFMO
621622623624625
Illu :!!, :!,:!
Field CPMD CPBL
(2nd, FIELD)
HNo.
W310311
312313314315316317316319320321
CBLK
CSYN PBLK
HBLK BCPT BCP2 ENCP CFMO
CPMD CPBL
LZ95D52/M
HORIZONTAL PULSE NTSC, CKCH=L
Unit
6.29
6,29
10.97
CBLK
CSYN (EQ) -314 (SAW) 4.02 6.29
BCPI BCP2 ENCP 5.94
PBLK -8.03 WBLK 2.10 HBLK 7,33
9,78
18.8
9.78
CFMO 1.57
6,29
LZ95D52/M
HORIZONTAL PULSE PAL, CKCH=L
Unit CBLK
1,59 12.12
6.34
6.34
CSYN
1,59 4,05
(EQ)
-3,17 1.59
(SAW)
7,05 9.30
0.35 2.26
BCPI
1.06 2.82
BCP2
3,17 5.99
ENCP
10,22
PBLK
-881 m,79
WBLK
2.11
HBLK
1022
CFMO
1.59
1.59
LZ95D52/M
HORIZONTAL PULSE NTSC, CKCH=H
Unit
CBLK CSYN
1.57 6.29
10.97
4.02
(EQ)
-314 (SAW) 6,77 0,35 2.23 BCPI 1.05 2,79 BCP2 3.49 ENCP 5.24 9.43 1,57
9,76 PBLK
WBLK HBLK 9.76
6.29
LZ95D52/M
HORIZONTAL PULSE PAL, CKCH=H
Unit
6.24
6,34
CBLK CSYN
6.34
12.12
1.59
4,05
(EQ)
-3,17 1,59
(SAW)
7,05 9,30
BCPI
Iffi 2,82
BCPZ ENCP
3.52 5.29
PBLK WBLK HBLK
10,22 -881 10,22
20.79
CFMO
6.24
U95D52/M
"WBLK" PULSE CKCH=L
(ODD FIELD)
HNo. CBLK
~d~.
H+1O.97PS
WBLK
118.5 H+18.86#s
(EVEN FIELD)
HNo.
~BLK
118.5 H+8.03
LIUL
(Ist, FIELD)
HNo.
WBLK
137,5 H+2079
(2nd, FIELD)
HNo. CBLK
25ti+12.1~
WBLK
137.5 H+8,81
LZ95D52/M
"WBLK"
CKCH=H
NTSC (ODD FIELD)
HNo. CBLK WBLK
H+1886fls
(EVEN FIELD)
HNo.
(1st, FIELD)
HNo.
fi+~l:
H+2079Ps
(2nd, FIELD)
HNo. CBLK
H+1212Ps
H+881
U95D52/M
"VRI" INPUT TIMING NTSC (ODD FIELD)
CSYN
(EVEN FIELD)
CSYN
nnuuuuuu
(1st, FIELD)
CSYN
+-05H
(2nd, flELD)
CSYN
"HRI" INPUT TIMING
3,14 3,49 (317 3.52)
"VINT" INPUT TIMING
Field (1st Held EVEN Feld (2ti Field)
Feld (1st Field
VINT
262.5
Initialize
U95D71M ABSOLUTE MAXIMUM RATINGS
PARAMHER Supply voltage Input voltage Output voltage Operation temperature Storage temperature SYMBOL RATING UNIT
+7.0
-0.3 VE+O.3
-0.3 +0.3
Topr Tstg
+t50
(VCC=+5 IO%, +7VC)
CHARACTERISTICS
PARAMHER Input voltage Input High voltage Input current Input High current Output High voltage Output voltage Output High voltage Output voltage Output High voltage Output voltage Output High voltage Output voltage Output High voltage
OUtDUt VOltaQe
SYMBOL
CONDITIONS
MIN.
TYP.
MAX.
UNIT
NOTE
flL1 IIL2 IIH1 ilH2
Vl=o Vl=o
IoH=-
VOHI
vOL1
VOH2 VOL2 VOH3 VOL3 VOH4 VOL4 VOH5 VOL5
la=4
IoH=-
IOH=
IoH=-8
loH= la=16
NOTES Applied
inputs (IC, ICD, ICU, OSCI).
Applied inputs (IC, ICD, OSCl). Applied input (lCD). Applied inputs (IC, ICU, OSCI). Applied input (lCD). Applied outputs OR1, OSCO). Applied output (OR1 Applied output (ORI Applied output (OR1 Applied output (OR1
LZ95D71
SYMBOL
POIARtTY
NAME
FUNCTION input reference clock oscillation. frequencies follows NTSC mode 28.63636 (1820 mode 28.37500 (1816 (fH=Horizontal frequency) input reference clock oscillation. output inverse (pin input directly control shutter speed. details, shutter control, input control shutter speed. details, shutter control. input control shutter speed. details, shutter control. input control shutter speed. details, shutter control. grounding pin. input Select Shutter mode. details, shutter control. input Select Shutter mode. details, shutter control, Pins control phase between rising edge (pin (pin 12).
Oscl
Clock input
TRIG SMDI SMD2
Osco
Clock output Trigger input Shutter speed switching input Shutter speed switching input Shutter speed switching input Ground Shutter mode select input Shutter mode select input phase control input phase control input
ORIC Reset pulse phase control input phase control input ORIA Last horizontal transfer pulse Power supply Horizontal transfer pulse Horizontal transfer pulse horizontal transfer pulse last gate CCD. tinnect without inversing driver. Supply power. horizontal transfer pulse CCD. Connect without inversing driver. horizontal transfer pulse CCD. Connect without inversing driver. reset pulse CCD. Correct through offset circuit. Pins control phase betwean falling edge (pin (pin 32).
LZ95D71
CVMRnl.
MLARITV
NAME Ground phase control input grounding pin.
FLfNCTION
Pins control phase between rising edge (pin falling edge (pin 33).
phase control input pulse that sweeps charge photodiode electrical shutter. held level Normal mode. vertical transfer pulse CCD, Connect LR36683N driver LSI. pulse that transfers charge photodiode vertical shift register, Connect LR36663N driver LSI. vertical transfer pulse CCD. Connect LR3&83N driver LSI, vertical transfer pulse CCD. Connect LR3&83N driver LSI. pulse that transfers charge photodiode vertical shift register. tinnect LR36663N driver LSI. vertical transfer pulse CCD. Connect LR36683N driver LSI, input control VHIX (pin 21), VH3X (pin 27). level open Normal VHIX VHZX. level VHIX VH2X held High level. Supply power. grounding pin. pulse clamp feed through level from CCD. pulse sample-hold signal from CCD. output color sampling pulse color demodulation based upon outpti signal froin output color sampling pulse color demodulation based output signal frcfn CCD. output driving pulse (DL1 line sampling pulse (SHI These changed with SLCT (pin 47). output driving pulse (DL2X) delay line sampling pulse (DH2). These changed with SLCT (pin 47).
OFDX
pulse output
Vertical transfer pulse
Read pulse
Vetilcal transfer pulse Vertical transfer pulse
VH3X
Read pulse
Vertical transfer pulse Read pulse contro input Power supply Ground pulse Pulse co;: ~mpling
CNTV
SPIX
ORIB
SP2X
Color sampling pulse
Pulse output
DS2X
Pulse output
LZ95D71M
SYMBOL
POLARITY
NAME SPIX, SP2X phase control input Clamp pulse
FUNCTION Pins control phase between rising edge (pin falling edge SPIX (pin SP2X (pin 35). pulse clamp dummy outputs CCD. Pins control phase between rising edge (pin falling edge SPIX (pin SP2X (pin 35).
SPIX, SP2X phase control input
frequency dividing pulse reference clock (pin Connect clock input terminal LSI. NTSC mode 14.31818 (910 mode 14.18750 (908 input select shutter speed data. level Pararell Data Input mode, level Serial Data Input mode. input horizontal reference signal. tinnect LSI. input vertical reference signal. Connect LSI, input select standards. level NTSC mode. level open mode, input Power Save mode, level open output pulses occurred. level (pin output occurred. input switching DS2X level open DL2x level SH2. test pin. open level Normal mode,
dividing
PSMD
Shutter mode select input
Horizonal reference
Vetilcal reference
TVMD
mode select
PWMD
Power save input
SLCT
Pulse select input
TEST
Test
ORI, ORIA, ORIB, ORIC, ORID Oscl Osco
Input (CMOS level). Input (CMOS level with pull resistor). Input (CMOS level with pull down resistor). Output pin. Input oscillation. Output oscillation.
LZ95D71
NOTES
Shutter Speed Control Shutter mode
TRIG
SMDI
SMD2
SHUTTER MODE
Normal mode Flicker-less Shutter mode High Speed Shutter mode
This mode Normal Shutter mode. 1/60 NTSC mode, 1/50 mode Flicker-less mode. 1/100 NTSC mode, 1/120 mode. This mode higher shutter speed than Normal mode. This mode effective High Spaed Shutter mode. OFDX pulse held level after TRIG input "Low". Whenever TRIG input "Low" shutter stopped FlickerIess Shutter mode High Speed Shutter mode. necessary with EDo= ED2= (1/1 0000 wide variable shutter speed.
External Shutter mode
Input format etrutier speed control date PSMD INPLIT FORMAT
Pararell data input
There 8-shutter speed. (NTSC), (PAL), /250, /500, 000, 000, 1/4000, l/lomo possible switching period. strobe, clock, data
Serial data input
Pararell data input
MODE TVMD PSMD SMD1 SMD2
SH~ER SPEED
Normal mode Flicker-less mode
1/100 1/120 1/125 /250 /500 1/10000
High Speed Shutter mode
LZ95D71M
Sarial data inpti
(Strobe)
(Clock)
(Data) (LSB) SMD2 Dummy (MSB)
calculate method shutter speed, NTSC 249) 63.56+25.28 (2505 ns509) 299) 64.00+25.52 (200< n<509)
Sbulter tabla
lfMD
SMD2 PSMD
[Fin
SERIAL DATA
.SHWER SPEED
1/10000
1256 1/2127 /501 /252 1/125 1/100 1/11 1/2112 /498 /250 1/125 1/120 1/100 1/120
/500 /250 1/125 1/100 1/10000 /500 /250 1/125 1/120 1/100 1/120
LZ95D71M
Characteristics Serial Data
SYMBOL
CON~
pulse width Setup time Setup time SetuD time
MIN. MAX.
\20ns150ys 120nsl
Hold time

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