December 1998 General Functional Changes Additions full duplex isochro

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December 1998 General Functional Changes Additions full duplex isochro

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PDI1394L21 Full Duplex Link Layer Controller Differences Between
December 1998 General Functional Changes Additions full duplex isochronous part, ports transmit receive isochronous data simultaneously (during same cycle). able provide port clocks (both receiving transmitting) desired. Three frequencies available 6.144, 12.288, 24.576 MHz. Note: frequencies indicated here subject errata item, actual frequencies produced part those shown above. Quadlets each) FIFOs isochronous receive transmit buffers Asynchronous read request buffer increased size from Quadlets Quadlets. Four field deep buffer added allow AVFSYNC frequencies KHz. greatly facilitates using field synchronization digital audio applications. Available both LQFP TQFP packages using same square footprint. uses rectangular package. Clarified single capacitor line, 1394-1995, Annex type isolation schemes. AVENKEY pins added facilitate testing isochronous data encryption. used other synchronization functions also. AVFSYNC pins made bi-directional instead having each function.
Specific Changes page-by-page order from data sheet dated 98): Page configuration. pin-out, (with Link-PHY interface hold pins identified) Page Functional Internal diagrams changed show added port, AVENKEY pins, buffer memory.
Page Application diagram. full duplex functions shown. Page Interface ports shown. note direction bits GLOBCSR register. Note clarification ISO_N Page Added clarification hold isolation circuitry. Page isochronous buffers shown, asynchronous read request queue increased Quadlets. Note that interface user definable delays from cycles. Page LNKPHYINTACK register (0x008), (TxRDY) been deleted. IRXINTACK register (0x04C), bits have been added, bits IRX9LFT IRXHALF respectively. ITXINTACK register (0x02C), bits have been added, bits ITX9LFT ITXHALF respectively. Page IDREG register (0x000) been changed indicate part code (=01H) version code (=01H) LNKCTL (0x004) register; TXRDY, been added (moved from 0x008). LNKPHYINTACK register (0x008), been moved LNKCTL register. LNKPHYINTE register (0x00C), been deleted, ETXRDY. GLOBCSR register (0x018), changed, bits added full duplex. ITXPKCTL register (0x020), TXAP_CLK bits added, ENXTMSTP added, SYT_DELAY bits added. ITXINTACK register (0x02C), bits added, ITXHALF ITX9LFT ITXINTE register (0x030), bits added, EITXHALF EITX9LFT Page ITXCTL register (0x034), re-defined ODD/EVEN read-only bit. ITXMEM register (0x038), bits added, ITXMHALF ITXM9LFT. IRXPKCTL register (0x40), RXAP_CLK bits added, SNDIMM added, DIS_TSC added IRXINTACK register (0x04C) IRX9LFT IRXHALF bits added. IRXINTE register (0x050) EIRX9LFT EIRXHALF bits added. IRXCTL register (0x054) ODD/EVEN re-defined made read-only. IRXMEM register (0x058) IRXM9LFT IRXMHALF bits added. Page ASYCTL register (0x080) added, DIS_BCAST Page Part version codes explained. TXRDY flag explained.
Page Section 13.1.3 removed. Page Section 13.1.4 removed. Page Section 13.1.7 GLOBCSR bits explained Page Section 13.2.1 ITXPKCTL bits explained. TXAP_CLK, ENXTMSTP, SYT_DELAY
Page Section 13.2.4 ITXINTACK bits explained. Section 13.2.5 ITXINTE bits shown. Page Section 13.2.6 ITXCTL (ODD/EVEN) explained. Section 13.2.7 ITXMEM bits explained. Page Section 13.2.8 IRXPKCTL, RXAP_CLK bits explained. SNDIMM DIS_TSC bits explained. Page Section 13.2.11 IRXINTACK bits explained. Page Section 13.2.12 IRXINTE bits explained. Section 13.2.13 IRXCTL (ODD/EVEN) explained. Page Section 13.2.14 IRXMEM bits explained. Page Section 13.3.1 ASYCTL DIS_BCAST explained. Page Section 14.0, Input leakage current category changed Active supply current changed milliamps, idle. Page Table categories defined. AVxFSYNC AVxCLK category AVxENKEY. Section 15.0, clock output delay time changed from max. clock output high (min) time clock output (min) time link output delay time 10.0 Host data release time added Page Section 16.3 System clock period timing diagram corrected. Section 16.4 parameter placed timing diagram (data hold state) CHANGES ADDITIONS

December 1998 General Functional Changes Additions full duplex isochro

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