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74HCU04 identical pinout LS04 MC14069UB. device inputs compatible with
Top Searches for this datasheet74HCU04 Unbuffered Inverter 74HCU04 identical pinout LS04 MC14069UB. device inputs compatible with standard CMOS outputs; with pullup resistors, they compatible with LSTTL outputs. This device consists single-stage inverters. These inverters well suited oscillators, pulse shapers, many other applications requiring high-input impedance amplifier. digital applications, HC04 recommended. http://onsemi.com MARKING DIAGRAMS SOIC-14 SUFFIX CASE 751A HCU04G AWLYWW Output Drive Capability: LSTTL Loads Outputs Directly Interface CMOS, NMOS, Operating Voltage Range: Oscillator Configurations Input Current: High Noise Immunity Characteristic CMOS Devices Compliance With JEDEC Standard Requirements Performance: 2000 Machine Model Chip Complexity: FETs Equivalent Gates These Pb-Free Devices TSSOP-14 SUFFIX CASE 948G ALYWG HCU04 Specific Device Code Assembly Location Wafer Year Work Week Pb-Free Package (Note: Microdot either location) ORDERING INFORMATION detailed ordering shipping information package dimensions section page this data sheet. Semiconductor Components Industries, LLC, 2007 March, 2007 Rev. Publication Order Number: 74HCU04/D 74HCU04 ASSIGNMENT LOGIC DIAGRAM FUNCTION TABLE Inputs Outputs ORDERING INFORMATION Device 74HCU04DR2G 74HCU04DTR2G Package SOIC-14 (Pb-Free) TSSOP-14* Shipping 2500 Tape Reel information tape reel specifications, including part orientation tape sizes, please refer Tape Reel Packaging Specifications Brochure, BRD8011/D. *This package inherently Pb-Free. http://onsemi.com 74HCU04 MAXIMUM RATINGS Symbol Iout Tstg Vout Parameter Value Unit Supply Voltage (Referenced GND) Input Voltage (Referenced GND) Output Voltage (Referenced GND) Input Current, Output Current, Supply Current, Pins Power Dissipation Still Storage Temperature Lead Temperature, from case Seconds SOIC TSSOP Package SOIC Package TSSOP Package This device contains protection circuitry guard against damage high static voltages electric fields. However, precautions must taken avoid applications voltage higher than maximum rated voltages this high-impedance circuit. proper operation, Vout should constrained range (Vin Vout) VCC. Unused inputs must always tied appropriate logic voltage level (e.g., either VCC). Unused outputs must left open. Stresses exceeding Maximum Ratings damage device. Maximum Ratings stress ratings only. Functional operation above Recommended Operating Conditions implied. Extended exposure stresses above Recommended Operating Conditions affect device reliability. Derating SOIC Package: -7mW/_C from 125_C TSSOP Package: mW/_C from 125_C high frequency heavy load considerations, Chapter Semiconductor High-Speed CMOS Data Book (DL129/D). RECOMMENDED OPERATING CONDITIONS Symbol Vin, Vout Parameter Supply Voltage (Referenced GND) Input Voltage, Output Voltage (Referenced GND) Operating Temperature, Package Types Input Rise Fall Time (Figure Limit Unit http://onsemi.com 74HCU04 ELECTRICAL CHARACTERISTICS (Voltages Referenced GND) Guaranteed Limit 85_C 2.26 3.76 5.26 0.32 0.37 0.37 ±1.0 Symbol Parameter Test Conditions |Iout| |Iout| |Iout| |Iout| |Iout| |Iout| 25_C 2.36 3.86 5.36 0.32 0.32 0.32 ±0.1 125_C 2.20 3.70 5.20 0.32 0.40 0.40 ±1.0 Unit Minimum High-Level Input Voltage Vout |Iout| Maximum Low-Level Input Voltage Vout |Iout| Minimum High-Level Output Voltage |Iout| Maximum Low-Level Output Voltage |Iout| Maximum Input Leakage Current Maximum Quiescent Supply Current (per Package) Iout Information typical parametric values found Chapter Semiconductor High-Speed CMOS Data Book (DL129/D). Vout ELECTRICAL CHARACTERISTICS Input Guaranteed Limit 85_C Symbol tPLH, tPHL Parameter 25_C 125_C Unit Maximum Propagation Delay, Input Output (Figures tTLH, tTHL Maximum Output Transition Time, Output (Figures Maximum Input Capacitance propagation delays with loads other than Chapter Semiconductor High-Speed CMOS Data Book (DL129/D). Information typical parametric values found Chapter Semiconductor High-Speed CMOS Data Book (DL129/D). Typical 25°C, Power Dissipation Capacitance (Per Inverter)* Used determine no-load dynamic power consumption: VCC2 load considerations, Chapter Semiconductor High-Speed CMOS Data Book (DL129/D). http://onsemi.com 74HCU04 TYPICAL APPLICATIONS TEST POINT INPUT tPHL OUTPUT tTHL tTLH *Includes probe capacitance tPLH DEVICE UNDER TEST OUTPUT Figure Switching Waveforms Figure Test Circuit Figure Logic Detail (1/6 Device Shown) HCU04A HCU04A HCU04A Vout HCU04A Vout Figure Crystal Oscillator Figure Stable Oscillator INPUT HCU04A HCU04A Vout OUTPUT HCU04A Figure Schmitt Trigger Figure High Input Impedance Single-Stage Amplifier with Supply Range http://onsemi.com 74HCU04 TYPICAL APPLICATIONS HCU04A HCU04A INPUT HCU04A HCU04A OUTPUT reduced power supply current, high-efficiency LEDs such Hewlett-Packard HLMP series equivalent. Figure Multi-Stage Amplifier Figure Driver http://onsemi.com 74HCU04 PACKAGE DIMENSIONS SOIC-14 CASE 751A-03 ISSUE 0.25 (0.010) NOTES: DIMENSIONING TOLERANCING ANSI Y14.5M, 1982. CONTROLLING DIMENSION: MILLIMETER. DIMENSIONS INCLUDE MOLD PROTRUSION. MAXIMUM MOLD PROTRUSION 0.15 (0.006) SIDE. DIMENSION DOES INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL 0.127 (0.005) TOTAL EXCESS DIMENSION MAXIMUM MATERIAL CONDITION. SEATING PLANE 0.25 (0.010) MILLIMETERS 8.55 8.75 3.80 4.00 1.35 1.75 0.35 0.49 0.40 1.25 1.27 0.19 0.25 0.10 0.25 5.80 6.20 0.25 0.50 INCHES 0.337 0.344 0.150 0.157 0.054 0.068 0.014 0.019 0.016 0.049 0.050 0.008 0.009 0.004 0.009 0.228 0.244 0.010 0.019 SOLDERING FOOTPRINT* 7.04 0.58 1.52 1.27 PITCH DIMENSIONS: MILLIMETERS *For additional information Pb-Free strategy soldering details, please download Semiconductor Soldering Mounting Techniques Reference Manual, SOLDERRM/D. http://onsemi.com 74HCU04 PACKAGE DIMENSIONS TSSOP-14 CASE 948G-01 ISSUE 0.10 (0.004) 0.15 (0.006) 0.25 (0.010) IDENT. DETAIL NOTES: DIMENSIONING TOLERANCING ANSI Y14.5M, 1982. CONTROLLING DIMENSION: MILLIMETER. DIMENSION DOES INCLUDE MOLD FLASH, PROTRUSIONS GATE BURRS. MOLD FLASH GATE BURRS SHALL EXCEED 0.15 (0.006) SIDE. DIMENSION DOES INCLUDE INTERLEAD FLASH PROTRUSION. INTERLEAD FLASH PROTRUSION SHALL EXCEED 0.25 (0.010) SIDE. DIMENSION DOES INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL 0.08 (0.003) TOTAL EXCESS DIMENSION MAXIMUM MATERIAL CONDITION. TERMINAL NUMBERS SHOWN REFERENCE ONLY. DIMENSION DETERMINED DATUM PLANE -W-. MILLIMETERS 4.90 5.10 4.30 4.50 1.20 0.05 0.15 0.50 0.75 0.65 0.50 0.60 0.09 0.20 0.09 0.16 0.19 0.30 0.19 0.25 6.40 INCHES 0.193 0.200 0.169 0.177 0.047 0.002 0.006 0.020 0.030 0.026 0.020 0.024 0.004 0.008 0.004 0.006 0.007 0.012 0.007 0.010 0.252 0.15 (0.006) SECTION 0.10 (0.004) SEATING PLANE DETAIL SOLDERING FOOTPRINT* 7.06 0.36 1.26 *For additional information Pb-Free strategy soldering details, please download Semiconductor Soldering Mounting Techniques Reference Manual, SOLDERRM/D. http://onsemi.com 0.65 PITCH DIMENSIONS: MILLIMETERS 74HCU04 Semiconductor registered trademarks Semiconductor Components Industries, (SCILLC). SCILLC reserves right make changes without further notice products herein. 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