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74HC125 Quad 3-State Noninverting Buffers


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74HC125 Quad 3-State Noninverting Buffers
High-Performance Silicon-Gate CMOS
The 74HC125 is identical in pinout to the LS125. The device inputs are compatible with standard CMOS outputs with pullup resistors, they are compatible with LSTTL outputs. The HC125 noninverting buffer is designed to be used with 3-state memory address drivers, clock drivers, and other bus-oriented systems. The device has four separate output enables that are active-low.
Features
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14 SOIC-14 D SUFFIX CASE 751A 1 HC125G AWLYWW
14 14 1 TSSOP-14 DT SUFFIX CASE 948G 1 HC 125 ALYWG G
ORDERING INFORMATION
See detailed ordering and shipping information in the package dimensions section on page 4 of this data sheet.
March, 2007 - Rev. 0
Publication Order Number: 74HC125 / D
74HC125
PIN ASSIGNMENT
LOGIC DIAGRAM HC125 Active-Low Output Enables
FUNCTION TABLE
OE3 A4 OE4
MAXIMUM RATINGS
This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high-impedance circuit. For proper operation, Vin and Vout should be constrained to the range GND v (Vin or Vout) v VCC. Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or VCC). Unused outputs must be left open.
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74HC125
RECOMMENDED OPERATING CONDITIONS
DC ELECTRICAL CHARACTERISTICS (Voltages Referenced to GND)
Maximum Low-Level Input Voltage
Minimum High-Level Output Voltage
Maximum Low-Level Output Voltage
Iin IOZ
Maximum Input Leakage Current Maximum Three-State Leakage Current Maximum Quiescent Supply Current (per Package)
NOTE: Information on typical parametric values can be found in Chapter 2 of the ON Semiconductor High-Speed CMOS Data Book (DL129 / D).
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74HC125
tPLZ, tPHZ
Maximum Propagation Delay, Output Enable to Y (Figures 2 and 4)
tPZL, tPZH
Maximum Propagation Delay, Output Enable to Y (Figures 2 and 4)
tTLH, tTHL
Maximum Output Transition Time, Any Output (Figures 1 and 3)
Cin Cout
Maximum Input Capacitance Maximum 3-State Output Capacitance (Output in High-Impedance State)
ORDERING INFORMATION
Device 74HC125DR2G 74HC125DTR2G Package SOIC-14 (Pb-Free) TSSOP-14 Shipping 2500 / Tape & Reel 2500 / Tape & Reel
For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011 / D. This package is inherently Pb-Free.
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74HC125
SWITCHING WAVEFORMS
OE (HC125A)
OUTPUT Y
Figure 1.
Figure 2.
TEST POINT OUTPUT DEVICE UNDER TEST C L DEVICE UNDER TEST
TEST POINT OUTPUT 1 kW CONNECT TO VCC WHEN TESTING tPLZ AND tPZL. CONNECT TO GND WHEN TESTING tPHZ and tPZH.
Includes all probe and jig capacitance
Figure 3. Test Circuit
Figure 4. Test Circuit
VCC OE
HC125 (1 / 4 OF THE DEVICE)
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74HC125
PACKAGE DIMENSIONS
SOIC-14 CASE 751A-03 ISSUE H
P 7 PL 0.25 (0.010)
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION.
SEATING PLANE
D 14 PL 0.25 (0.010)
SOLDERING FOOTPRINT
1.27 PITCH
DIMENSIONS: MILLIMETERS
For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM / D.
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74HC125
PACKAGE DIMENSIONS
TSSOP-14 CASE 948G-01 ISSUE B
14X K REF
0.10 (0.004) 0.15 (0.006) T U
0.25 (0.010) M
PIN 1 IDENT. 1 7
0.15 (0.006) T U
SECTION N-N -W-
C 0.10 (0.004) -T- SEATING
PLANE
DETAIL E
SOLDERING FOOTPRINT
For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM / D.
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0.65 PITCH
DIMENSIONS: MILLIMETERS
74HC125
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303-675-2175 or 800-344-3860 Toll Free USA / Canada Fax: 303-675-2176 or 800-344-3867 Toll Free USA / Canada Email: orderlit@onsemi.com N. American Technical Support: 800-282-9855 Toll Free USA / Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81-3-5773-3850 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com / orderlit For additional information, please contact your local Sales Representative
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74HC125 / D