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74HC04 Hex Inverter

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74HC04 Hex Inverter
High-Performance Silicon-Gate CMOS
The 74HC04 is identical in pinout to the LS04 and the MC14069. The device inputs are compatible with Standard CMOS outputs with pullup resistors, they are compatible with LSTTL outputs. The device consists of six three-stage inverters.
Features
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LOGIC DIAGRAM
14 14 1 SOIC-14 D SUFFIX CASE 751A 1 HC04G AWLYWW
14 14 1 TSSOP-14 DT SUFFIX CASE 948G 1 HC 04 ALYW G G
FUNCTION TABLE
A6 13 12 Y6 Inputs A Outputs Y H L
Pinout: 14-Lead Packages (Top View)
ORDERING INFORMATION
See detailed ordering and shipping information in the package dimensions section on page 2 of this data sheet.
March, 2007 - Rev. 1
Publication Order Number: 74HC04 / D
74HC04
MAXIMUM RATINGS
RECOMMENDED OPERATING CONDITIONS
ORDERING INFORMATION
Device 74HC04DR2G 74HC04DTR2G Package SOIC-14 (Pb-Free) TSSOP-14 Shipping 2500 / Tape & Reel
For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011 / D. This package is inherently Pb-Free.
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74HC04
DC CHARACTERISTICS (Voltages Referenced to GND)
Maximum Low-Level Input Voltage
Minimum High-Level Output Voltage
Maximum Low-Level Output Voltage
Iin ICC
Maximum Input Leakage Current Maximum Quiescent Supply Current (per Package)
NOTE: Information on typical parametric values can be found in Chapter 2 of the ON Semiconductor High-Speed CMOS Data Book (DL129 / D).
Symbol tPLH, tPHL Parameter Maximum Propagation Delay, Input A or B to Output Y (Figures 1 and 2) VCC (V) 2.0 3.0 4.5 6.0 2.0 3.0 4.5 6.0 Guaranteed Limit -55 to 25°C 75 30 15 13 75 27 15 13 10 85°C 95 40 19 16 95 32 19 16 10 125°C 110 55 22 19 110 36 22 19 10 Unit ns
tTLH, tTHL
Maximum Output Transition Time, Any Output (Figures 1 and 2)
Maximum Input Capacitance
VCC . For load considerations, see Chapter 2 of the
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74HC04
Figure 1. Switching Waveforms
TEST POINT OUTPUT DEVICE UNDER TEST C L
Includes all probe and jig capacitance
Figure 2. Test Circuit
Figure 3. Expanded Logic Diagram (1 / 6 of the Device Shown)
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74HC04
PACKAGE DIMENSIONS
SOIC-14 CASE 751A-03 ISSUE H
P 7 PL 0.25 (0.010)
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION.
SEATING PLANE
D 14 PL 0.25 (0.010)
SOLDERING FOOTPRINT
1.27 PITCH
DIMENSIONS: MILLIMETERS
For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM / D.
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74HC04
PACKAGE DIMENSIONS
TSSOP-14 CASE 948G-01 ISSUE B
14X K REF
0.10 (0.004) 0.15 (0.006) T U
0.25 (0.010) M
PIN 1 IDENT. 1 7
0.15 (0.006) T U
SECTION N-N -W-
C 0.10 (0.004) -T- SEATING
PLANE
DETAIL E
SOLDERING FOOTPRINT
For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM / D.
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0.65 PITCH
DIMENSIONS: MILLIMETERS
74HC04
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303-675-2175 or 800-344-3860 Toll Free USA / Canada Fax: 303-675-2176 or 800-344-3867 Toll Free USA / Canada Email: orderlit@onsemi.com N. American Technical Support: 800-282-9855 Toll Free USA / Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81-3-5773-3850 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com / orderlit For additional information, please contact your local Sales Representative
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74HC04 / D