Qualification Package 2.7V With Shutdown High Output Nationa
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LMV711 LMV710
Qualification Package
2.7V With Shutdown High Output
National's LMV711 Offers 5V/µs Slew Rate,
Noise Drives Load 2.7V Guaranteed 2.7V
Available SOT23 Package Offered Non-shutdown Version: LMV710
LMV711 offers enhanced specifications designs where current consumption output drive primary concerns portable consumer designs.
LMV710/711 QUALIFICATION PACKAGE
Summer 2000
Table Contents
Introduction General Product Description Technical Product Description Reliability/Qualification Overview Technical Assistance Device Information Datasheet Photos 2.2.1 LMV710 2-20 2.2.2 LMV711 2-21 Process Information Process Flow Process Detail Masks. Masking Sequences 3.3.1 LMV710. 3.3.1 LMV711. Manufacturing Process Flow Packaging Information Package Material Package Dimensions 4.2.1 SOT23-5 4.2.2 SOT23-6 Tape Reel Dimensions 4.3.1 Tape Dimensions. 4.3.2 Reel Dimensions Reliability Data Reliability Report Models Characterization Data Test Name Datasheet Parameter Table Parametric Distribution Graphs.
INTRODUCTION
INTRODUCTION
General Product Description
This qualification booklet covers general-purpose Operational Amplifiers, LMV710 LMV711, available SOT23 5-Lead SOT23 6-Lead packages, respectively. LMV711 extra lead shutdown function. Single Single with Shutdown Function LMV710M5/M5X (SOT23-5L package) LMV711M6/M6X (SOT23-6L package)
LMV710 LMV711 products feature voltage operation (2.7V 5.0V), power, rail-to-rail input/output, high output current drive, shutdown option.
Technical Product Description
LMV710 LMV711 products manufactured using National Semiconductor's advanced Submicron Silicon Gate BiCMOS process. internal name this process CS80CBi, which uses 6inch diameter wafers. LMV710 LMV711 BiCMOS operational amplifiers with CMOS input stage. Both devices have rail-to-rail input common mode voltage, rail-to-rail output, high output current drive. They offer bandwidth 5MHz (typ), slew rate 5V/µs, input-referred voltage noise 20nV/Hz (typ). LMV711 separate shutdown which used disable device reduce supply current 0.002µA (typical, 2.7V operation) conserve battery life. This makes ideal solution power sensitive applications, such cellular phones, pagers, palm computers, other batterypowered, portable electronics. addition, LMV710 offered tiny, space saving SOT23-5L package, LMV711 offered similar SOT23-6L package. These small packages designed meet increasing need smaller smaller portable consumer electronic products. LMV710 LMV711 devices ideal P.A. Control Loop applications, well other applications, such Peak Detectors High Side Current Sensors.
Reliability/Qualification Overview
LMV710 LMV711 have successfully satisfied reliability requirements qualification plan Q1999990530, final report (FSC20000145) included section 5.1. SOT23 packages already qualified with numerous CS80CBi processed products fabricated Fairchild Semiconductor. These products include LMV721, LMV321, LMV1XX, LMV821.
Technical Assistance
Product Engineer
LMV710 LMV711 Noel Email: noel.sy@nsc.com Tel: 408-721-8637
Applications Engineer
LMV710 LMV711 Muna Acosta Email: muna.acosta@nsc.com Tel: 408-721-5517
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LMV710/711 Qualification Package
DEVICE INFORMATION
DEVICE INFORMATION
Datasheet
LMV710 LMV711 Power, RRIO Operational Amplifiers with High Output Current Drive Shutdown Option
June 2000
LMV710 LMV711 Power, RRIO Operational Amplifiers with High Output Current Drive Shutdown Option
General Description
LMV710 LMV711 BiCMOS operational amplifiers with CMOS input stage. Both devices have greater than input common mode voltage range, rail-to-rail output high output current drive. They offer bandwidth 5MHz slew rate 5V/µs. LMV711, separate shutdown used disable device reduces supply current 0.2µA (typical). LMV711 features turn time less than 10µs. ideal solution power sensitive applications, such cellular phone, pager, palm computer, etc. LMV710 offered space saving SOT23-5 Tiny package. LMV711 offered space saving SOT23-6 Tiny package. LMV710/711 designed meet demands power, cost, small size required cellular phones similar battery powered portable electronics.
Features
(For Supply, Typical Unless Otherwise Noted). offset voltage 3mV, Gain-bandwidth product 5MHz, Slew rate 5V/µs, Space saving packages SOT23-5 SOT23-6 10µs Turn time from shutdown Industrial temperature range -40°C +85°C Supply current shutdown mode 0.2µA, Guaranteed 2.7V Performance Unity gain stable Rail-to-rail input output Capable driving load
Applications
Wireless phones GSM/TDMA/CDMA power control AGC, power detector Temperature compensation Wireless Bluetooth HomeRF
Typical Application
High Side Current Sensing
DS101325-13
2000 National Semiconductor Corporation
DS101325
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LMV710/711 Qualification Package
DEVICE INFORMATION
LMV710 LMV711
Connection Diagrams
5-Pin SOT23-5 LMV710 6-Pin SOT23-6 LMV711
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View
View
Ordering Information
Package Temperature Range Industrial -40°C +85°C LMV710M5 LMV710M5X 6-Pin SOT23-6 LMV711M6 LMV711M6X Packaging Marking A48A A48A A47A A47A Transport Media Drawing
5-Pin SOT23-5
Units Tape Reel Units Tape Reel Units Tape Reel Units Tape Reel
MF05A MF06A
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LMV710 LMV711
Absolute Maximum Ratings (Note
Military/Aerospace specified devices required, please contact National Semiconductor Sales Office/ Distributors availability specifications. Tolerance (Note Machine Model Human Body Model Differential Input Voltage Voltage Input/Output Supply Voltage Output Short Circuit Output Short Circuit Current Input 200V 2000V
Mounting Temp. Infrared Convection sec) Storage Temperature Range Junction Temperature(TJMAX) (Note 235°C -65°C 150°C 150°C
Operating Ratings (Note
Supply Voltage Temperature Range Thermal Resistance (JA) MF05A Package, 5-Pin SOT23-5 MF06A package, 6-Pin SOT23-6 °C/W °C/W 2.7V 5.0V -40°C 85°C
Supply Voltage
(V+) 0.4V (V-) 0.4V 5.5V (Note (Note
10mA
2.7V Electrical Characteristics
Unless otherwise specified, limits guaranteed 25°C. 2.7V, limits apply temperature extremes. Symbol CMRR PSRR Parameter Input Offset Voltage Input Bias Current Common Mode Rejection Ratio Power Supply Rejection Ratio 2.7V 2.7V 0.85V 2.7V 1.85V Input Common-Mode Voltage Range Output Short Circuit Current CMRR 50dB Sourcing Sinking 2.7V Output Swing 1.35V Condition 0.85V 1.85V
1.35V Boldface (Note -0.3 2.68 0.01 -0.2 2.62 2.60 0.12 0.15 2.52 2.50 0.23 0.30 Limits (Note Units
1.35V
2.55 0.05
(SD)
Output Voltage Level Shutdown Mode Supply Current Mode Shutdown Mode,
1.22 0.002
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LMV710 LMV711
2.7V Electrical Characteristics
Symbol Parameter Large Signal Voltage
(Continued)
Unless otherwise specified, limits guaranteed 25°C. 2.7V, limits apply temperature extremes. Condition Sourcing 1.35V 2.3V Sinking 0.4V 1.35V Sourcing 1.35V 2.2V Sinking 0.5V 1.35V GBWP Slew Rate Gain-Bandwidth Product Phase Margin Turn-on Time from Shutdown Shutdown Voltage Range Input-Referred Voltage Noise Mode Shutdown Mode 1kHz (Note
1.35V Boldface (Note Limits (Note Units V/µs
3.2V Electrical Characteristics
Unless otherwise specified, limits guaranteed 25°C. 3.2V, 1.6V. Boldface limits apply temperature extremes. Symbol Output Swing Parameter 6.5mA Conditions (Note 0.01 Limit (Note 2.95 2.92 0.18 0.25 Units
Electrical Characteristics
Unless otherwise specified, limits guaranteed 25°C. apply temperature extremes. Symbol CMRR PSRR Parameter Input Offset Voltage Input Bias Current Common Mode Rejection Ratio Power Supply Rejection Ratio 2.7V 0.85V 2.7V 1.85V Input Common-Mode Voltage Range CMRR 50dB
2.5V, Boldface limTyp (Note -0.3 -0.2 Limits (Note Units
Condition 0.85V 1.85V
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LMV710 LMV711
Electrical Characteristics
Symbol Parameter Output Short Circuit Current
(Continued)
Unless otherwise specified, limits guaranteed 25°C. apply temperature extremes.
2.5V, Boldface limTyp (Note 4.98 0.01 Limits (Note 4.92 4.90 0.12 0.15 4.82 4.80 0.23 Units V/µs
Condition Sourcing Sinking
Output Swing
2.5V
2.5V
4.85 0.05
(SD)
Output Voltage Level Shutdown Mode Supply Current Mode Shutdown Mode
1.17
Large Signal Voltage Gain
Sourcing 2.5V 4.6V Sinking 0.4V 2.5V Sourcing 2.5V 4.5V Sinking 0.5V 2.5V
GBWP
Slew Rate Gain-Bandwidth Product Phase Margin Turn-on Time from Shutdown Shutdown Voltage Range Input-Referred Voltage Noise
(Note
Mode Shutdown Mode 1kHz
Note Absolute Maximum Ratings indicate limits beyond which damage device occur. Operating Ratings indicate conditions which device intended functional, specific performance guaranteed. guaranteed specifications test conditions, Electrical Characteristics. Note Human body model, series with 100pF. Machine model, series with 100pF. Note Shorting circuit output will adversely affect reliability. Note Shorting circuit output will adversely affect reliability. Note maximum power dissipation function TJ(max), maximum allowable power dissipation ambient temperature (TJ(max) A)/JA. numbers apply packages soldered directly into board. Note Typical values represent most likely parametric norm. Note limits guaranteed testing statistical analysis. Note Number specified slower positive negative slew rates.
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LMV710/711 Qualification Package
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LMV710 LMV711
Typical Performance Characteristics
Supply Current Supply Voltage Mode)
Unless otherwise specified, +5V, single supply, 25°C. LMV711 Supply Current Supply Voltage (Shutdown Mode)
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Output Positive Swing Supply Voltage
Output Negative Swing Supply Voltage
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Output Positive Swing Supply Voltage
Output Negative Swing Supply Voltage
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DS101325-32
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LMV710 LMV711
Typical Performance Characteristics
25°C. (Continued) Output Positive Swing Supply Voltage
Unless otherwise specified, +5V, single supply,
Output Negative Swing Supply Voltage
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Input Voltage Noise Frequency
PSRR Frequency
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CMRR Frequency
LMV711 Turn Characteristics
DS101325-38 DS101325-37
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LMV710/711 Qualification Package
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LMV710 LMV711
Typical Performance Characteristics
25°C. (Continued) Sourcing Current Output Voltage
Unless otherwise specified, +5V, single supply,
Sinking Current Output Voltage
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THD+N Frequency
THD+N Frequency 2.7V)
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THD+N VOUT
THD+N VOUT
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LMV710 LMV711
Typical Performance Characteristics
25°C. (Continued)
Unless otherwise specified, +5V, single supply,
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CDIFF 2.7V)
CDIFF
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Open Loop Frequency Response
Open Loop Frequency Response
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DS101325-10
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LMV710 LMV711
Typical Performance Characteristics
25°C. (Continued) Open Loop Frequency Response
Unless otherwise specified, +5V, single supply,
Open Loop Frequency Response
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Open Loop Frequency Response
Open Loop Frequency Response
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Non-Inverting Large Signal Pulse Response
Non-Inverting Small Signal Pulse Response
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DS101325-2
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LMV710 LMV711
Typical Performance Characteristics
25°C. (Continued) Inverting Large Signal Pulse Response
Unless otherwise specified, +5V, single supply,
Inverting Small Signal Pulse Response
DS101325-4
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DS101325-50
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LMV710/711 Qualification Package 2-11
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LMV710 LMV711
Application Note
Supply Bypassing application circuits this datasheet show power supply connections associated bypass capacitors simplification. When circuits built, always required have bypass capacitors. Ceramic disc capacitors (0.1µF) solid tantalum (1µF) with short leads, located close usually necessary prevent interstage coupling through power supply internal impedance. Inadequate bypassing will manifest itself frequency oscillation high frequency instabilities. Sometimes, 10µF larger) capacitor used absorb frequency variations smaller 0.1µF disc paralleled across prevent high frequency feedback through power supply lines. Shutdown Mode LMV711 shutdown pin. conserve battery life portable applications, LMV711 disabled when shutdown voltage pulled low. During shutdown mode, output stays about 50mV from lower rail, current drawn from power supply 0.2µA (typical). This makes LMV711 ideal solution power sensitive applications. shutdown can't left unconnected. case shutdown operation needed, shutdown should connected when LMV711 used, LMV710 used. Leaving shutdown floating will result undefined operation mode, either shutdown active, even oscillating between modes. Rail-to-Rail Input rail-to-rail input achieved using paralleled PMOS NMOS differential input stages. (See Simplified Schematics this datasheet). When common mode input voltage changes from ground positive rail, input stage goes through three modes. First, NMOS pair cutoff PMOS pair active. around 1.4V, both PMOS NMOS pairs operate, finally PMOS pair cutoff NMOS pair active. Since both input stages have their offset voltage (VOS), offset amplifier becomes function common-mode input voltage. curves curve section. shown curve, crossover point 1.4V above Proper design must done both coupled applications avoid problems. large input signals that include crossover point their dynamic range, will cause distortion output signal. avoid such distortion keep signal away from crossover point. example, unity gain buffer configuration with peak-to-peak signal center 2.5V will contain input-crossover distortion. avoid this, input signal should centered 3.5V instead. Another avoid large signal distortion gain circuit which avoids voltage excursions input terminals amplifier. Figure this circuit, common mode voltage (VCM) level away from crossover point.
DS101325-52
FIGURE When input small signal this small signal falls inside transition range, gain, CMRR some other parameters will degraded. resolve this problem, small signal should placed such that avoids crossover point. achieve maximum output swing, output should biased mid-supply. This normally done biasing input mid-supply. with supply voltage range from 3.4V, input should biased mid-supply because transition VOS. Figure shows example away from crossover point maintain maximum swing with 2.7V supply. Figure shows waveforms VOUT.
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FIGURE
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FIGURE inputs driven 300mV beyond supply rails without causing phase reversal output. However, inputs should allowed exceed maximum ratings.
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LMV710 LMV711
Application Note
(Continued)
Compensation Input Capacitance application (Figure where large feedback resistor used, feedback resistor react with input capacitance introduce additional pole close loop frequency response.
value, more stable VOUT will accuracy great when RISO gets bigger. there were load resistor Figure output would voltage divided RISO load resistor. circuit Figure improvement Figure because provides accuracy well stability. this circuit, provides accuracy using feedforward techniques connect RISO serve counteract loss phase margin feeding high frequency component output signal back amplifier's inverting input, thereby preserving phase margin overall feedback loop. Increased capacitive drive possible increasing value This turn will slow down pulse response.
DS101325-18
FIGURE Cancelling Effect Input Capacitance This pole occurs frequency where
stray capacitance external circuit board layout, source capacitance from transducer photodiode connected summing node will also added input capacitance. less than close unity-gain bandwidth (5MHz) amp, phase margin loop reduced cause system unstable. avoid this problem, make sure that occurs least octaves beyond expected -3dB frequency corner close loop frequency response. not, feedback capacitor placed parallel with such that
DS101325-22
FIGURE Indirectly Driving Capacitive Load with Accuracy Application Circuits Peak Detector Peak detectors used many applications, such test equipment, measurement instrumentation, ultrasonic alarm systems, etc. Figure shows schematic diagram peak detector using LMV710 LMV711. This peak detector basically consists clipper, parallel network, voltage follower.
paralleled introduce zero, which cancels effect from pole. Capacitive Load Tolerance LMV710 LMV711 directly drive 200pF unity-gain without oscillation. unity-gain follower most sensitive configuration capacitive loading. Direct capacitive loading reduces phase margin amplifiers. combination amplifier's output impedance capacitive load induces phase lag. This results either underdamped pulse response oscillation. drive heavier capacitive load, circuit Figure used.
DS101325-23
FIGURE Peak Detector capacitor first discharged applying positive pulse reset transistor. When positive voltage applied input, input voltage higher than voltage across output goes high forward biases diode capacitor charged VIN. When input becomes less than current capacitor voltage, output goes diode reverse biased. This isolates leaves with charge equivalent peak input voltage. follower prevents unintentional discharging loading from following circuit. properly selected that capacitor charged rapidly VIN. During holding period, capacitor slowly discharge through leakage capacitor reverse-biased diode, bias currents.
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DS101325-21
FIGURE Indirectly Driving Capacitive Load using Resistive Isolation Figure isolation resistor RISO load capacitor form pole increase stability adding more phase margin overall system. desired performance depends value RISO. bigger RISO resistor
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LMV710 LMV711
Application Note
(Continued)
cases discharging time constant much larger than charge time constant. capacitor hold voltage long enough minimize output ripple. Resistors limit current into inverting input non-inverting input when power disconnected from circuit. discharging current from during power damage input circuitry amps. peak detector reset applying positive pulse reset transistor. charge capacitor dumped into ground, detector ready another cycle. maximum input voltage this detector should less than VD), where forward voltage drop diode. Otherwise, input voltage should scaled down before applying circuit. High Side Current Sensing high side current sensing circuit (Figure commonly used battery charger monitor charging current prevent over-charging. sense resistor Rsense connected battery directly. This system requires with
rail-to-rail input. LMV710/711 ideal this application because common mode input range beyond positive rail.
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FIGURE High Side Current Sensing
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FIGURE Typical P.A. Control Loop Power Amplifier Control Loop There four critical sections Power Amplifier Control Loop. class-C power amplifier provides amplification signal. directional coupler couples small amount energy from output envelope detector diode. detector diode senses signal level rectifies level indicate signal strength antenna. op-amp used error amplifier process diode voltage ramping voltage. This loop control power amplifier gain op-amp forces detector diode voltage ramping voltage equal. Power control accomplished changing ramping voltage. LMV710 LMV711 well suited error amplifier this application. LMV711 extra shutdown switch op-amp shutdown mode. shutdown mode, LMV711 consumes very current provides ground voltage power amplifier control VPC. Therefore, power amplifier turned save battery life.
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LMV710 LMV711
Simplified Schematic
LMV711
DS101325-16
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LMV710/711 Qualification Package 2-15
DEVICE INFORMATION
LMV710 LMV711
SOT-23 Tape Reel Specification Tape Format
Tape Section Leader (Start End) Carrier Trailer (Hub End) Cavities (min) (min) 3000 1000 (min) (min) Cavity Status Empty Empty Filled Filled Empty Empty Cover Tape Status Sealed Sealed Sealed Sealed Sealed Sealed
TAPE DIMENSIONS
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TAPE SIZE
.130 (3.3)
.124 (3.15)
.130 (3.3)
.126 (3.2)
.138 .002 (3.5 0.05)
.055 .004 (1.4 0.1)
.157
.008 .004 (0.2 0.1)
.315 .012 0.3)
Note: UNLESS OTHERWISE SPECIFIED CUMULATIVE PITCH TOLERANCE FEEDING HOLES CAVITIES (CHIP POCKETS) EXCEED .008 0.2mm OVER PITCH SPAN. THRU HOLE INSIDE CAVITY CENTERED WITHIN CAVITY. SMALLEST ALLOWABLE TAPE BENDING RADIUS: 1.181 30mm. DIMENSIONS WITH CRITICAL. DIMENSIONS ABSOLUTELY INSPECTED.
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LMV710 LMV711
REEL DIMENSIONS
DS101325-54
TAPE SIZE
7.00 (177.8)
.059 (1.5)
.512 .020/-.008 +0.5/-0.2)
.795 (20.2)
2.165 (55)
.331 .059/-.000 (8.4 1.5/0)
.567 (14.4)
(LSL-USL) .311 .429 (7.9 10.9)
Note: UNLESS OTHERWISE SPECIFIED MATERIAL: POLYSTYRENE/PVC (WITH ANTISTATIC COATING). POLYSTYRENE/PVC, ANTISTATIC POLYSTYRENE/PVC, CONDUCTIVE. CONTROLLING DIMENSION MILLIMETER, DIMESIONS INCHES ROUNDED. SURFACE RESISTIVITY: 1010 OHM/SQ MAXIMUM. OUTPUT REELS SHALL UNIFORM SHADE. PACKING REELS CONTAINERS MUST ENSURE DAMAGE REEL. SURFACE FINISH FLANGES SHALL SMOOTH, MATTE FINISH PREFERRED. EDGES, ESPECIALLY TAPE ENTRY EDGES, MUST FREE BURRS. REEL SHOULD WARP STORAGE TEMPERATURE 67°C MAXIMUM. GLASS TRANSITION TEMPERATURE (Tg) PLASTIC REEL SHALL LOWER THAN -20°C. GATING FROM MOLD MUST PROPERLY REMOVED. FLASHES PRESENT ALONG PARTING LINES. ALLOWABLE RADIUS CORNERS EDGES .012 INCHES/0.3 MILLIMETERS MINIMUM. SINK MARKS THAT WILL CAUSE CHANGE SPECIFIED DIMENSIONS SHAPE REELS ALLOWED. MOLDED REELS SHALL FREE COSMETIC DEFECTS SUCH VOIDS. FLASHING, EXCESSIVE FLOW MARKS, ETC. THERE MUST MISMATCH BETWEEN MATING PARTS. MOLDED REELS SHALL ANTISTATIC COATED BLENDED. SOT23-5L SOT23-6L PACKAGE 7-INCH REEL.
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LMV710/711 Qualification Package 2-17
DEVICE INFORMATION
LMV710 LMV711
Physical Dimensions
inches (millimeters) unless otherwise noted
SOT23-5 Package Number MF05A
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LMV710 LMV711 Power, RRIO Operational Amplifiers with High Output Current Drive Shutdown Option
Physical Dimensions
inches (millimeters) unless otherwise noted (Continued)
SOT23-6 Package Number MF06A
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National does assume responsibility circuitry described, circuit patent licenses implied National reserves right time without notice change said circuitry specifications.
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Photos 2.2.1 LMV710
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2.2.2 LMV711
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LMV710/711 Qualification Package 2-21
PROCESS INFORMATION
PROCESS INFORMATION
Process Flow
Fabrication Site: Fairchild Semiconductor, South Portland, Maine, Process Technology: CS80CBi (Submicron Silicon Gate CMOS/ Bipolar) Wafer Diameter: inches Number masks: Metallization: 0.5% Copper, dual layer Aluminum metal layer 7,500 thick layer 12,000 thick Side Passivation: Polyamide (30,000 thick) Over Nitride (11,500 thick) Over Oxide (5,000 thick)
Process Detail Masks
STAGE STAGE STAGE STAGE STAGE STAGE STAGE STAGE STAGE STAGE STAGE STAGE STAGE STAGE STAGE STAGE STAGE STAGE STAGE STAGE STAGE STAGE STAGE STAGE STAGE STAGE STAGE STAGE Initial Oxide Trench Define Etch Mask 0.6, N-Iso N-Iso Implant N-Iso Drive N-Iso Oxide Strip Screen Oxide Mask 0.8, Buried layer Buried Layer Implant Mask 0.9,P+ layer Buried Layer Buried Layer Implant Buried Layer Anneal Growth Oxide Nitride Mask 1.0, N-Well N-Well implant Selective Oxide N-Well Nitride Strip P-Well Implant Selective Oxide Etch N-Well P-Well Drive-In Oxide Drive-In Oxide strip Mask 2.0, Composite Composite Oxide Composite Nitride Composite Mask Etch Mask 3.0, P-Field P-Field Implant Field Oxide Active (Composite Area) Nitride strip Oxide Removal Sacrificial Oxide Growth Adjust Implant Sacrificial Oxide Strip Gate Oxide Poly Deposition Poly Dope, Poly Anneal Mask 4.0, Poly STAGE STAGE STAGE STAGE STAGE STAGE STAGE STAGE STAGE STAGE STAGE STAGE STAGE STAGE STAGE STAGE STAGE STAGE STAGE STAGE STAGE STAGE STAGE STAGE STAGE STAGE STAGE STAGE STAGE STAGE STAGE STAGE Poly Etch Poly Seal Oxide Mask 4.3, P-LDD P-LDD Implant Mask 4.5, N-LDD N-LDD Implant Spacer Oxide Deposit Etch Mask 5.0, Implant Mask 5.5, Base Base Etch Base Implant Drive Mask 6.0, Implant Dielectric Layer Anneal Mask 7.0, Window Window Etch Contact Dielectric Mask 7.1, Contact Contact Etch Contact Plug Etchback Metal Deposition Mask 8.0, Metal Metal Etch Metal Alloy Dielectric Layer2 Mask 9.0, Etch Deposition Metal Deposit Mask 10.0, Metal Metal Etch Passivation Oxide/ Nitride/Polyamide Mask 13.0, Passivation Passivation
STAGE STAGE STAGE STAGE
STAGE STAGE
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LMV710/711 Qualification Package
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Masking Sequence 3.3.1 LMV710
Layer Title 0.6A 0.8A 0.9A 1.0A 2.0A 3.0A 3.5A 4.0A 4.3A 4.5A 5.0A 5.5A 6.0A 7.0A 7.1A 8.0B 9.0B 10.0C 13.0C Mask N-Iso Buried Layer Buried Layer N-Well Composite P-Field Implant Poly P-LDD N-LDD BASE Window Contact Metal Metal Passivation
3.3.2 LMV711
Layer Title 0.6A 0.8A 0.9A 1.0A 2.0A 3.0A 3.5A 4.0A 4.3A 4.5A 5.0A 5.5A 6.0A 7.0A 7.1A 8.0B 9.0B 10.0B 13.0B Mask N-Iso Buried Layer Buried Layer N-Well Composite P-Field Implant Poly P-LDD N-LDD BASE Window Contact Metal Metal Passivation
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Manufacturing Flow
Wafer Fabrication: Fairchild Semiconductor (FSC) South Portland, Maine,
Wafer Sort: National Semiconductor (NSEM) Melaka, Malaysia
LMV710 SOT23-5 Assembly: National Semiconductor (NSEM) Melaka, Malaysia
LMV711 SOT23-6 Assembly: National Semiconductor (NSEM) Melaka, Malaysia
LMV710M5 Final Test: National Semiconductor (NSEM) Melaka, Malaysia
LMV711M6 Final Test: National Semiconductor (NSEM) Melaka, Malaysia
LMV710M5 Mount Tape Reel: National Semiconductor (NSEM) Melaka, Malaysia
LMV711M6 Mount Tape Reel: National Semiconductor (NSEM) Melaka, Malaysia
Pack Boxstock: National Semiconductor (NSEM) Melaka, Malaysia
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LMV710/711 Qualification Package
PACKAGING INFORMATION
PACKAGING INFORMATION
Package Materials
Generic Package Type Package Number Package/ Compound Manufacturer Package/ Compound Manufacturers Designation Lead Frame Material Frame Coating External Lead Frame Coating Pins Attach Method Bond Wire Bond Type Package Thermal SOT23-5L (5-Lead) MF05A Epoxy Cresol Novolac Sumitomo Sumitomo EME-6710 Copper NSC-DCI Solder Plate Sn/Pb Gull Wing, mils Thick Epoxy, Bareback Wafers Gold, diameter Thermosonic Ball 265°C/W LMV710M5/M5X SOT23-6L (6-Lead) MF06A Epoxy Cresol Novolac Sumitomo Sumitomo EME-6710 Copper NSC-DCI Solder Plate Sn/Pb Gull Wing, mils Thick Epoxy, Bareback Wafers Gold, diameter Thermosonic Ball 265°C/W LMV711M6/M6X
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LMV710/711 Qualification Package
PACKAGING INFORMATION
Package Dimensions 4.2.1 SOT23-5 (MF05A)
SOT23-5 Package Number MF05A
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PACKAGING INFORMATION
4.2.2 SOT23-6 (MF06A)
SOT23-6 Package Number MF06A
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LMV710/711 Qualification Package
PACKAGING INFORMATION
Tape Reel Dimensions 4.3.1 Tape Dimensions
DS101325-55
TAPE SIZE
.130 (3.3)
.124 (3.15)
.130 (3.3)
.126 (3.2)
.138 .002 (3.5 0.05)
.055 .004 (1.4 0.1)
.157
.008 .004 (0.2 0.1)
.315 .012 0.3)
Note: UNLESS OTHERWISE SPECIFIED CUMULATIVE PITCH TOLERANCE FEEDING HOLES CAVITIES (CHIP POCKETS) EXCEED .008 0.2mm OVER PITCH SPAN. THRU HOLE INSIDE CAVITY CENTERED WITHIN CAVITY. SMALLEST ALLOWABLE TAPE BENDING RADIUS: 1.181 30mm. DIMENSIONS WITH CRITICAL. DIMENSIONS ABSOLUTELY INSPECTED.
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PACKAGING INFORMATION
4.3.2 Reel Dimensions
DS101325-54
TAPE SIZE
7.00 (177.8)
.059 (1.5)
.512 .020/ .008 +0.5/ 0.2)
.795 (20.2)
2.165 (55)
.331 .059/ .000 (8.4 1.5/0)
.567 (14.4)
(LSL-USL) .311 .429 (7.9 10.9)
Note: UNLESS OTHERWISE SPECIFIED MATERIAL: POLYSTYRENE/PVC (WITH ANTISTATIC COATING). POLYSTYRENE/PVC, ANTISTATIC POLYSTYRENE/PVC, CONDUCTIVE. CONTROLLING DIMENSION MILLIMETER, DIMENSIONS INCHES ROUNDED. SURFACE RESISTIVITY: 1010 OHM/SQ MAXIMUM. OUTPUT REELS SHALL UNIFORM SHADE. PACKING REELS CONTAINERS MUST ENSURE DAMAGE REEL. SURFACE FINISH FLANGES SHALL SMOOTH, MATTE FINISH PREFERRED. EDGES, ESPECIALLY TAPE ENTRY EDGES, MUST FREE BURRS. REEL SHOULD WARP STORAGE TEMPERATURE 67°C MAXIMUM. GLASS TRANSITION TEMPERATURE (Tg) PLASTIC REEL SHALL LOWER THAN 20°C. GATING FROM MOLD MUST PROPERLY REMOVED. FLASHES PRESENT ALONG PARTING LINES. ALLOWABLE RADIUS CORNERS EDGES .012 INCHES/0.3 MILLIMETERS MINIMUM. SINK MARKS THAT WILL CAUSE CHANGE SPECIFIED DIMENSIONS SHAPE REELS ALLOWED. MOLDED REELS SHALL FREE COSMETIC DEFECTS SUCH VOIDS. FLASHING, EXCESSIVE FLOW MARKS, ETC. THERE MUST MISMATCH BETWEEN MATING PARTS. MOLDED REELS SHALL ANTISTATIC COATED BLENDED. SOT23-5L SOT23-6L PACKAGE 7-INCH REEL.
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LMV710/711 Qualification Package
RELIABILITY DATA
RELIABILITY DATA
LMV710/711 Reliability Report
Reliability Test Report
File Number: Originator: Date Created: Date Approved: Revision:
FSC20000145 Alex Ruiz March 2000 March 2000
Purpose
Approvals
Reliability Engineer Date
LMV710 LMV711 Power, RRIO Operational Amplifier (Packaged 5L-6L-SOT23) Device Qualification
Product Engineer
Reliability Engineering Manager Date
Product Engineering Manager Date
Reference File Numbers RSC199903895 RSC200000073 Q19990530
Distribution List Amplifier Product Group: Noel Dave Wheelwright QA&R: Kankel, Richard Rosales, Alcaraz, Violeta Luis, Alex Ruiz
Abstract LMV710 single product without Shut-Down Function assembled SOT23 package. LMV711 single product with Shut-Down Function assembled SOT23 package. core circuit cell similar previously qualified LMV721 device. SOT23 package qualified with numerous Fairchild (FM) CS80CBI process with following devices: LMV721, LMV321, LMV1XX LMV821. SOT23 package same package body dimensions, molding compound, lead pitch SOT23; major difference additional pin. LMV710 LMV711 have passed required reliability tests released production manufacturing. Description
Test Request RSC199903895 RSC200000073 Device Name LMV711M6 LMV710M5 Sbgp Wafer Tech Code Code T\TJ23 T\TG23 Leads Assy Date Mold Cmpnd
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LMV710/711 Qualification Package
RELIABILITY DATA
Tests Performed
Test: Operating Life Test (Static) (SOPL) Test Request Device RSC200000073 LMV710M5 Board Circuit: 04765RE Timepoints: Test Request RSC200000073 RSC200000073 RSC200000073 Sbgrp Humidity Pressure High Temp LowTemp Voltage: V+=2.5V, V-=-2.5V Current: I+=1.5mA, I-=-1.5mA Duration 1000
Test: Electrostatic Discharge Human Body Model (ESDH) Test Request Device Method RSC199903895 LMV711M6 (Tst# Sublot Voltage 1000 1500 2000 Test: Electrostatic Discharge Machine Model (ESDM) Test Request Device Method RSC199903895 LMV711M6 (Tst# Sublot Voltage Test: Latch -Static (LUPS) Test Request Device RSC199903895 LMV711M6 (Tst# Sublot Fail Criteria 0002 Temp
Results/Discussion
Test: Operating Life Test (Static) (SOPL) Test Request Device RSC200000073 LMV710M5 RSC200000073 LMV710M5 RSC200000073 LMV710M5 Sbgrp Duration 1000 Sample Size Rejects
Test: Electrostatic Discharge Human Body Model (ESDH) Test Request Device Sbgrp RSC199903895 LMV711M6 RSC199903895 LMV711M6 RSC199903895 LMV711M6 RSC199903895 LMV711M6 Test: Electrostatic Discharge Machine Model (ESDM) Test Request Device RSC199903895 LMV711M6 RSC199903895 LMV711M6 RSC199903895 LMV711M6 RSC199903895 LMV711M6 Test: Latch -Static (LUPS) Test Request RSC199903895 RSC199903895
Sublot
Voltage 1000 1500 2000
Rejects
Sbgrp
Sublot
Voltage
Rejects
Device LMV711M6 LMV711M6
Sbgrp
Sublot
Temp
Rejects
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RELIABILITY DATA
Conclusion LMV710 LMV711 product qualification successfully satisfied reliability requirements qualification plan Q19990530. LMV710 LMV711 fully qualified approved production release SOT-23 SOT-23 packages, respectively.
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LMV710/711 Qualification Package
RELIABILITY DATA
Models
Human Body Model (HBM) 1500 ohms 100pF rise time 10ns
Machine Model (MM) ohms 200pF rise time <8ns
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CHARACTERIZATION DATA
CHARACTERIZATION DATA
Test Name Datasheet Parameter Table
LMV710/LMV711 Test Name Datasheet Parameter Table
Test Name PSI_2P7V (mA) VOS_NPN_2P7V (µV) VOS_PNP_2P7V (µV) CMRR_DB_2P7V (DB) PAVOL_10K_2P7V_DB (DB) NAVOL_10K_2P7V_DB (DB) PAVOL_600_2P7V_DB (DB) NAVOL_600_2P7V_DB (DB) PSWNG_A_2P7V_10K (mV) NSWNG_A_2P7V_10K (mV) PSWNG_A_2P7V_600 (mV) NSWNG_A_2P7V_600 (mV) SHRT_SRC_A_2P7V (mA) SHRT_SNK_A_2P7V (mA) PSRR_PNP_DB (DB) PSRR_NPN_DB (DB) POS_SWING_A_3P2V_421 (mV) NEG_SWING_A_3P2V_421 (mV) PSI_5V (mA) VOS_NPN_5V (µV) VOS_PNP_5V (µV) CMRR_DB_5V (DB) PAVOL_10K_5V_DB (DB) NAVOL_10K_5V_DB (DB) PAVOL_600_5V_DB (DB) NAVOL_600_5V_DB (DB) PSWNG_A_5V_10K (mV) NSWNG_A_5V_10K (mV) PSWNG_A_5V_600 (mV) NSWNG_A_5V_600 (mV) SHRT_SRC_A_5V (mA) SHRT_SNK_A_5V (mA) CMRR PSRR CMRR Symbol Datasheet Parameter Supply Current, 2.7V Input Offset Voltage, 2.7V Input Offset Voltage, 2.7V Common Mode Rejection Ratio, 2.7V Large Signal Voltage Gain, 10K, 2.7V Large Signal Voltage Gain, 10K, 2.7V Large Signal Voltage Gain, 600, 2.7V Large Signal Voltage Gain, 600, 2.7V Output Swing, 10K, 2.7V Output Swing, 10K, 2.7V Output Swing, 600, 2.7V Output Swing, 600, 2.7V Output Short Circuit Current, 2.7V Output Short Circuit Current, 2.7V Power Supply Rejection Ratio Power Supply Rejection Ratio Output Swing, 421, 3.2V Output Swing, 421, 3.2V Supply Current, Input Offset Voltage, Input Offset Voltage, Common Mode Rejection Ratio, Large Signal Voltage Gain, 10K, Large Signal Voltage Gain, 10K, Large Signal Voltage Gain, 600, Large Signal Voltage Gain, 600, Output Swing, 10K, Output Swing, 10K, Output Swing, 600, Output Swing, 600, Output Short Circuit Current, Output Short Circuit Current, Sourcing Sinking Sourcing Sinking Measured with respect Measured with respect VMeasured with respect Measured with respect VSourcing Sinking With input stage, 1.85V With input stage, 0.85V Sourcing Sinking Sourcing Sinking Measured with respect Measured with respect VMeasured with respect Measured with respect VSourcing Sinking With input stage With input stage Measured with respect Measured with respect VWith input stage, 1.85V With input stage, 0.85V Comments
Datasheet Section parametric graphs curves.
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LMV710/711 Qualification Package
CHARACTERIZATION DATA
Parametric Distribution Graphs
Analog Histogram Plot LMV710/LMV711 Parametric Distribution 25°C
Analog Histogram Plot LMV710/LMV711 Parametric Distribution 25°C
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CHARACTERIZATION DATA
Analog Histogram Plot LMV710/LMV711 Parametric Distribution 25°C
Analog Histogram Plot LMV710/LMV711 Parametric Distribution 25°C
National Semiconductor Private Confidential
LMV710/711 Qualification Package
CHARACTERIZATION DATA
Analog Histogram Plot LMV710/LMV711 Parametric Distribution 25°C
Analog Histogram Plot LMV710/LMV711 Parametric Distribution 25°C
National Semiconductor Private Confidential
CHARACTERIZATION DATA
Analog Histogram Plot LMV710/LMV711 Parametric Distribution 25°C
Analog Histogram Plot LMV710/LMV711 Parametric Distribution 25°C
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LMV710/711 Qualification Package
CHARACTERIZATION DATA
Analog Histogram Plot LMV710/LMV711 Parametric Distribution 25°C
Analog Histogram Plot LMV710/LMV711 Parametric Distribution 25°C
National Semiconductor Private Confidential
CHARACTERIZATION DATA
Analog Histogram Plot LMV710/LMV711 Parametric Distribution 25°C
Analog Histogram Plot LMV710/LMV711 Parametric Distribution 25°C
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LMV710/711 Qualification Package
CHARACTERIZATION DATA
Analog Histogram Plot LMV710/LMV711 Parametric Distribution 25°C
Analog Histogram Plot LMV710/LMV711 Parametric Distribution 25°C
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CHARACTERIZATION DATA
Analog Histogram Plot LMV710/LMV711 Parametric Distribution 25°C
Analog Histogram Plot LMV710/LMV711 Parametric Distribution 25°C
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LMV710/711 Qualification Package
CHARACTERIZATION DATA
Analog Histogram Plot LMV710/LMV711 Parametric Distribution 25°C
Analog Histogram Plot LMV710/LMV711 Parametric Distribution 25°C
6-10
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CHARACTERIZATION DATA
Analog Histogram Plot LMV710/LMV711 Parametric Distribution 25°C
Analog Histogram Plot LMV710/LMV711 Parametric Distribution 25°C
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LMV710/711 Qualification Package 6-11
CHARACTERIZATION DATA
Analog Histogram Plot LMV710/LMV711 Parametric Distribution 25°C
Analog Histogram Plot LMV710/LMV711 Parametric Distribution 25°C
6-12
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CHARACTERIZATION DATA
Analog Histogram Plot LMV710/LMV711 Parametric Distribution 25°C
Analog Histogram Plot LMV710/LMV711 Parametric Distribution 25°C
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LMV710/711 Qualification Package 6-13
CHARACTERIZATION DATA
Analog Histogram Plot LMV710/LMV711 Parametric Distribution 25°C
Analog Histogram Plot LMV710/LMV711 Parametric Distribution 25°C
6-14
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CHARACTERIZATION DATA
Analog Histogram Plot LMV710/LMV711 Parametric Distribution 25°C
Analog Histogram Plot LMV710/LMV711 Parametric Distribution 25°C
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LMV710/711 Qualification Package 6-15
CHARACTERIZATION DATA
Analog Histogram Plot LMV710/LMV711 Parametric Distribution 25°C
Analog Histogram Plot LMV710/LMV711 Parametric Distribution 25°C
6-16
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CHARACTERIZATION DATA
Analog Histogram Plot LMV710/LMV711 Parametric Distribution 25°C
Analog Histogram Plot LMV710/LMV711 Parametric Distribution 25°C
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LMV710/711 Qualification Package 6-17
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