Embedded High Ceramic Capacitors LTCC Wireless Communication Applicati

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IMAPS 1999 Chicago
Embedded High Ceramic Capacitors LTCC Wireless Communication Applications
Michael Ehlert Shaul Branchevsky National Semiconductor Corp. Studebaker Irvine, 92618 Phone (949) 380-2010 (949) 380-2099 michael.ehlert@nsc.com shaul.branchevsky@nsc.com
Abstract National Semiconductor, leader embedded passive component technology, implemented high dielectric constant capacitors with better performance into Temperature Co-Fired Ceramic (LTCC) structures using both single multiple layer configurations. This technology allowed integration components into package that practical technology enabled applications achievable other technologies. paper will address materials used, physical properties materials, electrical results realized including Dielectric Constant, Thermal Coefficient Capacitance, Insulation Resistance, Breakdown Voltage, Life Testing, High Frequency Performance, Electrostatic Discharge resistance. technology been used several delivered products.
Key: words: LTCC, Capacitor, Embedded Capacitor, Thermal coefficient Capacitance, Dissipation Factor, Insulation Resistance
Introduction National Semiconductor1 continually improving materials, processes products wireless marketplace. element that effort improve performance products reduce volume they occupy. analyzing these aspects operation some opportunities improvement have been defined. number products development include multi-band operation geographic regions where there many three competing communications protocols across national borders where different protocols have been adopted. typical operating scenario have phone capable operating MHz, 1400 1800 MHz. developing single chip solution this need became readily apparent that filtering prevent interference between operating sections necessary. typical implementation would discrete chip components hang tuned series shunt elements critical signal power inputs. These filter elements
would send spurious signals ground preventing interference between three operating frequencies. direct result, National Semiconductor Inc. began exploring potential solutions. filters could incorporated into silicon filtering intended protect silicon from interaction these signals. fourteen (14) filter elements required customers packaging need chip scale package (CSP) dictated that even smallest commercially available discrete capacitors inductors were much large this application. most compact solution envisioned embedding filters printed elements within body CSP. this successful, capacitance some picoFarads (pF) area square required. This capacitance would require high layer count implemented k=7.8 tape conventional material thickness. Ideally this material would higher dielectric constant applied printed patch confining material area where needed.
IMAPS 1999 Chicago DuPont's type ceramic2 with silver conductors selected base dielectric product performance good availability. this point number materials were subjected preliminary testing compatibility initial dielectric suitability. These tests included materials from wide number sources. From this materials several materials showed promise material3 selected further testing characterization. Technology Processing Temperature Co-fired Ceramic (LTCC) technology uses firing glass ceramic cast tape mixture binders, glass ceramics) achieve easily fired material. Other materials that used include conductive materials embedded components such capacitors, inductors, resistors. this case dielectric paste K=80 used create compact capacitors. LTCC processing done National's LTCC production line Irvine California. Processing follows normal LTCC sequences National Semiconductor's "framed tape" process. steps this process are: Remove from roll Place tape carrier frame Form holes Fill vias with conductor Print conductor traces Print embedded components Stack remove from frame Laminate Green Co-fire Test Coupon Design Testing Electrical mechanical testing capacitors done coupons incorporating embedded capacitors only eliminating electrical interference interaction from other components. capacitor construction described figure This single layer capacitor built with layer high dielectric constant material microns thickness, conductor electrodes. Square electrodes size were used with dielectric patches mils larger. capacitor electrode connected directly probe connection vias, while lower electrode connected with vias through ground plane probe point. number vias used selected provide specific inductance levels, creating resonance near operating frequency Completed capacitors were tested high frequency using Cascade Microtech #9101RF
probe station with ACP40 probe 8753C Network Analyzer. Self-Resonant Frequency (SRF) determined operating determined "Q-circle" method4 implemented National Semiconductor capacitors5. Thermal Coefficient Capacitance, Dissipation Factor Insulation Resistance Thermal coefficient capacitance (TCC) change capacitance with temperature. expressed capacitance changes from reference temperature. Calculated shown Equation often expressed PPM/°C Equation {(C/Co)/T}. Where capacitance reference temperature. difference between capacitance reference capacitance test temperature. difference between test temperature reference 25°C). capacitors were tested dissipation factor (DF) same using Hewlett Packard Model 4275a meter environmental chamber, from -55°C +125°C, steps 10°C. Figure Shows capacitors expressed percent capacitance change. these capacitors better than specification meets specification. Dissipation factor temperatures shown Figure compiled variation dissipation factor with frequency from Circle conventional testing shown figure capacitors were also tested insulation resistance (IR). This testing conducted with Beckman Megohm meter environmental chamber beginning 25°C increasing 125°C steps 10°C. 125°C voltage increased steps VDC. tests insulation resistance greater than megohms, meters range limit shown Table below.
IMAPS 1999 Chicago
Table Insulation Resistance
Temp 25°C 35°C 45°C 55°C 65°C 75°C 85°C 95°C 105°C 115°C 125°C >105 >105 >105 >105 >105 >105 >105 >105 >105 >105 >105 Voltage 125°C >105 >105 >105 >105 >105 >105 >105 >105 >105
Electrostatic Discharge (ESD) Electrostatic charge generated almost anywhere, walking sitting. amount generated dependent material, humidity temperature. Table shows characteristics most commonly used characterization tests, human body model (HBM) machine model (MM)6. Table Test Models Voltage 2-35kV Resistance 10-100k Capacitance 100-400pf
0-400V 100-200pf
Coefficient Thermal Expansion Change size with change temperature inherent characteristic materials. mismatch between materials prime concern embedding capacitor materials into ceramic bodies. high stiffness modulus ceramic materials makes easy build significant stress with relatively small mismatches. therefore vitally important that reliable values known. Close matching between materials will improve reliability embedded capacitors during environmental stressing reducing internal stress. Samples capacitor dielectric substrate material were built from tapes then fired same time kiln. fired dimensions tested samples were: Length inches Width 0.23 inches Thickness 0.033 inches samples were tested with Orton Model 1000 Dilatometer from 25°C 700°C rate 3°C/minute. results Figure show difference between high dielectric constant materials dielectric constant substrate. Thermal Shock order determine mismatch important issue, thermal shock tests performed. Parts were subjected cycles -55C 125C with minimum transfer time minute soaks temperature extremes. capacitors were tested before after thermal shock capacitance value, dissipation factor insulation resistance. thermal shock cycles make capacitors change characteristics, therefore expansion mismatch appears acceptable these sizes.
embedded capacitors were subjected both human body model discharge machine model discharge curves described figures using KeyTek MasterTM. part considered electrostatic discharge failure after exposure pulses, longer meets part drawing requirements using parametric functional testing changed value7. capacitors were tested both before after applying stress capacitance, dissipation factor (DF) insulation resistance (IR). capacitors tested with Human body model discharge used starting voltage 100V progressing maximum voltage 8000V steps 500V Zaps/sec hits test. capacitors that were tested with Machine Model similarly starting voltage 100V maximum voltage 2000V with Zaps/second hits test. capacitors passed electrostatic discharge testing with change capacitance value, dissipation factor insulation resistance Conclusion Embedded capacitors giving values approximating plate size have been achieved LTCC. Their characterization testing shows them better value robust voltage, thermal stress.
IMAPS 1999 Chicago
Figure Coupon Design
0.08 0.07 0.06 0.05 0.04 0.03 0.02 0.01
Thermal coefficient capacitance (TCC)
capacitance change
Figure Frequency
Figure Temperature
1000
2000
Temp Deg.
Figure Dielectric Substrate
Figure Temperature
issipation Factor
Deg.
Figure Human Body Model Wave Form
IMAPS 1999 Chicago
Figure Machine Model Wave Form
DuPont 5674 DuPont Electronics Alexander Drive Research Triangle Park, 27709 Microwave Measurements Ginzton, Edward McGraw-Hill, 1957 pp405-pp413 Unpublished Work, National Semiconductor Smith, Ph.D. 1998
References
Quality Policy National Semiconductor Corp. 2900 Semiconductor Drive Santa Clara, 95051 DuPont Electronics Alexander Drive Research Triangle Park, 27709
Resistance Multilayer Ceramic Capacitors Electrostatic Discharge (ESD) event Carl Postigone CARTS
EIA/JESD22-A114-A Electrostatic Discharge (ESD) Sensitivity Testing Human Body Model Electronic Industries Association

Embedded High Ceramic Capacitors LTCC Wireless Communication Applicati

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