CMOS Baud Modem National Semiconductor Application Note 1014 Octo

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CMOS Baud Modem National Semiconductor Application Note 1014 Octo

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CMOS Baud Modem
CMOS Baud Modem
National Semiconductor Application Note 1014 October 1995
INTRODUCTION advent cost microprocessor based systems created strong demand cost reliable means data communication dial-up telephone network most widespread means this task Bell type modem which become facto standard speed modems This type modem uses frequency shift keying (FSK) modulate binary data asynchronously speeds baud success this type modem despite modest transmission speed largely ability provide full duplex data transmission error rates even with unconditioned telephone lines also significant cost advantage over other types modems available today Advances CMOS circuit design technology have made possible 74VHC942 high performance power Bell compatible single chip modem This chip combines both digital linear circuitry bring benefits system level integration modem system designers (The 74VHC942 devices direct function spec replacements MM74HC942 devices PROCESS microCMOS chip designed with National's double poly CMOS (microCMOS) process used extensively line CODECs filters This self-aligned silicon gate CMOS process with layers polysilicon which primarily used gates transistors Thus there three layers interconnect available (two polysilicon metal layer) making possible very dense layout
polysilicon layers also offer near perfect capacitor structure which used advantage linear portions chip self-aligned silicon gate N-channel MOSFETs combine high gain with minimal parasitic gate-todrain overlap capacitance facilitating design operational amplifiers with high gain-bandwidth product excellent dynamic range CHIP ARCHITECTURE chip architecture arrived after critically evaluating several trial system partitionings Bell type data overriding goal integrate much function possible without sacrificing versatility cost effectiveness applications resulting chip architecture reflects this philosophy Since majority users this device would probably digital designers unfamiliar with filter design analog signal processing inclusion these functions thus mandatory precision filters needed high performance modem also make discrete implementations expensive other hand majority systems will typically include microprocessor which quite capable handling channel establishment protocol Besides different systems require different protocols Circuitry this task therefore omitted block diagram illustrating chip architecture shown Figure on-chip line driver line hybrid greatly simplify interfacing phone line saving external amps output line hybrid which used reduce
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FIGURE Chip Architecture 74VHC942
Reprinted from Midcon
C1995 National Semiconductor Corporation 12128 RRD-B30M125 Printed
effect local transmit signal received signal goes programmable receive bandpass filter This filter improves signal-to-noise ratio input frequency discriminator which performs actual demodulation output receive filter also monitored carrier detector which compares amplitude received signal externally adjustable threshold level modulator consists frequency synthesizer which generates clock frequency determined (transmit data) (originate answer) inputs This subsequently shaped sine converter into final modulated transmit carrier signal internal clocks control signals derived from on-chip oscillator operating from common crystal On-chip control logic allows modem answer originate mode operation analog loopback mode inputs respectively line driver squelched input which typically occurs during channel establishment sequence Another feature this design obvious from block diagram Figure that chip powered down asserting inputs simultaneously condition that does occur during normal operation This cuts power consumption typically under making very suitable battery operation DEMODULATOR Receive Filter This nine pole switched capacitor1 bandpass filter programmable internal logic passbands corresponding originate answer mode operation measured frequency response filter shown Figure shows that better than adjacent channel rejection been achieved Note also deep notches frequencies locally transmitted tone pair
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FIGURE Normalized Delay Response Receive Filter Answer Mode
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FIGURE Normalized Delay Response Receive Filter Originate Mode on-chip second order real time anti-aliasing filter precedes receive filter This masks sampled data nature switched capacitor design from user contributing ease chip Frequency Discriminator Referring Figure filtered receive carrier first hard limited remove residual amplitude modulation then split into parallel functionally indentical paths each consisting second order bandpass filter (BPF) full wave detector post detection lowpass filter (LPF) bandpass filter upper path tuned `mark' frequency that lower path `space' frequency detectors full wave rectifier circuits which together with post detection filters measure energy mark space frequencies These compared trailing comparator decide whether mark space been received
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FIGURE Measured Frequency Response Receive Filter design goal minimize delay distortion filter This also been evidenced delay response curves shown Figures These curves have been normalized delays 1170 2125 respectively They show that delay distortion 1020 1320 band approximately while that 1975 2275 band approximately These bands contain significant sidebands baud signal delay distortion receive filter translates directly into jitter demodulated data
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FIGURE Block Diagram Frequency Discriminator Carrier Detector carrier detector compares output receive filter against externally adjustable threshold voltage Referring back Figure (carrier detect adjust) left floating threshold nominally This modified forcing external voltage input received carrier exceeds threshold (carrier detect) output will after preset time delay This delay externally timing capacitor connected (carrier detect timing) MODULATOR shown Figure modulator consists frequency synthesizer sine wave converter transmit data (TXD) mode inputs divisor dual modulus programmable divider This produces clock sixteen times frequency transmitted tone This then clocks four counter whose states represent voltage levels corresponding sixteen time slots cycle staircase approximated sine wave sine decodes state counter drives digital-to-analog converter synthesize frequency shift keyed sine wave This modulator design also preserves phase coherence transmit carrier across frequency excursions reference voltage digital-to-analog converter derived from reference generator controlled external resistor (RTLA) This allows transmit signal level programmable accordance with Universal Service Order Code This code specifies programming resistances corresponding various transmit levels external resistor connected transmit level defaults synthesized sine wave filtered second order real time pass filter remove spurious harmonics before being line driver amplifier LINE INTERFACE Line Driver This class power amplifier designed drive 600X line through external 600X terminating resistor With proper transmit level programming resistor installed will drive line when operated from supplies quiescent current output stage driver varies with programmed transmit level maximize efficiency amplifier class design chosen mainly because tolerate wider range reactive loads shown Figure both inverting non-inverting inputs driver amplifier accessible externally making easy accommodate external signal source such tone dialer external capacitor also connected between inverting input amplifier output give lowpass response Line Hybrid line hybrid essentially difference amplifier which when connected shown Figure causes transmit carrier appear common-mode signal cancelled from output termination resistor (RT) phone line impedance perfectly matched output line hybrid would just received carrier practice perfect matching impossible transmit carrier rejection more realistic residual more than adequately rejected receive filter demodulator TIMING CONTROL This includes oscillator amplifier divider chain internal control logic oscillator conjunction with external crystal divider chain provides internal clocks switched capacitor circuits frequency synthesizer control logic orchestrates various operating modes chip originate answer analog loop-back modes)
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FIGURE Modulator Block Diagram
APPLICATIONS Figure shows 74VHC942 acoustically coupled modem application demonstrates simplicity resulting design dramatic reduction parts count Figure shows typical direct connect modem applications simplicity these circuits again evident
simple power supply requirement power when transmitting standby) external component count makes 74VHC942 efficient implementation baud modem function
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FIGURE Typical Interface Between 74VHC942 Phone Line
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FIGURE Typical Implementation Acoustically Coupled Modem Using 74VHC942
WIRE CONNECTION
WIRE CONNECTION
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FIGURE Typical Implementations Direct Connect Modems Using 74VHC942 SUMMARY conclusion 74VHC942 integrates entire data path Bell type data into 20-pin package with following features
Full duplex originate answer mode operation power operation power-down mode Simple supply requirements
REFERENCES Caves ``Sampled Analog Filtering using Switched Capacitors Resistor Equivalents'' IEEE Journal Solid State Circuits SC-12 1977 Black High Performance Power CMOS Channel Filter'' IEEE Journal Solid State Circuits SC-15 1980
On-chip pole receive filter Carrier detector with adjustable threshold Analog demodulator with jitter bias Phase coherent modulator with spurious harmonics 600X line driver with adjustable transmit level On-chip line hybrid
CMOS Baud Modem
LIFE SUPPORT POLICY NATIONAL'S PRODUCTS AUTHORIZED CRITICAL COMPONENTS LIFE SUPPORT DEVICES SYSTEMS WITHOUT EXPRESS WRITTEN APPROVAL PRESIDENT NATIONAL SEMICONDUCTOR CORPORATION used herein Life support devices systems devices systems which intended surgical implant into body support sustain life whose failure perform when properly used accordance with instructions provided labeling reasonably expected result significant injury user critical component component life support device system whose failure perform reasonably expected cause failure life support device system affect safety effectiveness
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CMOS Baud Modem National Semiconductor Application Note 1014 Octo

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