Hardware Clock Calendar Your installing clock calendar chip some
|
|
|
Top Searches for this datasheet
Hardware Clock Calendar Your
Hardware Clock Calendar Your
installing clock calendar chip some interface circuitry battery backup system simple programs your real-time hardware clock your computer many personal-computer applications need time-of-day information time-stamp files keep track when initiated files when last updated them) datebook software enable autoanswer autodial modems perform other tasks PC-DOS maintains software clock calendar requires enter both date time from keyboard every time power computer However adding inexpensive hardware real-time clock eliminate manual date time entry hardware clock your need only clock calendar chip some interface circuitry battery backup system simple programs that initialize read from write chip chip like MM58274 clock calendar chip from National Semiconductor real-time clock Although it's fabricated low-power CMOS chip directly compatible with TTL-level systems Because chip's current drain standby mode small lithium battery
National Semiconductor Application Note Wesley June 1986
standby operation battery clock chip isolated from other computer circuitry chip will continue keeping correct time years standby mode MM58274 CLOCK CALENDAR CHIP heart MM58274 fourteen cascaded counters that provide timekeeping functions (Figure These counters range from tenths seconds tens years them keeps track week 2-bit register keeps track years since last leap year have this register during initialization it's otherwise accessible user fastest counter (tenths seconds) clocked 10-Hz reference signal that chip produces prescaling 768-kHz output internal crystal oscillator each counter rolls over resulting carry pulse clocks next counter Each timing counter individually addressable reading writing when place address range 1HEX through EHEX) MM58274's four address lines corresponding counter connected four data lines data transfer format Unused bits tens-of-minutes counter which counts only from through forced zero read mode ignored write mode
8690
FIGURE Although it's fabricated low-power CMOS MM58274 clock calendar chip directly compatible with TTL-level systems includes cascaded counters that provide timekeeping functions
AN-443
Printed previously Magazine C1995 National Semiconductor Corporation
8690
RRD-B30M105 Printed
TABLE Address RANGE 300-30F 3C0-3CF USAGE 8237A-5 INTERRUPT 8259A TIMER 8253-5 8255A-5 PAGE REGISTERS MASK REGISTER RESERVED RESERVED GAME CONTROL EXPANSION UNIT RESERVED RESERVED ``SUPER PAK'' CARD RESERVED ASYNCH COMM (SECONDARY) MM58274 REAL-TIME CLOCK OTHER PROTOTYPE CARDS FIXED DISK PRINTER SDLC COMM COMM (SECONDARY) COMM (PRIMARY) MONOCHROME DISPLAY PRINTER RESERVED COLOR GRAPHICS RESERVED DISKETTE ASYNCH COMM (PRIMARY)
8690
FIGURE MM58274's control register response nibble written determines mode starts stops clock selects interrupt frequency status register read-only register indicates changes clock data signals interrupt Both registers reside address 0HEX which offset from location 0HEX host computer's space
8690
Note that timing counters account only chip's addresses remaining 0HEX FHEX described Figures respectively Address 0HEX operates control register when written status register when read from address FHEX clocksetting interrupt register depending state control register (Note that MM58274 addresses offset from PC's 0HEX address space chip might occupy locations 300HEX 30FHEX computer's space example Table shows
8690
FIGURE state control register address 0HEX selects command registers address FHEX control register's equals then FHEX becomes clock-setting register then FHEX becomes interrupt register
8690-2
control register (address 0HEX write mode) selects normal test mode clock start stop functions interrupt start stop functions register also determines whether clock-setting register interrupt register will accessed next write address FHEX status register (address 0HEX read mode) only active bits Interrupt flag Data Changed flag which timing counters change state during read operation Both flags cleared completion read operation clock-setting register (address FHEX control register write mode) used only during initialization 24-hr mode flag clock 12-hr mode) number years (zero three) since last leap year interrupt register (address 0FHEX control register write mode) determines interval which interrupts any) generated channel extension 8088 microprocessor control address data lines PC's channel essentially same those 8088 PC's channel also interrupt (direct memory access) functions however addresses limited range 0HEX through 03FFHEX that only address lines through need decoded Figure circuit 74HCT688 8-bit comparator through lines decodes eight signals negative-logic (the read write strobes) strobe (AEN which always
operation) upper address bits through base address MM58274 switches connected corresponding inputs comparator Address lines through connected directly MM58274 address inputs 74HCT688 compares eight inputs equality When condition becomes true comparator generates active-low device-enable strobe (DEN) This signal enables MM58274 MM74HCT164 wait-state generator) 74HCT245 bidirectional driver connecting clock data lines Pullup pulldown resistors driver force upper nibble 3HEX during read operation thus adding 30HEX output clock convert number corresponding ASCII character don't need switches change base address MM58274 (you could instance hard-wire address) it's standard practice include switches interface cards that added microcomputer Take care assign same address addresses more than device devices will contend with unpredictable results Table shows standard addresses recognized PC-DOS version well address space used MM58274 (300HEX 30FHEX) incidentally popular Super-Pack card have other add-in cards your system sure check documentation
8690
FIGURE MM58274 requires relatively support chips Adding bidirectional driver wait-state generator address decoder lets implement essential functions MM58274
determine which addresses they avoid address duplication ISOLATION PROLONGS BATTERY LIFE battery-isolation circuits Figure prevent reverse current from flowing through battery when main power supply they minimize current drain battery backup mode Diode (Figure isolates battery during system power-up long system power supply least diode drop above battery voltage diode reverse-biased current flow into battery supply voltage drops below this level battery powers clock prolong battery life standby mode should eliminate leakage paths ground Don't insert switch though that alone would ineffective Figure shows ground-disconnect switch Figures eliminates leakage from pins through protection diodes However even when ground-disconnect switch open leakage path still exists through open-drain transistor ground thus second switch (Q3) needed open this path also When system powers down transistor shuts thereby also shutting (the ground-disconnect switch) (the interrupt-disconnect switch) (the power-failure detector) Shutting these transistors only isolates negative terminal battery from system ground also breaks leakage paths indicated Figure
When shuts power-failure circuitry disables clock chip forcing (chip select) signal high signal negative-logic (the device-enable signal) both which active-low either goes high (because clock being addressed because system power off) sections (IC4A IC4B Figure 74HCT02 drive input high disable clock chip TIMING CONSIDERATIONS Your interface circuitry will have compensate some incompatibility between MM58274 requires that data read from device three clock cycles (630 However read-access time MM58274 slow down computer need wait-state signal that pulls line more clock cycles wait-state generator (Figure consists MM74HCT164 shift register negativelogic gate (IC4C section 74HCT02 chip) open-collector inverter (ICIC section 74LS03) Until clock addressed remains high clearing shift register inverter IC1B this time output shift register When clock addressed goes removing signal from shift register enabling second input IC4C that goes puts microprocessor into wait state Subsequent clock pulses gradually fill shift register with ones starting from left number wait states generated depends which output shift register This application uses last that microprocessor delayed eight clock pulses delay allows plenty time MM58274 read write operations take place When output goes high also goes high terminate wait state Another incompatibility between MM58274 occurs write-cycle specification (Data Hold Time Following Write strobe) MM58274 requires system hold data after write strobe whereas holds data only However disabling driver immediately after writing data MM58274 3-state capacitance (typically driver maintains data clock lines period time after write stobe When this technique used experimentally typical measured values Data Hold Time ranged from time-base reference MM58274 768-KHz pulse obtained from crystal-controlled internal oscillator side crystal loaded with 20-pF fixed capacitor other side with 36-pF trimmer capacitor (Figure accurate timekeeping (within month) must adjust this trimmer capacitor that crystal oscillates correct frequency shouldn't connect measuring instruments directly across crystal because
8690-7
FIGURE prevent leakage from battery must break path disconnect battery negative from system ground switch lead wouldn't break leakage paths thus isn't implemented
were capacitance leads instrument would change oscillator frequency However writing 8HEX MM58274's control register places MM58274 test mode test mode crystal oscillator's output diverted (INT) provide buffered signal oscilloscope frequency counter PROGRAM MM58274 PRODUCE INTERRUPTS program clock chip produce single interrupt repetitive interrupts seven intervals from loading interrupt register (Figure make interrupts connect output from transistor (Figure lines eight interrupt levels reserved devices only IRQ3 IRQ5 available with clock have other add-in cards that interrupts however IRQ3 IRQ5 pre-empted won't able interrupts integrate hardware clock calendar into your system 8088 assembly-language programs (the source listings coded first RTCWR (see Listing allows MM58274 either test mode calibrate crystal clock normal mode initialize time date other routine RTCRD (see Listing reads clock displays date time upper right corner screen writes date time into software clock that PC-DOS maintains Thus your AUTOEXEC file invokes RTCRD routine automatically updates PC-DOS clock from hardware clock whenever turn system Incidentally RTCWR RTCRD don't contain routines perform keyboard input screen output they standard function calls BIOS routines which complete listing given Technical Reference Manual) perform these functions Placing function code register executing appropriate softwareinterrupt instruction invokes these routines Programmer's Manual gives full details make service requests this kind After assembling linking RTCWR RTCRD programs copy resulting RT-CWR RTCRD files your system disk calibrate crystal oscillator connect oscilloscope frequency counter between MM58274 ground prompt type following command RTCWR CkReturnl option puts clock test mode diverting 768-kHz oscillator output through buffer chip Adjust trimmer capacitor until frequency correct Then type ``S'' exit from calibration mode time-setting mode RTCWR will prompt select
24-hr display mode select 12-hr mode will then prompted enter number years since last leap year week current date time Each item written MM58274 when enter clock starts when press exit PC-DOS next time wish initialize hardware invoke RTCWR without option unless wish recalibrate oscillator read real-time clock program RTCRD short program reads date places temporary buffer displays then reads displays time same manner data reads validated means Data Changed flag program also writes date time into PC-DOS software clock RTCRD calls BIOS display using following instruction sequence This call displays date time upper right corner screen change location display changing values column (ROW COL) Date time information needs validated means Data Changed flag (DCF) because carry pulse from counter ripple through other counters chain possible (although statistically improbable) that incorrect data read occur during this ripple period RTCRD assures that data valid reading control register twice first read which RTCRD performs before reading other register clears zero Then after RTCRD reads other registers reads again this flag change data occurred data read invalid otherwise data good When invoke RTCRD from your AUTO-EXEC file ensure that PC-DOS clock will automatically updated from MM58274 whenever turn system reset have AUTOEXEC file create follows
Enter COPY AUTOEXEC press Return
Enter RTCRD press Return Press function then Return write
end-of-file mark save AUTOEXEC file already have AUTOEXEC file your normal editor insert ``RTCRD'' first line file
LISTING
RTCWR THIS PROGRAM WRITES REAL-TIME CLOCK (MM58274) DATA ENTERED FROM KEYBOARD THEN WRITTEN MM58274 ALSO CALIBRATION CRYSTAL PERFORMED THIS PROGRAM
TABLE EQUATES REG0 REG1 REG2 REG3 REG4 REG5 REG6 REG7 REG8 REG9 REG10 REG11 REG12 REG13 REG14 REG15 300H 301H 302H 303H 304H 305H 306H 307H 308H 309H 30AH 30BH 30CH 30DH 30EH 30FH CONTROL REGISTER TENTHS SECONDS UNITS SECONDS TENS SECONDS UNITS MINUTES TENS MINUTES UNITS HOURS TENS HOURS UNITS DAYS TENS DAYS UNITS MONTHS TENS MONTHS UNITS YEARS TENS YEARS DAYS CLOCK SETTING INTERRUPT REGISTER
STACK SEGMENT PARA STACK 'STACK' DUP(0) BYTES STACK SPACE STACK ENDS DATA SEGMENT PARA PUBLIC 'DATA' PARM DUP(0) BUFF1 DUP(0) BUFFER SPACE DATE TIME MSG0 Hour mode selection MSG1 Enter hour mode MSG2 enter hour mode MSG3 Mode selection Enter MSG4 from last leap year MSG5 'Enter date MSG6 'Enter time MSG7 'Hit start clock MSG8 INVALID ENTRY AGAIN MSG9 MSG10 MSG11 MSG12 MSG13 DATA ENDS 'Enter day- calibration mode Adjust trimmer that output Measure 'this INTR output (pin 'When finished clock
STANDARD PROGRAM PROLOG -RETURNS CONTROL AFTER TERMINATION PROGRAM
LISTING
RTCWR (Continued) PUBLIC START
CODE SEGMENT PARA PUBLIC 'CODE' START PROC ASSUME PUSH PUSH ASSUME CODE SAVE RETURN ADDR DATA DATA LOAD DATA SEGMENT ADDR START MAIN PROGRAM
MOVE PARAMETERS FROM COMMAND LINE INTO DATA SEGMENT OFFSET PARM MOVSB MOVE PARM LIST
STRING MOVE FORWARD MOVE STRING
ESTABLISH NORMAL DATA SEGMENT ADDRESSIBLY ASSUME DATA
CHECK INTO CALIBRATION MODE PARM CHAR LENGTH BRANCH CLOCK
CALIBRATE TRIMMER CAPACITOR CLEAR INTR 8088 WRITE CONTROL TEST MODE -STOP CLOCK -SELECT INTR -STOP INTR
CALL CALL CALL CALL CALL CALL
REG0 REG15 OFFSET DISPLAY OFFSET DISPLAY OFFSET DISPLAY OFFSET DISPLAY
GATE
OUTPUT INTR
MSG10 MSG11 MSG12
DISPLAY MESSAGES kCRl kLFl
MSG13
LISTING LUP8
RTCWR (Continued) LUP8 FUNCTION READ CHAR INVOKE BIOS ROUTINE CHAR FROM KEYBOARD
BRANCH CLOCK CHAR BRANCH CLOCK WAIT CRYSTAL BEING ADJUSTED
INITIALIZE SETTING
WRITE CONTROL -CLOCK STOP -INTR SELECTED -INTR STOP
REG0 REG15 REG0
CLEAR INTERRUPT OUTPUT
WRITE CNTL -CLOCK SETTING SELECTED
DETERMINE HOUR MODE CALL CALL CALL CALL CALL CALL OFFSET DISPLAY OFFSET DISPLAY OFFSET DISPLAY INPCHAR DISPCHAR MD12 MD24 OFFSET DISPLAY LUP1 MSG0 MSG1 MSG2 LOAD STARTING ADDR MSG0 DISPLAY MESSAGE LOAD STARTING ADDR MSG1 DISPLAY MESSAGE LOAD STARTING ADDR MSG2 DISPLAY MESSAGE INPUT CHAR FROM KEYBOARD ECHO CHAR CHAR FROM KEYBOARD JUMP HOUR ROUTINE CHAR FROM KEYBOARD JUMP HOUR ROUTINE LOAD STARTING ADDR MSG8 DISPLAY ERROR MESSAGE BACK AGAIN
LUP1
MSG8
HOUR MODE LEAP YEAR MODE MD12 CALL CALL CALL REG15 AMPM
LOAD CODE HOUR MODE SELECT TIME
LISTING
RTCWR (Continued) CALL CALL LEAP ENTER FROM LEAP
GOTO INPUT ROUTINE
HOUR MODE LEAP YEAR MD24 CALL CALL CALL REG15 LEAP
LOAD CODE HOUR MODE ENTER FROM LEAP
INPUT WEEK LUP7 CALL CALL CALL CALL CALL OFFSET MSG9 DISPLAY INPCHAR DIPSCHAR ERR2 ERR2 REG14 DATE OFFSET MSG8 DISPLAY LUP7
DISPLAY MESSAGE INPUT CHAR ECHO CHAR RANGE
LOAD CARRIAGE RTRN LINE FEED DISPLAY ERROR MESSAGE
ERR2
INPUT DATA INTO BUFFER DATE CALL CALL CALL OFFSET MSG5 DISPLAY BUFFER LOAD STARTING ADDR MSG5 DISPLAY MESSAGE INPUT DATA INTO BUFFER
WRITE DATA BUFFER INTO REAL-TIME CLOCK OFFSET BUFF1 REG11 REG10 MOVE STARTING ADDR BUFFER
WRITE TENS MONTHS
WRITE UNITS MONTHS
REG9
LISTING
RTCWR (Continued) REG8 WRITE UNITS DAYS WRITE TENS DAYS
REG13 REG12
WRITE TENS YEARS
WRITE UNITS YEARS
INPUT TIME INTO BUFFER CALL CALL CALL OFFSET MSG6 DISPLAY BUFFER LOAD STARTING ADDR MSG6 DISPLAY MESSAGE INPUT DATA INTO BUFFER
WRITE TIME INTO REAL-TIME CLOCK OFFSET BUFF1 REG7 REG6 MOVE STARTING ADDR BUFFER
WRITE TENS HOURS
WRITE UNITS HOURS
REG5 REG4
WRITE TENS MINUTES
WRITE UNITS MINUTES
REG3
WRITE TENS SECONDS
LISTING
RTCWR (Continued) REG2 WRITE UNITS SECONDS
START CLOCK STRIKE CALL OFFSET MSG7 DISPLAY LOAD STARTING ADDR MSG7 DISPLAY MESSAGE FUNCTION INPUT FROM KEYBOARD FUNCTION PARAMETER BIOS ROUTINE INVOKE BIOS ROUTINE RETURNS STRUCK OTHERWISE LOOP BACK STRUCK
REG0
GIVE START COMMAND CLOCK RETURN -STORES DATE TIME BYTE BUFFER STARTING LOCATION BUFFER LABEL BUFF1
`BUFFER` SUBROUTINE
ENTRY OUTPUT
NONE BUFF1 ARRAY CONTAINS TIME DATE ALTERED
PUBLIC BUFFER BUFFER PROC NEAR INPUT OFFSET BUFF1 CALL INPCHAR CALL DISPCHAR EXIT1 EXIT1 OFFSET MSG8 CALL DISPLAY INPUT EXIT1 BUFFER ENDP
MOVE STARTING ADDR BUFFER INPUT CHAR FROM KEYBOARD ECHO CHAR
CHAR CARRIAGE RETURN JUMP BACK INPUT ANOTHER CHAR FIRST CHAR kCRl DON'T CHANGE BUFFER EXIT LAST CHAR kCRl BUFFER FULL EXIT LOAD STARTING ADDR MSG8 DISPLAY ERROR MESSAGE RELOAD BUFFER
LISTING
RTCWR (Continued)
''AMPM'' SUBROUTINE INPUTS FROM KEYBOARD BIOS TIME ENTRY OUTPUT NONE ALTERED
PUBLIC AMPM AMPM PROC NEAR OFFSET MSG3 CALL DISPLAY LUP2 CALL INPCHAR CALL DISPCHAR OFFSET MSG8 CALL DISPLAY LUP2 REG15 REG15 AMPM ENDP
LOAD STARTING ADDR MSG3 DISPLAY MESSAGE INPUT CHAR FROM KEYBOARD ECHO CHAR CHAR TIME CHAR TIME CHAR TIME CHAR TIME LOAD STARTING ADDR MSG8 DISPLAY ERROR MESSAGE ENTRY RENTER CHAR
LOAD CODE TIME
LOAD CODE TIME
''LEAP'' SUBROUTINE INPUTS NUMBER FROM FROM KEYBOARD THIS NUMBER NUMBER YEARS FROM LAST LEAP YEAR ENTRY NONE OUTPUT ALTERED PUBLIC LEAP LEAP PROC NEAR LUP3 CALL CALL CALL OFFSET MSG4 DISPLAY INPCHAR DISPCHAR ERR1 ERR1 LOAD STARTING ADDR MSG4 DISPLAY MESSAGE INPUT CHAR FROM KEYBOARD ECHO CHAR CHECK INVALID ENTRY CLEAR UPPER NIBBLE
LISTING
RTCWR (Continued) REG15 RTRN OFFSET MSG8 DISPLAY LUP3 INPUT CLOCK SETTING CLEAR WRITE ONLY ROTATE LEFT TIMES SAVE
ERR1 CALL RTRN LEAP ENDP
LOAD STARTING ADDR MSG8 DISPLAY ERROR MESSAGE BACK AGAIN
''INPCHAR'' SUBROUTINE INVOKES BIOS ROUTINE INPUT CHARACTER FROM KEYBOARD ENTRY NONE OUTPUT ALTERED PUBLIC INPCHAR INPCHAR PROC NEAR INPCHAR ENDP
FUNCTION INPUT CHAR INTO FUNCTION PARAMETER BIOS ROUTINE INVOKE BIOS ROUTINE
''DISPLAY'' SUBROUTINE DISPLAYS MESSAGES MEMORY LOCATIONS MSG0 MSG15 USES DISPCHAR SUBROUTINE BIOS CALL ENTRY OFFSET MESSAGE OUTPUT ALTERED PUBLIC DISPLAY DISPLAY PROC NEAR DISP1 CALL DISPCHAR LOOP DISP1 CALL DISPLAY ENDP
LOAD MESSAGE CHAR COUNTER SINGLELY LOAD CHAR MESSAGE DISPLAY THAT CHAR LOOP BACK TIMES
''DISPCHAR'' SUBROUTINE INVOKES BIOS ROUTINE DISPLAY CHARACTER SCREEN ENTRY NONE OUTPUT ALTERED
LISTING
RTCWR (Continued) PUBLIC DISPCHAR
DISPCHAR PROC NEAR PUSH DISPCHAR ENDP SAVE
FUNCTION WRITE SCREEN FUNCTION PARAMETER BIOS ROUTINE INVOKE BIOS ROUTINE RESTORE
''CR LF'' SUBROUTINE PRODUCES CARRIAGE RETURN LINE FEED SCREEN ENTRY NONE OUTPUT REGISTERS PRESERVED PUBLIC PROC NEAR PUSH CALL DISPCHAR CALL DISPCHAR ENDP
SAVE CARRIAGE RETURN LINE FEED RESTORE
START ENDP CODE ENDS
MAIN PROGRAM START
LISTING
RTCRD THIS PROGRAM READS FROM REAL-TIME CLOCK (MM582774) DATA READ FROM MM58274 CHECK WITH 'DATA CHANGED FLAG' TIME DATE DISPLAYED UPPER RIGHT CORNER PROGRAM ALSO WRITES TIME DATE INITIALIZE THESE FUNCTIONS
TABLE EQUATES REG0 REG1 REG2 REG3 REG4 REG5 REG6 REG7 REG8 REG9 REG10 REG11 REG12 REG13 REG14 REG15 300H 301H 302H 303H 304H 305H 306H 307H 308H 309H 30AH 30BH 30CH 30DH 30EH 30FH CONTROL TENTHS UNITS TENS UNITS MINUTES TENS MINUTES UNITS HOURS TENS HOURS UNITS DAYS TENS DAYS UNITS MONTHS TENS MONTHS UNITS YEARS TENS YEARS WEEK CLOCK SETTING INTERRUPT
STACK SEGMENT PARA STACK 'STACK' DUP(0) STACK ENDS DATA SEGMENT PARA PUBLIC 'DATA' MONTH 'JAN' 'FEB' 'MAR' 'APR' 'MAY' 'JUN' 'JUL' 'AUG' 'SEP' 'OCT' 'NOV' 'DEC' 'SUNDAY 'MONDAY 'TUESDAY 'WEDNESDAY 'THURSDAY 'FRIDAY 'SATURDAY DATE 'MMM 19YR' ARRAY DATE TIME ARRAY TIME CHARS MONTH CHARS LOCATION SAVE 'DAY WEEK' DATA ENDS
CODE SEGMENT PARA PUBLIC 'CODE' PROGRAM PROLOG RETURN TERMINATION PROGRAM PUBLIC START START PROC ASSUME CODE PUSH PUSH
BEGIN MAIN PROGRAM SAVE RETURN ADDR
LISTING
RTCRD (Continued) ASSUME DATA DATA DATA DATA EXTRA SEGMENT SAME
PERFORM DUMMY READ CNTL READ REG0
READ WEEK READ DATE CALL REG11 ADD1 REG10 OFFSET MONTH OFFSET DATE REG9 REG8 REG13 REG14
READ CODE WHERE SAVE WEEK
ADD1
READ TENS MONTHS CONVERT MONTHS JUMP MONTHS SAVE READ UNITS MONTHS CONVERT (TENS MONTH) (UNITS MONTHS) SAVE MONTH NUMBER CHARS MONTH) STARTING ADDR ARRAY 'MONTH' OFFSET INTO ARRAY 'MONTH' STARTING ADDR ARRAY 'DATE' MOVE MONTH INTO 'DATE' ARRAY
READ TENS DAYS 'TENS DAYS' JUMP MOVE BLANK TENS DAYS MOVE INTO 'DATE' ARRAY
READ UNITS DAYS MOVE INTO 'DATE' ARRAY
READ TENS YEARS MOVE INTO 'DATE' ARRAY
LISTING
RTCRD (Continued) REG12 READ UNITS YEARS MOVE INTO 'DATE' ARRAY
READ TIME MOVE INTO ARRAY 'TIME' OFFSET TIME MOVE STARTING ADDR ARRAY 'TIME' REG7 READS TENS HOURS MOVE INTO 'TIME' ARRAY REG6 READ UNITS HOURS MOVE INTO 'TIME' ARRAY REG5 READ TENS MINUTES REG4 READ UNITS MINUTES REG3 READ TENS SECONDS REG2 READ UNITS SECONDS DATA VALIDATION CHECK TEST REG0 DSPLY READ
READ CNTL DISPLAY DATE TIME INVALID DATE READ AGAIN
DISPLAY DATE TIME DSPLY OFFSET 0040H 'DAY WEEK' CONVERT ASCII (DAY LEN) CALCULATING OFFSET INTO ARRAY 'DAY' MOVE STARTING ADDR ARRAY 'DAY' STARTING ADDR STRING PARAMETERS SENT BIOS
LISTING
CALL CALL CALL CALL CALL CALL
RTCRD (Continued) CURSOR DISPLAY OFFSET DATE 0140H CURSOR DISPLAY OFFSET TIME 0240H CURSOR DISPLAY
MOVE CURSOR DISPLAY
MOVE STARTING ADDR ARRAY 'DAY' CURSOR DISPLAY DATE MOVE STARTING ADDR ARRAY 'DATE' CURSOR DISPLAY TIME
MOVE CURSOR BOTTOM SCREEN 1700H FUNCTION MOVE CURSOR INVOKE BIOS ROUTINE
WRITE DATE CALL CALL CALL CALL OFFSET DATE CONVERT CONVERT 076CH 02BH MOVE MONTH NUMBER MONTHS PARM ROUTINE MOVE STARTING ADDR ARRAY 'DATE' MOVE DAYS INTO ARRAY 'DATE' INPUT DAYS MONTH CONVERT BINARY DAYS PARM ROUTINE INPUT YEARS MAKE INTO BITS MOVE 1900D 1900 (YEARS) FUNCTION DATE INVOKE ROUTINE
WRITE TIME CALL CALL CALL CALL CALL OFFSET TIME CONVERT CONVERT MOVE STARTING ADDR INPUT HOURS HOURS PARM ARRAY 'TIME'
INPUT MINUTES MINUTES INPUT SECONDS PARM
LISTING
RTCRD (Continued) CALL PUSH CALL CONVERT REG1 CONVERT 02DH SECONDS PARM
INPUTS TENTHS SECONDS SAVE SHIFT LEFT FOUR TIMES SECONDS RESTORE FUNCTION TIME INVOKE ROUTINE
MAIN PROGRAM RETURN ''INP BCD'' SUBROUTINE INPUTS 4-BIT INTO SHIFTS LEFT FOUR TIMES THEN ANOTHER 4-BIT NUMBER INPUTTED ENTRY OFFSET 'TIME' 'DATE' ARRAY OUTPUT CONTAINS NUMBERS PUBLIC PROC NEAR PUSH PUSH ENDP SAVE SAVE ENTER NUMBERS SHIFT LEFT FOUR TIMES ENTER ANOTHER CLEAR UPPER NIBBLE COMBINE BOTH BCD'S TOGETHER RESTORE RESTORE
''CONVERT'' SUBROUTINE PACKED NUMBERS CONVERTED THEIR BINARY EQUIVALENT ENTRY CONTAINS PACKED NUMBERS OUTPUT BINARY CONVERSION PUBLIC CONVERT CONVERT PROC NEAR PUSH PUSH
SAVE SAVE SHIFT RIGHT FOUR TIMES RESTORE RESTORE CONTENTS INTO (MOST DIGIT)
LISTING
RTCRD (Continued)
BINARY EQUIV
MOST
CONVERT ENDP
CLEAR MOST DIGIT BINARY EQUIV BOTH DIGITS
''SET CURSOR'' SUBROUTINE SETS CURSOR DESIRED POSITION POSITION INDICATED COLUMN ENTRY PUBLIC CURSOR CURSOR PROC NEAR CURSOR ENDP ''MOV STR'' SUBROUTINE
FUNCTION4MOVE CURSOR INVOKE BIOS ROUTINE
MOVES STRING CHARS FROM 'MONTH' ARRAY INTO 'DATE' ARRAY THESE CHARS REPRESENT MONTH MARCH
ENTRY OUTPUT
DI4OFFSET DATE SI4OFFSET MONTH BOTH INCREMETED ALTERED
PUBLIC PROC NEAR LOOP ENDP
MOVE CHARS 'MONTH' ARRAY INTO 'DATE' ARRAY
''DISPLAY'' SUBROUTINE DISPLAYS EITHER DATE TIME ENTRY STARTING ADDR 'TIME' 'DATE' 'TIME' ARRAY OUTPUT ALTERED PUBLIC DISPLAY DISPLAY PROC NEAR DISP1 CALL DISPCHAR LOOP DISP1 CALL
LOAD CHAR COUNTER LOAD CHARS DISPLAY CHARS
LISTING
RTCRD (Continued)
DISPLAY ENDP `DISPCHAR` SUBROUTINE INVOKES BIOS ROUTINE DISPLAY CHARACTER ENTRY OUTPUT SCREEN NONE ALTERED
PUBLIC DISPCHAR DISPCHAR PROC NEAR PUSH DISPCHAR ENDP
SAVE
FUNCTION WRITE SCREEN INVOKE BIOS ROUTINE RESTORE
SUBROUTINE PRODUCES CARRIAGE RETURN LINE FEED SCREEN ENTRY NONE OUTPUT PRESERVED PUBLIC PROC NEAR PUSH CALL DISPCHAR CALL DISPCHAR ENDP
SAVE CARRIAGE RETURN LINE FEED RESTORE
START ENDP CODE ENDS
MAIN PROGRAM START
Hardware Clock Calendar Your
100443
LIFE SUPPORT POLICY NATIONAL'S PRODUCTS AUTHORIZED CRITICAL COMPONENTS LIFE SUPPORT DEVICES SYSTEMS WITHOUT EXPRESS WRITTEN APPROVAL PRESIDENT NATIONAL SEMICONDUCTOR CORPORATION used herein Life support devices systems devices systems which intended surgical implant into body support sustain life whose failure perform when properly used accordance with instructions provided labeling reasonably expected result significant injury user critical component component life support device system whose failure perform reasonably expected cause failure life support device system affect safety effectiveness
AN-443
National Semiconductor Corporation 1111 West Bardin Road Arlington 76017 1(800) 272-9959 1(800) 737-7018
National Semiconductor Europe (a49) 0-180-530 Email cnjwge tevm2 Deutsch (a49) 0-180-530 English (a49) 0-180-532 Fran (a49) 0-180-532 Italiano (a49) 0-180-534
National Semiconductor Hong Kong 13th Floor Straight Block Ocean Centre Canton Tsimshatsui Kowloon Hong Kong (852) 2737-1600 (852) 2736-9960
National Semiconductor Japan 81-043-299-2309 81-043-299-2408
National does assume responsibility circuitry described circuit patent licenses implied National reserves right time without notice change said circuitry specifications
Other recent searches
XDUG46C - XDUG46C XDUG46C Datasheet
SJ200 - SJ200 SJ200 Datasheet
SI-3000LLSL - SI-3000LLSL SI-3000LLSL Datasheet
SDIP64 - SDIP64 SDIP64 Datasheet
PM25RLA120 - PM25RLA120 PM25RLA120 Datasheet
LT6411 - LT6411 LT6411 Datasheet
B8766 - B8766 B8766 Datasheet
ADP3189 - ADP3189 ADP3189 Datasheet
2SC945 - 2SC945 2SC945 Datasheet
Privacy Policy | Disclaimer
© 2012 Datasheet Archive
