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Characteristics MM54HC MM74HC High-Speed CMOS When deciding what
Top Searches for this datasheetCharacteristics MM54HC MM74HC High-Speed CMOS Characteristics MM54HC MM74HC High-Speed CMOS When deciding what circuits design speed most often very important criteria MM54HC MM74HC intended offer same basic speed performance power Schottky while giving designer power high noise immunity characteristics CMOS other words HC-CMOS about times faster than CD4000 MM54C MM74C metal-gate CMOS logic Even though HC-CMOS logic does have speeds similar LSTTL there some differences this family's speeds specified various parameters affect circuit performance give designer idea expected performance this discussion will include characteristics high-speed CMOS specified This logic family been specified that majority applications specifications directly applied design Since impossible specify device under possible situations performance variations with power supply loading temperature discussed several easy methods determining propagation delays nearly situation also described Finally useful compare performance HC-CMOS 54LS 74LS CD4000 Data Sheet Specifications Even though speeds achieved this high-speed CMOS family similar LSTTL input output power supply characteristics very similar metal-gate CMOS Because this actual measurements various timing parameters done same MM54HCT MM74HCT input compatible circuits exception Standard HC-CMOS specifications measured room military commercial temperature ranges Also specified with equivalent supply load conditions enable proper comparison power Schottkey Input signal levels ground with rise fall times (10% 90%) Since standard CMOS logic logic trip point about mid-supply outputs will transition from ground timing measurements made from points input output waveforms This shown Figure Using mid-supply point gives more accurate representation high-speed CMOS will perform CMOS system This different from measurement point ground input waveforms that used measure timing This output loading used data sheet specifications fall into categories depending output drive capability specific device output drive categories standard outputs (IOL driver outputs (IOL Timing measurements standard outputs made using load driver circuits measured using both load tests test load capacitance includes stray test capacitances TRI-STATE measurements where outputs from active output level high impedance state made using same input waveforms described above timing measured points output waveforms test circuit load composed TRI-STATE registered trademark National Semiconductor Corp C1995 National Semiconductor Corporation 5067 National Semiconductor Application Note Larry Wakeman June 1983 capacitor resistor test tPHZ resistor swiched ground tPLZ switched TRI-STATE test circuit typical timing waveforms shown Figure Measurements where output goes from high impedance state active output same except that measurements made points driver devices both capacitors used 5067 5067 5067 AN-317 FIGURE Typical Timing Waveform Propagation Delays Clocked Delays Also Test Circuit These Waveforms RRD-B30M115 Printed 5067 5067-4 5067-5 FIGURE Typical TRI-STATE Timing Waveforms Test Circuit 54HC 74HC Devices Note Some early data sheets used different test circuit This been changed will changed 5067 FIGURE Typical Timing Waveforms Propagation Delays Clocked Delays 54HCT 74HCT Devices especially when battery operated Like metal-gate CMOS lowering power supply voltage will result increased circuit delays Some typical delays shown Figure supply voltage decreased from propagation delays increase about three times when voltage increased delays decrease MM54HCT MM74HCT input compatible devices intended operate with devices makes sense specify them same Thus shown Figure typical timing input waveforms 0-3V levels timing measurements made from levels these signals test circuits used same standard input circuits This shown Figure These measurements compatible with type specified devices Specifying standard MM54HC MM74HC speeds using input measurement levels does represent specification incompatibility between most microprocessor speed specifications should however present design problem timing difference that results from using different measurement points time takes output make extra excursion from Thus standard high-speed CMOS output extra transition time should result worst case less than increase circuit delay measurement load Thus speed critical designs adding safely enables proper design into level systems Power Supply Affect Performance overall power supply range MM54HC MM74HC logic wide CD4000 series CMOS performance optimization operation however this family operate over range which does enable some versatility 5067 FIGURE Typical Propagation Delay Variations 74HC00 74HC139 74HC174 with Power Supply some designs important calculate expected propagation delays specific situation covered data sheet This easily accomplished using normalized curve Figure which plots propagation delay variation constant t(V) versus power supply voltage normalized operation This constant when used with following equation data sheet specifications yields required delay power supply tPD(V) t(V) tPD(5V) Where tPD(5V) data sheet delay tPD(V) resultant delay desired supply voltage This curve also used specifications example calculate typical delay 74HC00 data sheet typical load) used From Figure t(V) delay would Where t(V) propagation delay variation with power supply constant tPD(5V) data sheet (use (CLbe equation) delay load capacitance tPD(C resultant propagation delay desired load supply This equation's first term difference propagation delay from desired load data sheet specification load second term essentially equation delay calculated then t(V) t(C) (standard output) (bus output) Using previous 74HC00 example delay load tPD(100 042)(100 5067 FIGURE Typical Propagation Delay Variation With Load Capacitance 74HC04 74HC164 74HC240 74HC374 5067 FIGURE MM54HCMM74HC Propagation Delay Variation Power Supply Normalized Speed Variation with Capacitive Loading When high-speed CMOS designed into CMOS system load given output essentially capacitive individual input capacitances TRI-STATE output capacitances parasitic wiring capacitances load increased propagation delay increases rate increase delay particular device increased charge discharge time output load rate which delay changes dependent output impedance MM54HC MM74HC circuit mentioned high-speed CMOS there output structures driver standard 5067 FIGURE Propagation Delay Capacitance Variation Constant Power Supply Figure plots some typical propagation delay variations against load capacitance calculate under particular load condition what propagation delay circuit need only know what rate change propagation delay with load capacitance this number extrapolate delay from data sheet vaue desired value Figure plots this constant t(C) against power supply voltage variation Thus expanding equation propagation delay load power supply calculated using tPD(C t(C) tPD(5V) t(V) Speed Variations with Change Temperature Changes temperature will cause some change speed with CD4000 other metal-gate CMOS logic parts MM54HC MM74HC operates slightly slower elevated temperatures somewhat faster lower temperatures mechanism which causes this variation same that which causes variations metal-gate CMOS This factor carrier mobility which decreases with increase temperature this causes decrease overall transistor gain which corresponding affect speed ternal propagation delays Thus they exhibit similar temperature supply dependence propagation delays They however independent output load conditions Figure shows some typical temperature-delay variations some high-speed CMOS circuits seen speeds derate fairly linearly from about Thus propagation delays will increased about from 54HC 74HC speeds specified room temperature (commercial temperature range) (military range) virtually cases numbers given highest temperature calculate expected device speeds temperature specified device data sheet following equation used tPD(T) ((T-25)(0 003)) tPD(25) Where tPD(T) delay desired temperature tPD(25) room temperature delay Using 74HC00 example from previous section expected increase propagation delay when operated 25)(0 003) expected delay some other supply also calculated calculating room temperature delay then calculating delay desired temperature 5067 FIGURE Typical Output Rise Fall Time Load Standard Driver Outputs 5067 FIGURE Typical Propagation Delay Variation With Temperature 54HC02 54HC390 54HC139 54HC151 Output Rise Fall Setup Hold Times Pulse Width Performance Variations previous discussion been restricted propagation delay variations most instances this most important parameter know Output rise fall times also important Unlike type logic families specifies these data sheet High-speed CMOS outputs were designed have typically symmetrical rise fall times Output rise fall time variations track very closely propagation delay variations over temperature supply Figure plots rise fall time against output load room temperature Load variation transition time twice delay variation because delays measured halfway points waveform transition Setup times pulse width performance under different conditions necessary when using clocked logic circuits These parameters indirect measurements Input Rise Fall Times Another speed consideration though directly related propagation delays input rise fall time with other high-speed logic families also CD4000B CMOS slow input rise fall times input signals cause logic problems Typically small signal gains MM54HC MM74HC gate greater than 1000 input signals spend appreciable time between logic states noise input power supply will cause output oscillate during this transition This oscillation could cause logic errors user's circuit well dissipate extra power unnecessarily this reason MM54HC MM74HC data sheets recommend that input rise fall times shorter than Flip-flops other clocked circuits also should have their input rise fall times faster than clock input rise fall times become long system noise generate internal oscillations causing internal flip-flops toggle wrong external clock edge Even noise were present internal clock skew caused slow rise times could cause logic malfunction long rise fall times unavoidable Schmitt triggers ('HC14 'HC132) other special devices that employ Schmitt trigger circuits should used speed these input signals Logic Family Performance Comparison obtain better feeling high-speed CMOS compares bipolar other CMOS logic families Figure plots MM54HC MM74HC 54LS 74LS CD4000B logic device speeds versus output loading HC-CMOS propagation delay delay variation with load nearly same LSTTL about times faster than metal-gate CMOS Utilizing silicon-gate process enables achievement LSTTL speeds large output drive this family enables variation with loading nearly same LSTTL well When comparing CD4000 operating HC-CMOS typically times faster about three times faster than CD4000 logic operating This shown Figure 5067 5067 FIGURE Comparison LSTTL High-Speed CMOS Delays FIGURE Comparison HC-CMOS Metal-Gate CMOS LSTTL Propagation Delay Temperature CD4000 about tenth output drive MM54HC MM74HC seen Figure capacitive delay variation much larger shown Figure temperature variation HCCMOS similar CD4000 This same physical phenomenon both families 54LS 74LS logic family very different temperature variation which different circuit parameter variations advantage CMOS that temperature variation predictable with LSTTL sometimes speed increases other times speed decreases with temperature inherent symmetry MM54HC MM74HC's logic levels rise fall times tends make high high propagation delay very similar thus making these parts easy Conclusion High-speed CMOS circuits speed compatible with 54LS 74LS circuits only data sheets even driving different loads general HC-CMOS provides large improvement performance over older metal-gate CMOS using some equations curves detailed here along with data sheet specifications designer very closely estimate performance MM54HC MM74HC device Even though above examples illustrate typical performance calculations more conservative design implemented more conservatively estimating various constants using worst case data sheet limits also possible estimate fastest propagation delays using speeds about times data sheet typicals aggressively estimating various constants 5067 FIGURE Comparison Metal-Gate CMOS High-Speed CMOS Delays Characteristics MM54HC MM74HC High-Speed CMOS LIFE SUPPORT POLICY NATIONAL'S PRODUCTS AUTHORIZED CRITICAL COMPONENTS LIFE SUPPORT DEVICES SYSTEMS WITHOUT EXPRESS WRITTEN APPROVAL PRESIDENT NATIONAL SEMICONDUCTOR CORPORATION used herein Life support devices systems devices systems which intended surgical implant into body support sustain life whose failure perform when properly used accordance with instructions provided labeling reasonably expected result significant injury user critical component component life support device system whose failure perform reasonably expected cause failure life support device system affect safety effectiveness AN-317 National Semiconductor Corporation 1111 West Bardin Road Arlington 76017 1(800) 272-9959 1(800) 737-7018 National Semiconductor Europe (a49) 0-180-530 Email cnjwge tevm2 Deutsch (a49) 0-180-530 English (a49) 0-180-532 Fran (a49) 0-180-532 Italiano (a49) 0-180-534 National Semiconductor Hong Kong 13th Floor Straight Block Ocean Centre Canton Tsimshatsui Kowloon Hong Kong (852) 2737-1600 (852) 2736-9960 National Semiconductor Japan 81-043-299-2309 81-043-299-2408 National does assume responsibility circuitry described circuit patent licenses implied National reserves right time without notice change said circuitry specifications Other recent searchesOPA361 - OPA361 OPA361 Datasheet MC13017 - MC13017 MC13017 Datasheet CDBQR70 - CDBQR70 CDBQR70 Datasheet BC856W - BC856W BC856W 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