µPD78P018F(A) 8-BIT SINGLE-CHIP MICROCONTROLLER DESCRIPTION

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µPD78P018F(A) 8-BIT SINGLE-CHIP MICROCONTROLLER DESCRIPTION

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INTEGRATED CIRCUIT
µPD78P018F(A)
8-BIT SINGLE-CHIP MICROCONTROLLER
DESCRIPTION
µPD78P018F(A) comes under more severe quality assurance program than µPD78P018F (standard grade), classified special grade NEC's quality grade classification. µPD78P018F(A) member µPD78018F Subseries within 78K/0 Series. internal mask µPD78018F(A) replaced with one-time PROM. Because µPD78P018F(A) programmed users, ideally suited applications involving evaluation systems development stage, small-scale production many different products, rapid development time-to-market products. Detailed descriptions functions provided following documents. sure read them before designing.
µPD78018F, 78018FY Subseries User's Manual: U10659E
78K/0 Series User's Manual-Instructions: U12326E
FEATURES
Higher reliability compared µPD78P018F (refer "Quality Grades Semiconductor Devices" (C11531E)) compatible with mask version (except pin) Internal PROM: Kbytes Note
µPD78P018FCW(A), 78P018FGC(A)-AB8: Programmable only once (suited small-scale production)
Internal high-speed RAM: 1024 bytes Note Internal expansion RAM: 1024 bytes Note Internal buffer RAM: bytes Operable over same supply voltage range mask version (1.8 QTOPmicrocontroller supported Notes capacities internal PROM internal high-speed changed means internal memory size switching register (IMS). capacity internal expansion changed means internal expansion size switching register (IXS). Remarks QTOP Microcontroller general term microcontrollers which incorporate one-time PROM totally supported NEC's programming service (from programming marking, screening verification). differences between PROM version mask versions, refer DIFFERENCES BETWEEN µPD78P018F(A) MASK VERSIONS.
information this document subject change without notice. Document U12132EJ2V0DS00 (2nd edition) Date Published December 1998 CP(K) Printed Japan
mark
shows major revised points.
1997
µPD78P018F(A)
ORDERING INFORMATION
Part Number Package 64-pin plastic shrink (750 mil) 64-pin plastic Internal One-time PROM One-time PROM
PD78P018FCW(A) PD78P018FGC(A)-AB8
QUALITY GRADE
Part Number Package 64-pin plastic shrink (750 mil) 64-pin plastic Quality Grade Special Special
PD78P018FCW(A) PD78P018FGC(A)-AB8
Refer "Quality Grades Semiconductor Devices" (Document number C11531E) published Corporation detailed information quality grades recommended applications devices. following table shows differences between µPD78P018F(A) standard product (µPD78P018F).
Part Number Item Packages
µPD78P018F(A)
64-pin plastic shrink (750 mil) 64-pin plastic
µPD78P018F
64-pin plastic shrink (750 mil) 64-pin plastic 64-pin plastic LQFP 64-pin ceramic shrink (with window) (750 mil) 64-pin ceramic WQFN Standard
Quality Grade
Special
µPD78P018F(A)
78K/0 SERIES LINEUP
products 78K/0 Series listed below. names enclosed boxes subseries names.
Control 100-pin 100-pin 100-pin 100-pin 80-pin 80-pin 80-pin 80-pin 64-pin 64-pin 64-pin 64-pin 42/44-pin
Products mass production Products under development subseries products compatible with bus. EMI-noise reduced version µPD78078
µPD78075B µPD78078 PD78070A PD780058 PD78058F PD78054 PD780065 PD780034 PD780024 PD78014H µPD78018F µPD78083
Inverter control
µPD78078Y µPD78070AY PD780018AY PD780058YNote PD78058FY PD78054Y PD780034Y µPD780024Y PD78018FY
Timer added µPD78054 external interface enhanced ROM-less version µPD78078 Serial µPD78078Y enhanced function limited Serial µPD78054 enhanced EMI-noise reduced EMI-noise reduced version µPD78054 UART converter were added µPD78018F enhanced capacity µPD780024 expanded converter µPD780024 enhanced Serial µPD78018F enhanced EMI-noise reduced version µPD78018F Basic subseries control On-chip UART, capable operating voltage (1.8
64-pin
PD780988
FIPdrive
On-chip inverter control circuit UART. EMI-noise reduced
78K/0 Series
100-pin 100-pin 80-pin 80-pin 80-pin
µPD780208 PD780228 PD780232 µPD78044H µPD78044F
drive
µPD78044F were enhanced, Display output total: µPD78044H were enhanced, Display output total: panel control. On-chip C/D. Display output total: N-ch open drain added µPD78044F, Display output total: Basic subseries driving FIP, Display output total:
100-pin 100-pin 100-pin
PD780308 PD78064B µPD78064
µPD780308Y PD78064Y
µPD78064 enhanced ROM, capacity expanded EMI-noise reduced version µPD78064 Basic subseries driving LCDs, On-chip UART
interface supported 80-pin 80-pin 80-pin 80-pin
µPD78098B PD780948 PD780701Y PD780833Y
Meter control
IEBuscontroller added µPD78054. EMI-noise reduced. On-chip DCAN controller On-chip DCAN/IEBus controller On-chip J1850 (CLASS2) controller
80-pin 80-pin 100-pin
PD780973 µPD780955 µPD780958
On-chip controller/driver automotive meter drive Ultra-low power consumption on-chip UART industrial meter control
Note Under planning
µPD78P018F(A)
major functional differences among subseries shown below.
Function Subseries Name Control Timer 8-bit 16-bit Watch MIN. Value
Capacity
8-bit 10-bit 8-bit
Serial Interface
External Expansion
µPD78075B µPD78078 µPD78070A
(UART:
Available
(time-division UART: (UART:
µPD780058 µPD78058F µPD78054
µPD780065 µPD780034 µPD780024 µPD78014H µPD78018F µPD78083
Inverter control drive
(UART: division 3-wire:
(UART: time-
(UART: (UART: (time-division UART: (UART:
Available
µPD780988 Note
µPD780208 µPD780228 µPD780232 µPD78044H µPD78044F
drive µPD780308
µPD78064B µPD78064
interface µPD78098B supported µPD780948 Meter control
(UART: (UART: (UART: (UART:
µPD780973 µPD780955
µPD780958
Note 16-bit timer: channels 10-bit timer: channel
µPD78P018F(A)
FUNCTION OVERVIEW
Item Internal memory PROM High-speed Expansion Buffer Memory space General-purpose registers Kbytes Note 1024 bytes Note 1024 bytes Note bytes Kbytes bits registers bits registers banks) Function
Minimum instruction execution Minimum instruction execution time modification function provided. time When main system µs/0.8 µs/1.6 µs/3.2 µs/6.4 (@10.0-MHz operation) clock selected When subsystem clock selected Instruction 16-bit operation Multiply/divide bits bits, bits bits) manipulate (set, reset, test, boolean operation) adjust, etc. (@32.768-kHz operation)
ports
Total: CMOS input: CMOS I/O: N-channel open-drain (15-V withstand voltage):
converter Serial interface
8-bit resolution channels Operable over wide power supply voltage range: AVDD 3-wire serial I/O/SBI/2-wire serial mode selectable: channel 3-wire serial mode (automatic data transmit/receive function bytes provided chip): channel 16-bit timer/event counter: 8-bit timer/event counter: Watch timer: Watchdog timer: channel channels channel channel
Timer
Timer output Clock output Buzzer output Vectored interrupt sources Maskable Non-maskable Software Test input Supply voltage Operating ambient temperature Package
(14-bit output 39.1 kHz, 78.1 kHz, kHz, kHz, kHz, 1.25 (@10.0-MHz operation with main system clock), 32.768 (@32.768-kHz operation with subsystem clock) kHz, kHz, (@10.0-MHz operation with main system clock) Internal: External: Internal: Internal: External: +85°C 64-pin plastic shrink (750 mil) 64-pin plastic
Notes internal PROM internal high-speed capacities changed with internal memory size switching register (IMS). internal expansion capacity changed with internal expansion size switching register (IXS).
µPD78P018F(A)
CONFIGURATION (Top View)
Normal operating mode 64-pin Plastic Shrink (750 mil)
µPD78P018FCW(A)
P20/SI1 P21/SO1 P22/SCK1 P23/STB P24/BUSY P25/SI0/SB0 P26/SO0/SB1 P27/SCK0 P30/TO0 P31/TO1 P32/TO2 P33/TI1 P34/TI2 P35/PCL P36/BUZ P40/AD0 P41/AD1 P42/AD2 P43/AD3 P44/AD4 P45/AD5 P46/AD6 P47/AD7 P50/A8 P51/A9 P52/A10 P53/A11 P54/A12 P55/A13
P17/ANI7 P16/ANI6 P15/ANI5 P14/ANI4 P13/ANI3 P12/ANI2 P11/ANI1 P10/ANI0 P04/XT1 P03/INTP3 P02/INTP2 P01/INTP1 P00/INTP0/TI0 RESET P67/ASTB P66/WAIT P65/WR P64/RD P57/A15 P56/A14
Cautions Connect directly VSS. Connect AVDD VDD. Connect AVSS VSS.
µPD78P018F(A)
64-pin Plastic
µPD78P018FGC(A)-AB8
P26/SO0/SB1 P25/SI0/SB0
P24/BUSY
P27/SCK0
P22/SCK1
P17/ANI7
P16/ANI6
P15/ANI5
P14/ANI4
P13/ANI3
P30/TO0 P31/TO1 P32/TO2 P33/TI1 P34/TI2 P35/PCL P36/BUZ P40/AD0 P41/AD1 P42/AD2 P43/AD3 P44/AD4 P45/AD5 P46/AD6
P12/ANI2
P21/SO1
P23/STB
P20/SI1
P11/ANI1 P10/ANI0 P04/XT1 P03/INTP3 P02/INTP2 P01/INTP1 P00/INTP0/TI0 RESET P67/ASTB P66/WAIT
P56/A14
P57/A15
P64/RD
P47/AD7
P52/A10
P53/A11
P54/A12
Cautions Connect directly VSS. Connect AVDD VDD. Connect AVSS VSS.
P55/A13
P65/WR
P50/A8
P51/A9
µPD78P018F(A)
A15: AD7: ANI0 ANI7: ASTB: AVDD: AVREF: AVSS BUSY: BUZ: P04: P17: P27: P37: P47: P57: P67: Address Address/Data Analog Input Address Strobe Analog Power Supply Analog Reference Voltage Analog Ground Busy Buzzer Clock Port Port Port Port Port Port Port PCL: RESET: SB0, SB1: SCK0, SCK1: SI0, SI1: SO0, SO1: STB: TI2: TO2: VDD: VPP: VSS: WAIT: XT2: Programmable Clock Read Strobe Reset Serial Serial Clock Serial Input Serial Output Strobe Timer Input Timer Output Power Supply Programming Power Supply Ground Wait Write Strobe Crystal (Main System Clock) Crystal (Subsystem Clock)
INTP0 INTP3: Interrupt from Peripherals
µPD78P018F(A)
PROM programming mode 64-pin Plastic Shrink (750 mil)
µPD78P018FCW(A)
Open Open RESET
Cautions (L): VSS: Open:
Independently connect pull-down resistor. Connect GND. Leave open.
RESET: level.
µPD78P018F(A)
64-pin Plastic
µPD78P018FGC(A)-AB8
Open Open RESET
Cautions (L): VSS: Open: A16: PGM:
Independently connect pull-down resistor. Connect GND. Leave open. RESET: VDD: VPP: Reset Power Supply Programming Power Supply Ground
RESET: level.
Address Chip Enable Data Output Enable Program
µPD78P018F(A)
BLOCK DIAGRAM
TO0/P30 TI0/INTP0/P00 TO1/P31 TI1/P33 TO2/P32 TI2/P34
16-bit TIMER/ EVENT COUNTER
PORT0
8-bit TIMER/ EVENT COUNTER
PORT1
8-bit TIMER/ EVENT COUNTER
PORT2
WATCHDOG TIMER
PORT3
WATCH TIMER 78K/0 CORE SERIAL INTERFACE PROM Kbytes)
PORT4
SI0/SB0/P25 SO0/SB1/P26 SCK0/P27 SI1/P20 SO1/P21 SCK1/P22 STB/P23 BUSY/P24 ANI0/P10 ANI7/P17 AVDD AVSS AVREF SERIAL INTERFACE
PORT5
PORT6
AD0/P40 AD7/P47 A8/P50 A15/P57
(2048 bytes)
EXTERNAL ACCESS
RD/P64 WR/P65 WAIT/P66 ASTB/P67 RESET
CONVERTER
INTP0/P00 INTP3/P03
INTERRUPT CONTROL
SYSTEM CONTROL XT1/P04
BUZ/P36
BUZZER OUTPUT
PCL/P35
CLOCK OUTPUT CONTROL
µPD78P018F(A)
CONTENTS DIFFERENCES BETWEEN µPD78P018F(A) MASK VERSIONS FUNCTIONS
Pins During Normal Operating Mode Pins During PROM Programming Mode Circuits Recommended Connection Unused Pins
INTERNAL MEMORY SIZE SWITCHING REGISTER (IMS) INTERNAL EXPANSION SIZE SWITCHING REGISTER (IXS) PROM PROGRAMMING
Operating Modes PROM Write Procedure PROM Read Procedure
ONE-TIME PROM VERSION SCREENING ELECTRICAL SPECIFICATIONS CHARACTERISTIC CURVE (REFERENCE VALUE) PACKAGE DRAWINGS
RECOMMENDED SOLDERING CONDITIONS APPENDIX DEVELOPMENT TOOLS APPENDIX RELATED DOCUMENTS
µPD78P018F(A)
DIFFERENCES BETWEEN µPD78P018F(A) MASK VERSIONS
µPD78P018F(A) single-chip microcontroller with on-chip one-time PROM which rewritten only once. possible make functions, except PROM specification mask option pins, same those mask versions (µPD78011F(A), 78012F(A), 78013F(A), 78014F(A), 78015F(A), 78016F(A), 78018F(A)) setting internal memory size switching register (IMS) internal expansion size switching register (IXS). Differences between µPD78P018F(A) mask versions shown Table 1-1. Table 1-1. Differences between µPD78P018F(A) Mask Version
Parameter Internal type Internal capacity
µPD78P018F(A)
One-time PROM Kbytes
Mask Versions Mask
µPD78011F(A): µPD78012F(A): µPD78013F(A): µPD78014F(A): µPD78015F(A): µPD78016F(A): µPD78018F(A): µPD78011F(A): µPD78012F(A): µPD78013F(A): µPD78014F(A): µPD78015F(A): µPD78016F(A): µPD78018F(A): µPD78011F(A): µPD78012F(A): µPD78013F(A): µPD78014F(A): µPD78015F(A): µPD78016F(A): µPD78018F(A):
Kbytes Kbytes Kbytes Kbytes Kbytes Kbytes Kbytes bytes bytes 1024 bytes 1024 bytes 1024 bytes 1024 bytes 1024 bytes bytes bytes 1024 bytes
Internal high-speed capacity
1024 bytes
Internal expansion capacity
1024 bytes
Internal ROM, internal high-speed capacity changeable with internal memory size switching register Internal expansion capacity changeable with internal expansion size switching register On-chip pull-up resistor mask option pins Electrical specifications, recommended soldering conditions
Note
Note
respective data sheet individual products.
Notes internal PROM capacity becomes Kbytes internal high-speed capacity becomes 1024 bytes RESET input. internal expansion capacity becomes 1024 bytes RESET input. Caution There differences noise immunity noise radiation between PROM mask versions. When pre-producing application with PROM version then mass-producing with mask version, sure conduct sufficient evaluations commercial samples (not engineering samples) mask version.
µPD78P018F(A)
FUNCTIONS
Pins During Normal Operating Mode Port pins (1/2)
Name Note Input Input/ output Input Input/ output Port 5-bit input/output port Input only Input/output specified 1-bit units. When used input port, on-chip pull-up resistor specified means software. Input only Port 8-bit input/output port Input/output specified 1-bit units. When used input port, on-chip pull-up resistor specified means software. Note Input/ output Port 8-bit input/output port Input/output specified 8-bit units. When used input port, on-chip pull-up resistor specified means software. Test input flag (KRIF) falling edge detection. Input Input/ output Port 8-bit input/output port Input/output specified 1-bit units. When used input port, on-chip pull-up resistor specified means software. Input Input/ output Port 8-bit input/output port Input/output specified 1-bit units. When used input port, on-chip pull-up resistor specified means software. Input SCK1 BUSY SI0/SB0 SO0/SB1 SCK0 Input Input Function After Reset Input Input Alternate Function INTP0/TI0 INTP1 INTP2 INTP3 ANI0 ANI7
Notes When using P04/XT1 input port, (FRC) processor clock control register (PCC) internal feedback resistor subsystem clock oscillator). When using P10/ANI0 P17/ANI7 pins converter analog input, internal pull-up resistor automatically disabled.
µPD78P018F(A)
Port pins (2/2)
Name Input/ output Function Port 8-bit input/output port LEDs driven directly. Input/output specified 1-bit units. When used input port, on-chip pull-up resistor specified means software. When used input port, on-chip pull-up resistor specified means software. WAIT ASTB Input/ output Port 8-bit input/output port Input/output specified 1-bit units. N-ch open-drain input/output port LEDs driven directly. Input After Reset Input Alternate Function
Non-port pins (1/2)
Name INTP0 INTP1 INTP2 INTP3 SCK0 SCK1 BUSY Input/ output Input/ output Output Input Serial interface serial data input/output Input Output Serial interface serial data output Input Input Falling edge detection external interrupt request input Serial interface serial data input Input Input Function External interrupt request input which effective edge (rising edge, falling edge, both rising edge falling edge) specified. After Reset Input Alternate Function P00/TI0 P25/SB0 P26/SB1 P25/SI0 P26/SO0 Serial interface serial clock input/output Input Serial interface automatic transmit/receive strobe output Serial interface automatic transmit/receive busy input Input Input
µPD78P018F(A)
Non-port pins (2/2)
Name WAIT ASTB Input Output Output Output Input/ output Output Output Output Input Function External count clock input 16-bit timer (TM0) External count clock input 8-bit timer (TM1) External count clock input 8-bit timer (TM2) 16-bit timer (TM0) output (shared 14-bit output) 8-bit timer (TM1) output 8-bit timer (TM2) output Clock output (for main system clock, subsystem clock trimming) Buzzer output Lower address/data expanding memory externally Higher address expanding memory externally Strobe signal output read from external memory Strobe signal output writing external memory Wait insertion external memory access Strobe output which latches address information output port port access external memory converter analog input converter reference voltage input converter analog power supply. Connect VDD. converter ground potential. Connect VSS. System reset input Connecting crystal resonator main system clock oscillation Input Input Input Connecting crystal resonator subsystem clock oscillation Input Positive power supply High voltage supply during program write/verify. normal operating mode, connect directly VSS. Ground potential Input Input Input Input Input Input After Reset Input Alternate Function P00/INTP0
ANI0 ANI7 Input RESET Input Input Input Input
µPD78P018F(A)
Pins During PROM Programming Mode
RESET Input Function Sets PROM programming mode. When +12.5 applied level applied RESET pin, microcontroller shifted PROM programming mode. High voltage supply during PROM programming mode setting program write/verify Address Data PROM enable input/program pulse input Read strobe input PROM Program/program inhibit input PROM programming mode Positive power supply Ground potential
Input Input Input/ output Input Input Input
µPD78P018F(A)
Circuits Recommended Connection Unused Pins input/output circuit type each recommended connection unused pins shown Table 2-1. input/output circuit configuration each type, Figure 2-1. Table 2-1. Types Circuits
Name P00/INTP0/TI0 P01/INTP1 P02/INTP2 P03/INTP3 P04/XT1 P10/ANI0 P17/ANI7 P20/SI1 P21/SO1 P22/SCK1 P23/STB P24/BUSY P25/SI0/SB0 P26/SO0/SB1 P27/SCK0 P30/TO0 P31/TO1 P32/TO2 P33/TI1 P34/TI2 P35/PCL P36/BUZ P40/AD0 P47/AD7 P50/A8 P57/A15 P64/RD P65/WR P66/WAIT P67/ASTB RESET AVREF AVDD AVSS Input Leave open. Connect VSS. Connect VDD. Connect VSS. Connect directly VSS. 13-D Independently connect resistor. Independently connect resistor. Independently connect resistor. Independently connect resistor. 10-A Input Input/output Connect VDD. Independently connect resistor. Input/output Circuit Type Input Input/output Recommended Connection when Used Connect VSS. Independently connect resistor.
µPD78P018F(A)
Figure 2-1. Input/Output Circuits
Type Type 10-A
pullup enable data P-ch
P-ch
IN/OUT Schmitt-triggered output with Hysteresis characteristics open drain output disable N-ch
Type
Type pullup enable
P-ch P-ch IN/OUT
pullup enable data P-ch
P-ch data
output disable IN/OUT Comparator
N-ch P-ch
output disable
N-ch
N-ch VREF (Threshold Voltage) input enable Type 13-D
input enable Type
pullup enable data P-ch
P-ch data output disable N-ch
IN/OUT
IN/OUT output disable N-ch P-ch
Middle-Voltage Input Buffer Type Type feedback cut-off P-ch data P-ch IN/OUT output disable N-ch
pullup enable
P-ch
µPD78P018F(A)
INTERNAL MEMORY SIZE SWITCHING REGISTER (IMS)
This register used disable part internal memory software. setting this register (IMS), possible same memory that mask versions with different internal memory (ROM, RAM). with 8-bit memory manipulation instruction. RESET input sets CFH. Figure 3-1. Internal Memory Size Switching Register Format
Symbol
Address FFF0H
After reset
RAM2 RAM1 RAM0
ROM3 ROM2 ROM1 ROM0
ROM3 ROM2 ROM1 ROM0
Selection Internal Capacity Kbytes Kbytes Kbytes Kbytes Kbytes Kbytes KbytesNote Kbytes Setting prohibited
Other than above
RAM2 RAM1 RAM0
Selection Internal High-Speed Capacity bytes 1024 bytes Setting prohibited
Other than above
Note When external device expansion function used, internal capacity should Kbytes less. Table shows setting values which make memory same that mask versions. Table 3-1. Internal Memory Size Switching Register Setting Values
Target Mask Versions Setting Value
µPD78011F(A) µPD78012F(A) µPD78013F(A) µPD78014F(A) µPD78015F(A) µPD78016F(A) µPD78018F(A)
µPD78P018F(A)
INTERNAL EXPANSION SIZE SWITCHING REGISTER (IXS)
This register used disable part internal expansion capacity software. setting this register (IXS), possible same memory that mask versions with different internal expansion RAM. with 8-bit memory manipulation instruction. RESET input sets 0AH. Figure 4-1. Internal Expansion Size Switching Register Format
Symbol Address FFF4H After reset
IXRAM3 IXRAM2 IXRAM1 IXRAM0
IXRAM3 IXRAM2 IXRAM1 IXRAM0
Selection Internal Expansion Capacity 1024 bytes (F400H F7FFH) bytes (F600H F7FFH) bytes Setting prohibited
Other than above
Table shows setting values which make memory same that mask versions. Table 4-1. Internal Expansion Size Switching Register Setting Values
Target Mask Versions Setting Value Note
µPD78011F(A) µPD78012F(A) µPD78013F(A) µPD78014F(A) µPD78015F(A) µPD78016F(A) µPD78018F(A)
Note Even program µPD78P018F(A) which "MOV IXS, #0CH" written executed µPD78011F(A), 78012F(A), 78013F(A), 78014F(A), operations affected.
µPD78P018F(A)
PROM PROGRAMMING
PD78P018F(A) internal 60-Kbyte PROM program memory. programming, PROM programming mode setting RESET pins. handling unused pins, refer "PIN CONFIGURATION (Top View) PROM programming mode." Caution When writing program, locations 0000H-EFFFH (Specify last address EFFFH). cannot write program using PROM programmer that cannot specify addresses write. Operating Modes When +12.5 applied low-level signal applied RESET pin, PROM programming mode set. This mode will become operating mode shown Table when pins shown. Further, when read mode set, possible read contents PROM. Table 5-1. Operating Modes PROM Programming
Operating Mode Page data latch Page write Byte write Program verify Program inhibit +12.5 +6.5 Read Output disable Standby Data output High-impedance High-impedance Data input High-impedance Data input Data output High-impedance
RESET
µPD78P018F(A)
Read mode Read mode set. Output disable mode Data output becomes high-impedance, output disable mode, set. Therefore, allows data read from device controlling pin, multiple µPD78P018F(A)s connected data bus. Standby mode Standby mode set. this mode, data outputs become high-impedance irrespective status. Page data latch mode Page data latch mode beginning page write mode. this mode, page 4-byte data latched internal address/data latch circuit. Page write mode After page bytes addresses data latched page data latch mode, page write executed applying 0.1-ms program pulse (active low) with Then, program verification performed, set. programming performed one-time program pulse, write verification operations should executed repeatedly. Byte write mode Byte write executed when 0.1-ms program pulse (active low) applied with Then, program verification performed set. programming performed one-time program pulse, write verification operations should executed repeatedly. Program verify mode Program verify mode set. this mode, check write operation performed correctly, after write. Program inhibit mode Program inhibit mode used when pin, pin, pins multiple µPD78P018F(A)s connected parallel write performed those devices. When write operation performed, page write mode byte write mode described above used. this time, write performed device which driven high.
µPD78P018F(A)
PROM Write Procedure Figure 5-1. Page Program Mode Flow Chart
Start Address 12.5
Latch Address Address Latch Address Address Latch Address Address Address Address Latch
X=X+1 0.1-ms program pulse
Verify bytes Pass Address Pass
Fail
Verify bytes Pass Write
Fail
Defective product
Start address Program last address
µPD78P018F(A)
Figure 5-2. Page Program Mode Timing
Page Data Latch
Page Program
Program Verify
Data Input Data Output
µPD78P018F(A)
Figure 5-3. Byte Program Mode Flow Chart
Start Address 12.5
X=X+1 0.1-ms program pulse Address Address Fail Verify Pass Address Pass Fail
Verify bytes Pass Write
Defective product
Start address Program last address
µPD78P018F(A)
Figure 5-4. Byte Program Mode Timing
Program
Program Verify
Data Input
Data Output
Cautions should applied before after VPP. must exceed +13.5 including overshoot. Removing reinserting while +12.5 applied adversely affect reliability.
µPD78P018F(A)
PROM Read Procedure contents PROM readable external data according read procedure shown below. RESET level, supply pin, handle other unused pins shown "PIN CONFIGURATION (Top View) PROM programming mode". Supply pins. Input address read data into pins. Read mode Output data pins. timings above steps shown Figure 5-5. Figure 5-5. PROM Read Timings
Address Input
(Input)
(Input)
Hi-Z
Data Output
Hi-Z
µPD78P018F(A)
ONE-TIME PROM VERSION SCREENING
one-time PROM versions (µPD78P018FCW(A), 78P018FGC(A)-AB8) cannot tested completely before shipped, because their structure. recommended perform screening verify PROM after writing necessary data performing high-temperature storage under conditions below.
Storage Temperature 125°C Storage Time hours
provides one-time PROM writing, marking, screening, verify service products designated "QTOP Microcontrollers." details, contact sales representative.
µPD78P018F(A)
ELECTRICAL SPECIFICATIONS
Absolute Maximum Ratings 25°C)
Parameter Supply voltage Symbol AVDD AVREF Input voltage P04, P17, P27, P37, P47, P57, P67, XT2, RESET Open-drain PROM programming mode Test Conditions Ratings -0.3 +7.0 -0.3 +13.5 -0.3 -0.3 -0.3 +0.3 -0.3 Unit
Output voltage Analog input voltage Output current, high
-0.3 -0.3 +13.5 -0.3
Analog input
AVSS AVREF
Total P17, P27, Total P03, P47, P57,
Output current,
IOLNote
Peak value value
Total P47, Total P03, P56, P57, Total P03, Total P17, P27, Operating ambient temperature Storage temperature Tstg
Peak value value Peak value value Peak value value Peak value value
+150
Note value should calculated follows: [rms value] [Peak value] Duty Caution Product quality suffer absolute maximum rating exceeded even momentarily parameter. That absolute maximum ratings rated values which product verge suffering physical damage, therefore product must used under conditions that ensure that absolute maximum ratings exceeded.
µPD78P018F(A)
Capacitance 25°C,
Parameter Input capacitance capacitance Symbol Test Conditions Unmeasured pins returned Unmeasured pins returned P03, P17, P27, P37, P47, P57, MIN. TYP. MAX. Unit
Remark Unless specified otherwise, characteristics alternate-function pins same those port pins. Main System Clock Oscillator Characteristics +85°C,
Resonator Ceramic resonator Recommended Circuit
Parameter Oscillation frequency Note
Test Conditions
MIN.
TYP.
MAX.
Unit
Oscillation stabilization After reaches osciltime Note lation voltage range MIN. Oscillation frequency Note
Crystal resonator
Oscillation stabilization time Note
External clock
input frequency Note input high-/low-level width (tXH
10.0
PD74HCU04
Notes Indicates only oscillator characteristics. Refer Characteristics instruction execution time. Time required stabilize oscillation after reset STOP mode release. Cautions When using main system clock oscillator, wire area enclosed broken line above figures follows avoid adverse effect from wiring capacitance. Keep wiring length short possible. cross wiring with other signal lines. route wiring near signal line through which high fluctuating current flows. Always keep ground point oscillator capacitor same potential VSS. ground capacitor ground pattern which high current flows. fetch signals from oscillator. When main system clock stopped system operated subsystem clock, subsystem clock should switched again main system clock after oscillation stabilization time secured program.
µPD78P018F(A)
Subsystem Clock Oscillator Characteristics +85°C,
Resonator Crystal resonator Recommended Circuit
Parameter Oscillation frequency (fXT Note
Test Conditions
MIN.
TYP. 32.768
MAX.
Unit
Oscillation stabilization time Note
External clock
input frequency (fXT Note input high-/low-level width (tXTH tXTL
PD74HCU04
Notes Indicates only oscillator characteristics. Refer Characteristics instruction execution time. Time required stabilize oscillation after reaches oscillator voltage MIN. Cautions When using subsystem clock oscillator, wire area enclosed broken line above figures follows avoid adverse effect from wiring capacitance. Keep wiring length short possible. cross wiring with other signal lines. route wiring near signal line through which high fluctuating current flows. Always keep ground point oscillator capacitor same potential VSS. ground capacitor ground pattern which high current flows. fetch signals from oscillator. subsystem clock oscillator low-amplitude circuit order achieve consumption current, more prone malfunction noise than main system clock oscillator. Particular care therefore required with wiring method when subsystem clock used.
µPD78P018F(A)
RECOMMENDED OSCILLATOR CONSTANTS Main system clock: Ceramic resonator +85°C)
Frequency CCR4.0MC3 FCR4.0MC5 CCR4.19MC3 FCR4.19MC5 CCR5.00MC3 FCR5.00MC5 CCR8.00MC FCR8.00MC5 CCR8.38MC FCR8.38MC5 CCR10.00MC FCR10.00MC5 Murata Mfg. Co., Ltd. CSA4.00MG CST4.00MGW CSA4.19MG CST4.19MGW CSA5.00MG CST5.00MGW CSA8.00MTZ CST8.00MTW CSA8.38MTZ CST8.38MTW CSA10.00MTZ CST10.00MTW 4.00 4.00 4.19 4.19 5.00 5.00 8.00 8.00 8.38 8.38 10.00 10.00 4.00 4.00 4.19 4.19 5.00 5.00 8.00 8.00 8.38 8.38 10.00 10.00 Recommended Oscillator Constants (pF) On-Chip On-Chip On-Chip On-Chip On-Chip On-Chip On-Chip On-Chip On-Chip On-Chip On-Chip On-Chip On-Chip On-Chip On-Chip On-Chip On-Chip On-Chip (pF) On-Chip On-Chip On-Chip On-Chip On-Chip On-Chip On-Chip On-Chip On-Chip On-Chip On-Chip On-Chip On-Chip On-Chip On-Chip On-Chip On-Chip On-Chip Oscillation Voltage Range MIN. MAX. On-chip capacitor, surface mounting type On-chip capacitor, insertion type On-chip capacitor, surface mounting type On-chip capacitor, insertion type On-chip capacitor, surface mounting type On-chip capacitor, insertion type On-chip capacitor, surface mounting type On-chip capacitor, insertion type On-chip capacitor, surface mounting type On-chip capacitor, insertion type On-chip capacitor, surface mounting type On-chip capacitor, insertion type Insertion type On-chip capacitor, insertion type Insertion type On-chip capacitor, insertion type Insertion type On-chip capacitor, insertion type Insertion type On-chip capacitor, insertion type Insertion type On-chip capacitor, insertion type Insertion type On-chip capacitor, insertion type
Manufacturer
Name
Remarks
Caution
oscillator constants oscillation voltage range indicate conditions stable oscillation, guarantee oscillation frequency accuracy. oscillation frequency accuracy required actual circuits, necessary adjust oscillation frequency oscillator actual circuit. Please contact directly manufacturer resonator used.
µPD78P018F(A)
Main system clock: Ceramic resonator +80°C)
Frequency Kyocera Corporation PBRC4.00A PBRC4.00B KBR-4.00MSA KBR-4.00MKS PBRC5.00A PBRC5.00B KBR-5.00MSA KBR-5.00MKS KBR-8M KBR-10M 4.00 4.00 4.00 4.00 5.00 5.00 5.00 5.00 8.00 10.00 Recommended Oscillator Constants (pF) On-Chip On-Chip On-Chip On-Chip (pF) On-Chip On-Chip On-Chip On-Chip Oscillation Voltage Range MIN. MAX. Surface mounting type On-chip capacitor, surface mounting type Insertion type On-chip capacitor, insertion type Surface mounting type On-chip capacitor, surface mounting type Insertion type On-chip capacitor, insertion type Insertion type Insertion type
Manufacturer
Name
Remarks
Caution
oscillator constants oscillation voltage range indicate conditions stable oscillation, guarantee oscillation frequency accuracy. oscillation frequency accuracy required actual circuits, necessary adjust oscillation frequency oscillator actual circuit. Please contact directly manufacturer resonator used.
µPD78P018F(A)
Characteristics
Parameter Input voltage, high Symbol VIH1 Test Conditions P17, P21, P23, P32, P37, P47, P57, P03, P20, P22, P27, P33, P34, RESET (N-ch open-drain) MIN. 0.7V 0.8V 0.8V 0.85VDD 0.7V 0.8V VIH5 XT1/P04, Note Input voltage, VIL1 P17, P21, P23, P32, P37, P47, P57, VIL2 P03, P20, P22, P27, P33, P34, RESET 0.8V 0.9V 0.9V VIL4 VIL5 XT1/P04, Note Output voltage, high Output voltage, VOH1 -100 P57, 0.2VDD TYP. MAX. 0.3VDD 0.2VDD 0.2VDD 0.15VDD 0.3VDD 0.2VDD 0.1VDD 0.2VDD 0.1VDD 0.1VDD Unit
VIH2
VIH3
VIH4
VIL3
VOL1
P03, P17, P27, P37, P47, VOL2 SB0, SB1, SCK0 open-drain pulled-up
VOL3
Note When using XT1/P04 P04, inverse phase should input using inverter. Remark Unless specified otherwise, characteristics alternate-function pins same those port pins.
µPD78P018F(A)
Characteristics +85°C,
Parameter Input leakage current, high Symbol ILIH1 Test Conditions P03, P27, P47, P67, P17, P37, P57, RESET MIN. TYP. MAX. Unit
ILIH2 ILIH3 Input leakage current, ILIL1
XT1/P04, P03, P27, P47, P67, P17, P37, P57, RESET
ILIL2 ILIL3 Output leakage current, high Output leakage current, Software pull-up resistor ILOH ILOL VOUT VOUT
XT1/P04,
Note
P03, P17, P27, P37, P47, P57,
Note P63, low-level input leak current -200 (MAX.) flows only during clocks (no-wait time) after instruction been executed read port (P6) port mode register (PM6). Outside period clocks following execution read-out instruction, current (MAX.). Remark Unless specified otherwise, characteristics alternate-function pins same those port pins.
µPD78P018F(A)
Characteristics
Parameter Supply current Note Symbol IDD1 Test Conditions 10.00-MHz crystal oscillation operation mode 10.00-MHz crystal oscillation HALT mode 32.768-kHz crystal oscillation operation mode Note Note Note Note MIN. TYP. 12.0 0.05 0.05 MAX. 24.0 Unit
IDD2
Note
IDD3
IDD4
32.768-kHz crystal oscillation HALT mode Note
IDD5
STOP mode when using feedback resistor STOP mode when using feedback resistor
IDD6
Notes Refers current flowing pin. current flowing on-chip pull-up resistors, ports, converter included. When operating high-speed mode (when processor clock control register (PCC) 00H) When operating low-speed mode (when 04H) When main system clock stopped.
µPD78P018F(A)
Characteristics Basic Operation +85°C,
Parameter Cycle time (Min. instruction execution time) Symbol Test Conditions Operating main system clock Operating subsystem clock input high-/low-level width TI1, input frequency TI1, input high-/low-level width Interrupt input high-/low-level width fTI1 tTIH0, tTIL0 MIN.
Note
TYP.
MAX.
Unit
Note 2/fsam 2/fsam
Note Note
tTIH1, tTIL1 tINTH, tINTL
INTP0
Note 2/fsam Note 2/fsam Note
INTP1 INTP3, RESET low-level width tRSL
Notes Value when external clock used. When crystal resonator used, (MIN.). combination with bits (SCS0) (SCS1) sampling clock select register (SCS), selection fsam possible between X/2N+1, fX/64, fX/128 (when main system clock operation)
60.0
10.0
Cycle Time
Operation Guaranteed Range
Supply Voltage
µPD78P018F(A)
Read/Write Operation +85°C,
Parameter ASTB high-level width Address setup time Address hold time Data input time from address Symbol tASTH tADS tADH tADD1 tADD2 Data input time from tRDD1 tRDD2 Read data hold time low-level width tRDH tRDL1 tRDL2 WAIT input time from tRDWT1 tRDWT2 WAIT input time from WAIT low-level width Write data setup time Write data hold time low-level width delay time from ASTB delay time from ASTB ASTB delay time from external fetch Address hold time from external fetch Write data output time from tWRWT tWTL tWDS tWDH tWRL tASTRD tASTWR tRDAST tRDADH tRDWD Load resistance (0.5 2n)tCY (2.5 2n)tCY 0.5t 1.5t 0.5t 0.5tCY Write data output time from tWRWD Address hold time from tWRADH delay time from WAIT delay time from WAIT tWTRD tWTWR 0.5tCY 0.5tCY 0.5t 0.5t 2.5t 2.5t (1.5+2n)tCY (2.5+2n)tCY 0.5tCY 1.5tCY 0.5tCY 2n)tCY Test Conditions MIN. 0.5tCY 0.5t (2.5 2n)tCY 2n)tCY 2n)tCY (2.5 2n)tCY MAX. Unit
Remarks TCY/4 indicates number waits.
µPD78P018F(A)
Serial Interface +85°C, Serial Interface Channel 3-wire serial mode (SCK0. Internal clock output)
Symbol tKCY1 Conditions MIN. 1600 3200 4800 SCK0 high-/low-level width setup time SCK0) tKH1, tKL1 tSIK1 tKCY1/2 tKCY1/2 hold time (from SCK0) output delay time from SCK0 tKSI1 tKSO1 Note TYP. MAX. Unit
Parameter SCK0 cycle time
Note load capacitance SCK0 output lines. (ii) 3-wire serial mode (SCK0. External clock input)
Parameter SCK0 cycle time Symbol tKCY2 Conditions MIN. 1600 3200 4800 SCK0 high-/low-level width tKH2, tKL2 1600 2400 setup time SCK0) hold time (from SCK0) output delay time from SCK0 SCK0 rise, fall time tSIK2 tKSI2 tKSO2 Note tR2, When external device expansion function used When external device expansion function used When 16-bit timer output function used When 16-bit timer output function used 1000 TYP. MAX. Unit
Note load capacitance output line.
µPD78P018F(A)
(iii) mode (SCK0. Internal clock output)
Parameter SCK0 cycle time Symbol tKCY3 Conditions MIN. 3200 4800 SCK0 high-/low-level width SB0, setup time SCK0) tKH3, tKL3 tSIK3 tKCY3/2 tKCY3/2 SB0, hold time (from SCK0) SB0, output delay time from SCK0 SB0, from SCK0 SCK0 from SB0, SB0, high-level width SB0, low-level width tKSO3 Note tKCY3 tKCY3 tKCY3 tKCY3 1000 tKSI3 tKCY3/2 TYP. MAX. Unit
tKSB tSBK tSBH tSBL
Note load resistance load capacitance SB0, SCK0 output lines. (iv) mode (SCK0. External clock input)
Parameter SCK0 cycle time Symbol tKCY4 Conditions MIN. 3200 4800 SCK0 high-/low-level width tKH4, tKL4 1600 2400 SB0, setup time SCK0) tSIK4 SB0, hold time (from SCK0) SB0, output delay time from SCK0 SB0, from SCK0 SCK0 from SB0, SB0, high-level width SB0, low-level width SCK0 rise, fall time tKSI4 tKSO4 Note tKCY4/2 tKCY4 tKCY4 tKCY4 tKCY4 When external device expansion function used When external device expansion function used When 16-bit timer output function used When 16-bit timer output function used 1000 1000 TYP. MAX. Unit
tKSB tSBK tSBH tSBL tR4,
Note load resistance load capacitance output lines.
µPD78P018F(A)
2-wire serial mode (SCK0. Internal clock output)
Parameter SCK0 cycle time Symbol tKCY5 Note Conditions MIN. 1600 3200 4800 SCK0 high-level width tKH5 tKCY5/2 tKCY5/2 SCK0 low-level width tKL5 tKCY5/2 tKCY5/2 SB0, setup time SCK0) tSIK5 SB0, hold time (from SCK0) SB0, output delay time from SCK0 tKSO5 tKSI5 TYP. MAX. Unit
Note load resistance load capacitance SCK0, SB0, output lines. (vi) 2-wire serial mode (SCK0. External clock input)
Parameter SCK0 cycle time Symbol tKCY6 Conditions MIN. 1600 3200 4800 SCK0 high-level width tKH6 1300 2100 SCK0 low-level width tKL6 1600 2400 SB0, setup time SCK0) SB0, hold time (from SCK0) SB0, output delay time from SCK0 tSIK6 tKSI6 tKSO6
Note
TYP.
MAX.
Unit
tKCY6/2 1000
SCK0 rise, fall time
tR6,
When external device expansion function used When external device expansion function used When 16-bit timer output function used When 16-bit timer output function used
Note load resistance load capacitance output lines.
µPD78P018F(A)
Serial Interface Channel 3-wire serial mode (SCK1. Internal clock output)
Symbol tKCY7 Conditions MIN. 1600 3200 4800 SCK1 high-/low-level width setup time SCK1) tKH7, tKL7 tSIK7 tKCY7/2 tKCY7/2 hold time (from SCK1) output delay time from SCK1 tKSI7 tKSO7 Note TYP. MAX. Unit
Parameter SCK1 cycle time
Note load capacitance SCK1 output lines. (ii) 3-wire serial mode (SCK1. External clock input)
Parameter SCK1 cycle time Symbol tKCY8 Conditions MIN. 1600 3200 4800 SCK1 high-/low-level width tKH8, tKL8 1600 2400 setup time SCK1) tSIK8 hold time (from SCK1) output delay time from SCK1 SCK1 rise, fall time tKSI8 tKSO8 Note tR8, When external device expansion function used When external device expansion function used When 16-bit timer output function used When 16-bit timer output function used 1000 TYP. MAX. Unit
Note load capacitance output line.
µPD78P018F(A)
(iii) 3-wire serial mode with automatic transmit/receive function (SCK1. Internal clock output)
Parameter SCK1 cycle time Symbol tKCY9 Conditions MIN. 1600 3200 4800 SCK1 high-/low-level width setup time SCK1) tKH9, tKL9 tSIK9 tKCY9/2 tKCY9/2 hold time (from SCK1) output delay time from SCK1 from SCK1 Strobe signal high-level width tSBD tSBW tKCY9/2 tKCY9 tKCY9 tKCY9 Busy signal setup time busy signal detection timing) Busy signal hold time (from busy signal detection timing) tBYS tKCY9/2 tKCY9 tKCY9 tKCY9 tKSI9 tKSO9 Note TYP. MAX. Unit
tBYH
2tKCY9
SCK1 from busy inactive
tSPS
Note load capacitance SCK1 output lines.
µPD78P018F(A)
(iv) 3-wire serial mode with automatic transmit/receive function (SCK1. External clock input)
Parameter SCK1 cycle time Symbol tKCY10 Conditions MIN. 1600 3200 4800 SCK1 high-/low-level width tKH10, tKL10 1600 2400 setup time SCK1) tSIK10 hold time (from SCK1) output delay time from SCK1 SCK1 rise, fall time tKSI10 tKSO10 Note tR10, tF10 When external device expansion function used When external device expansion function used 1000 TYP. MAX. Unit
Note load capacitance output line.
µPD78P018F(A)
Timing Test Point (Excluding Input)
0.8VDD 0.2VDD
Test Points
0.8VDD 0.2VDD
Clock Timing
1/fX
Input
VIH4 (MIN.) VIL4 (MAX.)
1/fXT tXTL tXTH
Input
VIH5 (MIN.) VIL5 (MAX.)
Timing
tTIL0
tTIH0
1/fTI1 tTIL1 tTIH1
TI1,TI2
µPD78P018F(A)
Read/Write Operation External fetch wait):
Higher 8-Bit Address tADD1 Hi-Z
tADS tASTH ASTB
Lower 8-Bit Address
Operation Code tRDD1 tRDADH tRDAST
tADH
tASTRD tRDL1 tRDH
External fetch (Wait insertion):
Higher 8-Bit Address tADD1
tADS tASTH ASTB
Lower 8-Bit Address
Hi-Z tRDD1
Operation Code tRDADH tRDAST
tADH
tASTRD WAIT tRDWT1 tWTL tWTRD tRDL1 tRDH
µPD78P018F(A)
External data access wait):
tADD2 tADS tASTH ASTB
Lower 8-Bit Address
Higher 8-Bit Address
Hi-Z tRDD2
Read Data
Hi-Z
Write Data
Hi-Z
tADH
tRDH
tASTRD tASTWR tWRL tRDL2 tRDWD tWRWD tWDS tWDH tWRADH
External data access (Wait insertion):
tADD2 tADS tADH tASTH ASTB tASTRD tRDL2 tASTWR WAIT tRDWT2 tWTL tRDD2
Lower 8-Bit Address
Higher 8-Bit Address Hi-Z Hi-Z Hi-Z
Read Data
Write Data
tRDH
tRDWD
tWDS tWRWD tWRL
tWDH
tWRADH
tWTRD tWRWT
tWTL
tWTWR
µPD78P018F(A)
Serial Transfer Timing 3-wire serial mode:
tKCYm tKLm tKHm
SCK0,SCK1
tSIKm
tKSIm
SI0,SI1
Input Data
tKSOm
SO0,SO1
Output Data
mode (Bus release signal transfer):
tKCY3, tKL3, SCK0 tKSB tSBL tSBH tSBK tSIK3, tKSI3, tKH3,
SB0, tKSO3,
Mode (command signal transfer):
tKCY3, tKL3, SCK0 tSIK3, tKH3,
tKSB
tSBK
tKSI3,
SB0, tKSO3,
µPD78P018F(A)
2-wire serial mode:
tKCY5,6 tKL5,6 SCK0 tKSO5,6 SB0, tSIK5,6 tKSI5,6 tKH5,6
3-wire serial mode with automatic transmit/receive function:
tSIK9,10 tKSO9,10
tKSI9,10 tKH9,10 tF10
SCK1 tKL9,10 tKCY9,10 tR10 tSBD tSBW
3-wire serial mode with automatic transmit/receive function (busy processing):
SCK1
Note
tBYS
Note
tBYH
Note
tSPS
BUSY (Active High)
Note signal actually driven here; shown such indicate timing.
µPD78P018F(A)
Converter Characteristics +85°C, AVDD AVSS
Parameter Resolution Overall error
Note
Symbol
Test Conditions AVREF AVDD AVREF AVREF AVDD AVREF
MIN.
TYP.
MAX.
Unit
Conversion time
tCONV
19.1 38.2 24/fX AVSS
Sampling time Analog input voltage Reference voltage resistance
tSAMP VIAN RAIREF
AVREF AVDD
Note Overall error excluding quantization error (±1/2 LSB). indicated ratio full-scale value. Data Memory STOP Mode Supply Voltage Data Retention Characteristics +85°C)
Parameter Data retention supply voltage Data retention supply current Release signal time Oscillation stabilization wait time Symbol VDDDR IDDDR VDDDR Subsystem clock stops feed-back resistor disconnected Release RESET Release interrupt 218/f Note Test Conditions MIN. TYP. MAX. Unit
tSREL tWAIT
Note combination with (OSTS0 OSTS2) oscillation stabilization time select register (OSTS), selection 215/fX 218/fX possible. Data Retention Timing (STOP Mode Release RESET)
Internal Reset Operation HALT Mode STOP Mode Data Retention Mode Operating Mode
STOP Instruction Execution
VDDDR
tSREL
RESET tWAIT
µPD78P018F(A)
Data Retention Timing (Standby Release Signal: STOP Mode Release Interrupt Signal)
HALT Mode STOP Mode Data Retention Mode Operating Mode
VDDDR STOP Instruction Execution
tSREL
Standby Release Signal (Interrupt Request) tWAIT
Interrupt Input Timing
tINTL INTP0 INTP2
tINTH
tINTL
INTP3
RESET Input Timing
tRSL
RESET
µPD78P018F(A)
PROM PROGRAMMING CHARACTERISTICS
Characteristics PROM Write Mode ±5°C, ±0.25 12.5 ±0.3
Parameter Input voltage, high Input voltage, Output voltage, high Output voltage, Input leakage current supply voltage supply voltage supply current supply current Symbol SymbolNote 12.2 6.25 12.5 Test Conditions MIN. 0.7V 12.8 6.75 TYP. MAX. 0.3V Unit
Note Corresponding µPD27C1001A symbol PROM Read Mode ±5°C, ±0.5 ±0.6
Parameter Input voltage, high Input voltage, Output voltage, high Symbol SymbolNote VOH1 VOH2 Output voltage, Input leakage current Output leakage current supply voltage supply voltage supply current supply current VOH1 VOH2 ICCA1 VIL, -100 VDD, Test Conditions MIN. 0.7VDD TYP. MAX. 0.3VDD Unit
Note Corresponding µPD27C1001A symbol
µPD78P018F(A)
Characteristics PROM Write Mode Page program mode ±5°C, ±0.25 12.5 ±0.3
Parameter Address setup time setup time setup time Input data setup time Address hold time (from Symbol SymbolNote tOES tCES tAHL tAHV Input data hold time (from Data output float delay time from setup time setup time Program pulse width Valid data delay time from pulse width during data latching setup time hold time hold time tVPS tVDS tPGMS tCEH tOEH tOES tCES tAHL tAHV tVPS tVCS tPGMS tCEH tOEH Test Conditions MIN. 0.095 0.105 TYP. MAX. Unit
Note Corresponding µPD27C1001A symbol Byte program mode ±5°C, ±0.25 12.5 ±0.3
Parameter Address setup time PGM) setup time setup time PGM) Input data setup time PGM) Address hold time (from Input data hold time (from PGM) Data output float delay time from setup time PGM) setup time PGM) Program pulse width Valid data delay time from hold time Symbol SymbolNote tOES tCES tVPS tVDS tOEH tOES tCES tVPS tVCS Test Conditions MIN. 0.095 0.105 TYP. MAX. Unit
Note Corresponding µPD27C1001A symbol
µPD78P018F(A)
PROM Read Mode ±0.5 ±0.6
Parameter Data output time from address Data output delay time from Data output delay time from Data output float delay time from Data hold time from address Symbol SymbolNote tACC tACC Test Conditions MIN. TYP. MAX. Unit
Note Corresponding µPD27C1001A symbol PROM Programming Mode Setting 25°C,
Parameter PROM programming mode setup time Symbol tSMA Test Conditions MIN. TYP. MAX. Unit
PROM Write Mode Timing (Page program mode)
Page Data Latch
Page Program
Program Verify
Hi-Z Hi-Z tPGMS tVPS tVDS tCES tOES tCEH tOEH Data Input Data Output Hi-Z tAHL tAHV
µPD78P018F(A)
PROM Write Mode Timing (Byte program mode)
Program Program Verify
Hi-Z Data Input Hi-Z Data Output Hi-Z
Cautions must applied before after VPP. must exceed +13.5 including overshoot. Removing reinserting while +12.5 applied adversely affect reliability. PROM Read Mode Timing
Effective Address
Note1 Note1
Data Output
Note2
Hi-Z
Hi-Z
Notes When reading within tACC range, input delay time from fall time must maximum tACC tOE. time from point which either (whichever first) reaches VIH.
µPD78P018F(A)
PROM Programming Mode Setting Timing
RESET
Effective Address
µPD78P018F(A)
CHARACTERISTIC CURVE (REFERENCE VALUE)
(Main System Clock: 10.0 MHz)
10.0
HALT Oscillation, Halt)
Supply Current [mA]
0.05
HALT Halt, Oscillation)
0.01
0.005 10.0 32.768
0.001 Supply Voltage
µPD78P018F(A)
PACKAGE DRAWINGS
PLASTIC SHRINK (750 mil)
NOTE Each lead centerline located within 0.17 (0.007 inch) true position (T.P.) maximum material condition. Item center leads when formed parallel.
ITEM
MILLIMETERS 58.68 MAX. 1.78 MAX. 1.778 (T.P.) 0.50±0.10 MIN. 3.2±0.3 0.51 MIN. 4.31 MAX. 5.08 MAX. 19.05 (T.P.) 17.0 0.25+0.10 -0.05 0.17 0~15°
INCHES 2.311 MAX. 0.070 MAX. 0.070 (T.P.) 0.020+0.004 -0.005 0.035 MIN. 0.126±0.012 0.020 MIN. 0.170 MAX. 0.200 MAX. 0.750 (T.P.) 0.669 0.010+0.004 -0.003 0.007 0~15° P64C-70-750A,C-1
Remark dimensions materials versions same those mass-produced versions.
µPD78P018F(A)
PLASTIC
detail lead
NOTE Controlling dimension
ITEM MILLIMETERS 17.6±0.4 14.0±0.2 14.0±0.2 17.6±0.4 0.37 +0.08 -0.07 0.15 (T.P.) 1.8±0.2 0.8±0.2 0.17 +0.08 -0.07 0.10 2.55±0.1 0.1±0.1 5°±5° 2.85 MAX. INCHES 0.693±0.016 0.551 +0.009 -0.008 0.551 +0.009 -0.008 0.693±0.016 0.039 0.039 0.015 +0.003 -0.004 0.006 0.031 (T.P.) 0.071±0.008 0.031 +0.009 -0.008 0.007 +0.003 -0.004 0.004 0.100±0.004 0.004±0.004 5°±5° 0.113 MAX. P64GC-80-AB8-4
millimeter.
Each lead centerline located within 0.15 (0.006 inch) true position (T.P.) maximum material condition.
Remark
dimensions materials versions same those mass-produced versions.
µPD78P018F(A)
RECOMMENDED SOLDERING CONDITIONS
µPD78P018F(A) should soldered mounted under following recommended conditions. recommended soldering conditions, refer document Semiconductor Device Mounting Technology Manual (C10535E). soldering methods conditions other than those recommended below, contact your sales representative. Table 10-1. Surface Mounting Type Soldering Conditions
µPD78P018FGC(A)-AB8: 64-pin Plastic
Soldering Method Infrared rays reflow Wave soldering Partial heating Soldering Conditions Package peak temperature: 235°C, Time: sec. Max. 210°C higher), Count: Three times less Package peak temperature: 215°C, Time: sec. Max. 200°C higher), Count: Three times less Solder bath temperature: 260°C, Time: sec. Max., Count: Once, Preheating temperature: 120°C Max. (package surface temperature) temperature: 300°C below, Time: sec. Max. (per row) Recommended Condition Symbol IR35-00-3 VP15-00-3 WS60-00-1
Caution
different soldering methods together (except partial heating). Table 10-2. Insertion Type Soldering Conditions
µPD78P018FCW(A): 64-pin Plastic Shrink (750 mil)
Soldering Method Wave soldering (pin only) Partial heating temperature: 300°C below, Time: sec. Max. (per pin) Soldering Conditions Solder bath temperature: 260°C below, Time: sec. Max.
Caution
Apply wave soldering only pins careful bring solder into direct contact with package.
µPD78P018F(A)
APPENDIX DEVELOPMENT TOOLS
following development tools available system development using µPD78P018F(A). Also refer Cautions using development tools. Language Processing Software
RA78K/0 CC78K/0 DF78014 CC78K/0-L 78K/0 Series common assembler package 78K/0 Series common compiler package Device file common µPD78018F Subseries 78K/0 Series common compiler library source file
PROM Writing Tools
PG-1500 PA-78P018CW PA-78P018GC PG-1500 controller PG-1500 control program PROM programmer Programmer adapter connected PG-1500
Debugging Tool When using in-circuit emulator IE-78K0-NS
IE-78K0-NS IE-70000-MC-PS-B IE-70000-98-IF-C IE-70000-CD-IF-A IE-70000-PC-IF-C IE-70000-PCI-IF IE-78018-NS-EM1 NP-64CW NP-64GC EV-9200GC-64 ID78K0-NS SM78K0 DF78014 In-circuit emulator common 78K/0 Series Power supply unit IE-78K0-NS Interface adapter when using PC-9800 series host machine (excluding notebook PCs, supported card interface cable when using notebook PC-9800 series host machine (PCMCIA socket supported) Interface adapter when using PC/ATcompatible host machine (ISA supported) Adapter when using that incorporates host machine Emulation board common µPD78018F Subseries Emulation probe 64-pin plastic shrink type) Emulation probe 64-pin plastic (GC-AB8 type) Socket mounted target system board manufactured 64-pin plastic (GC-AB8 type) Integrated debugger IE-78K0-NS System simulator common 78K/0 Series Device file common µPD78018F Subseries
µPD78P018F(A)
When using in-circuit emulator IE-78001-R-A
IE-78001-R-A IE-70000-98-IF-C IE-70000-PC-IF-C IE-78000-R-SV3 IE-70000-PCI-IF IE-78018-NS-EM1 IE-78K0-R-EX1 EP-78240CW-R EP-78240GC-R EV-9200GC-64 ID78K0 SM78K0 DF78014 In-circuit emulator common 78K/0 Series Interface adapter when using PC-9800 series host machine (excluding notebook PCs, supported) Interface adapter when using PC/AT compatible host machine (ISA supported) Interface adapter cable when using host machine Adapter when using that incorporates host machine Emulation board common µPD78018F Subseries Emulation probe conversion board IE-78018-NS-EM1 IE-78001-R-A Emulation probe 64-pin plastic shrink type) Emulation probe 64-pin plastic (GC-AB8 type) Socket mounted target system board manufactured 64-pin plastic (GC-AB8 type) Integrated debugger IE-78001-R-A System simulator common 78K/0 Series Device file common µPD78018F Subseries
Real-time
RX78K/0 MX78K0 Real-time 78K/0 Series 78K/0 Series
µPD78P018F(A)
Cautions using development tools ID-78K0-NS, ID78K0, SM78K0 used combination with DF78014. CC78K/0 RX78K/0 used combination with RA78K/0 DF78014. NP-64CW NP64GC products made Naitou Densei Machidaseisakusho (TEL: +81-44-8223813). Contact distributor regarding purchase these products. third party development tools, 78K/0 Series Selection Guide (U11126E). host machines supporting each software follows.
Host Machine [OS] Software RA78K/0 CC78K/0 PG-1500 controller ID78K0-NS ID78K0 SM78K0 RX78K/0 MX78K0
PC-9800 series [WindowsTM] PC/AT compatible [Japanese/English Windows] Note Note Note Note Note
HP9000 series 700[HP-UXTM] SPARCstation[SunOSTM, SolarisTM] NEWS(RISC) [NEWS-OSTM]
Note DOS-based software
µPD78P018F(A)
Conversion Socket Drawing (EV-9200GC-64) Recommended Footprint Figure A-1. Drawing EV-9200GC-64 (for reference only)
EV-9200GC-64
No.1 index
EV-9200GC-64-G0E ITEM MILLIMETERS 18.8 14.1 14.1 18.8 15.8 18.5 15.8 18.5 1.35 0.35
INCHES 0.74 0.555 0.555 0.74 0.118 0.031 0.236 0.622 0.728 0.236 0.622 0.728 0.315 0.307 0.098 0.079 0.053 0.014+0.004 -0.005
0.091 0.059
µPD78P018F(A)
Figure A-2. Recommended Footprint EV-9200GC-64 (for reference only)
EV-9200GC-64-P1E ITEM Caution MILLIMETERS 19.5 14.8 0.8±0.02 15=12.0±0.05 INCHES 0.768 0.583 0.031+0.002 -0.001 0.591=0.472 +0.003 -0.002
0.8±0.02 15=12.0±0.05 0.031+0.002 0.591=0.472 +0.003 -0.001 -0.002 14.8 19.5 6.00 0.08 6.00 0.08 0.02 0.583 0.768 0.236 +0.004 -0.003 0.236 +0.004 -0.003 0.197 +0.001 -0.002
2.36 0.03 1.57 0.03
0.093 +0.001 -0.002 0.087 +0.004 -0.005 0.062 +0.001 -0.002
Dimensions mount EV-9200 that target device (QFP) different some parts. recommended mount dimensions QFP, refer "SEMICONDUCTOR DEVICE MOUNTING TECHNOLOGY MANUAL" (C10535E).
µPD78P018F(A)
APPENDIX RELATED DOCUMENTS
Device Related Documents
Document Name Document English Japanese U11921J U12132J U10659J U12326J U10903J U10904J IEM-5594 U12704J U13482J
µPD78011F(A), 78012F(A), 78013F(A), 78014F(A), 78015F(A), 78016F(A), 78018F(A) Data Sheet µPD78P018F(A) Data Sheet µPD78018F, 78018FY Subseries User's Manual
78K/0 Series User's Manual Instructions 78K/0 Series Instruction List 78K/0 Series Instruction
U11921E This document U10659E U12326E U12704E IEA-1289
µPD78018F Subseries Special Function Register Table
78K/0 Series Application Note Basics Floating-Point Arithmetic Programs
Development Tool Documents (User's Manual)
Document Name RA78K0 Assembler Package Operation Assembly Language Structured Assembly Language RA78K Series Structured Assembler Preprocessor CC78K0 Compiler Operation Language CC78K/0 Compiler Application Note PG-1500 PROM Programmer PG-1500 Controller PC-9800 Series (MS-DOSTM) Based PG-1500 Controller Series DOSTM) Based IE-78K0-NS IE-78001-R-A IE-78K0-R-EX1 IE-78018-NS-EM1 EP-78240 SM78K0 System Simulator Windows Based SM78K Series System Simulator ID78K0-NS Integrated Debugger Windows Based ID78K0 Integrated Debugger Based ID78K0 Integrated Debugger Based ID78K0 Integrated Debugger Windows Based Reference External Part User Open Interface Specification Reference Reference Reference Guide Programming Know-How U11802E U11801E U11789E EEU-1402 U11517E U11518E U13034E U11940E EEU-1291 U10540E prepared prepared prepared prepared U10332E U10181E U10092E U12900E U11539E U11649E Document English Japanese U11802J U11801J U11789J U12323J U11517J U11518J U13034J U11940J EEU-704 EEU-5008 prepared prepared prepared U13289J EEU-986 U10181J U10092J U12900J U11151J U11539J U11649J
Caution
contents above related documents subject change without notice. latest documents should used design.
µPD78P018F(A)
Embedded Software Documents (User's Manual)
Document Name 78K/0 Series Real-Time Basics Installation 78K/0 Series MX78K0 Basics U11537E U11536E U12257E Document English Japanese U11537J U11536J U12257J
Other Documents
Document Name Package Manual (CD-ROM) Semiconductor Device Mounting Technology Manual Quality Grades Semiconductor Devices Semiconductor Device Reliability/Quality Control System C13388E C10535E C11531E C10983E Document English Japanese C10535J C11531J C10983J C11892J U11416J
Guide Prevent Damage Semiconductor Devices Electrostatic Discharge (ESD) C11892E Guide Quality Assurance Semiconductor Devices Microcomputer Product Series Guide MEI-1202
Caution
related documents listed above subject change without notice. sure latest version each document designing.
µPD78P018F(A)
[MEMO]
µPD78P018F(A)
NOTES CMOS DEVICES
PRECAUTION AGAINST SEMICONDUCTORS
Note: Strong electric field, when exposed device, cause destruction gate oxide ultimately degrade device operation. Steps must taken stop generation static electricity much possible, quickly dissipate once, when occurred. Environmental control must adequate. When dry, humidifier should used. recommended avoid using insulators that easily build static electricity. Semiconductor devices must stored transported anti-static container, static shielding conductive material. test measurement tools including work bench floor should grounded. operator should grounded using wrist strap. Semiconductor devices must touched with bare hands. Similar precautions need taken boards with semiconductor devices
HANDLING UNUSED INPUT PINS CMOS
Note: connection CMOS device inputs cause malfunction. connection provided input pins, possible that internal input level generated noise, etc., hence causing malfunction. CMOS device behave differently than Bipolar NMOS devices. Input levels CMOS devices must fixed high using pull-up pull-down circuitry. Each unused should connected with resistor, considered have possibility being output pin. handling related unused pins must judged device device related specifications governing devices.
STATUS BEFORE INITIALIZATION DEVICES
Note: Power-on does necessarily define initial status device. Production process does define initial operation status device. Immediately after power source turned devices with reset function have been initialized. Hence, power-on does guarantee out-pin levels, settings contents registers. Device initialized until reset signal received. Reset operation must executed immediately after power-on devices having reset function.
µPD78P018F(A)
Regional Information
Some information contained this document vary from country country. Before using product your application, please contact office your country obtain list authorized representatives distributors. They will verify: Device availability Ordering information Product release schedule Availability related technical literature Development environment specifications (for example, specifications third-party tools components, host computers, power plugs, supply voltages, forth) Network requirements addition, trademarks, registered trademarks, export restrictions, other legal issues also vary from country country.
Electronics Inc. (U.S.)
Santa Clara, California Tel: 408-588-6000 800-366-9782 Fax: 408-588-6130 800-729-9288
Electronics (Germany) GmbH
Benelux Office Eindhoven, Netherlands Tel: 040-2445845 Fax: 040-2444580
Electronics Hong Kong Ltd.
Hong Kong Tel: 2886-9318 Fax: 2886-9022/9044
Electronics Hong Kong Ltd. Electronics (France) S.A.
Velizy-Villacoublay, France Tel: 01-30-67 Fax: 01-30-67 Seoul Branch Seoul, Korea Tel: 02-528-0303 Fax: 02-528-4411
Electronics (Germany) GmbH
Duesseldorf, Germany Tel: 0211-65 Fax: 0211-65
Electronics (France) S.A. Electronics (UK) Ltd.
Milton Keynes, Tel: 01908-691-133 Fax: 01908-670-290 Spain Office Madrid, Spain Tel: 01-504-2787 Fax: 01-504-2860
Electronics Singapore Pte. Ltd.
United Square, Singapore 1130 Tel: 65-253-8311 Fax: 65-250-3583
Electronics Taiwan Ltd. Electronics Italiana s.r.l.
Milano, Italy Tel: 02-66 Fax: 02-66
Electronics (Germany) GmbH
Scandinavia Office Taeby, Sweden Tel: 08-63 Fax: 08-63
Taipei, Taiwan Tel: 02-2719-2377 Fax: 02-2719-5951
Brasil S.A.
Electron Devices Division Rodovia Presidente Dutra, 07210-902-Guarulhos-SP Brasil Tel: 55-11-6465-6810 Fax: 55-11-6465-6829
J98.
µPD78P018F(A)
FIP, IEBus, QTOP trademarks Corporation. MS-DOS Windows trademarks Microsoft Corporation. PC/AT trademarks International Business Machines Corporation. HP9000 series HP-UX trademarks Hewlett-Packard Company. SPARCstation trademark SPARC International, Inc. Solaris SunOS trademarks Microsystems, Inc. NEWS NEWS-OS trademarks Sony Corporation. related documents indicated this publication include preliminary versions. However, preliminary versions marked such.
export this product from Japan regulated Japanese government. export this product prohibited without governmental license, need which must judged customer. export re-export this product from country other than Japan also prohibited without license from that country. Please call sales representative.
part this document copied reproduced form means without prior written consent Corporation. Corporation assumes responsibility errors which appear this document. Corporation does assume liability infringement patents, copyrights other intellectual property rights third parties arising from device described herein other liability arising from such device. license, either express, implied otherwise, granted under patents, copyrights other intellectual property rights Corporation others. While Corporation been making continuous effort enhance reliability semiconductor devices, possibility defects cannot eliminated entirely. minimize risks damage injury persons property arising from defect semiconductor device, customers must incorporate sufficient safety measures design, such redundancy, fire-containment, anti-failure features. devices classified into following three quality grades: "Standard", "Special", "Specific". Specific quality grade applies only devices developed based customer designated "quality assurance program" specific application. recommended applications device depend quality grade, indicated below. Customers must check quality grade each device before using particular application. Standard: Computers, office equipment, communications equipment, test measurement equipment, audio visual equipment, home electronic appliances, machine tools, personal electronic equipment industrial robots Special: Transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster systems, anti-crime systems, safety equipment medical equipment (not specifically designed life support) Specific: Aircrafts, aerospace equipment, submersible repeaters, nuclear reactor control systems, life support systems medical equipment life support, etc. quality grade devices "Standard" unless otherwise specified NEC's Data Sheets Data Books. customers intend devices applications other than those specified Standard quality grade, they should contact sales representative advance. Anti-radioactive design implemented this product.
96.5

µPD78P018F(A) 8-BIT SINGLE-CHIP MICROCONTROLLER DESCRIPTION

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