Lattice Semiconductor Corporation ispLSI 6000 Family combines high-den

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Lattice Semiconductor Corporation ispLSI 6000 Family combines high-den

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Introduction ispLSI 6000 Family
Lattice Semiconductor Corporation ispLSI 6000 Family combines high-density, general-purpose programmable logic with dedicated memory register/counter modules. result family devices that support system-level integration memory logic functions with enhanced performance. ispLSI 6000 Family ideal high-density designs, where integration complete logic subsystems into single device necessary. System applications include intelligent controllers, serial controllers/LAN controllers/UARTS, multimedia video/audio processors, video controllers, master interfaces data acquisition controllers. ispLSI 6000 Family incorporates Lattice Semiconductor's innovative in-system programmable (ISPTM) technology. technology allows real-time programming, less expensive manufacturing enduser feature reconfiguration. Lattice Semiconductor's E2CMOS® technology features reprogrammability, ability program device again again, easily incorporate design modifications. This capability allows full parametric testability during manufacturing, guaranteeing percent programming functional yield. necessary development tools available from Lattice third-party vendors. ispEXPERTCompiler interfaces with major third-party development tools, ispEXPERT System with Synplicity ispEXPERT Compiler with Viewlogic® packages provide full design verification. Designs completed hours opposed days weeks.
ispLSI 6000 Family
System Performance Pin-to-Pin Delay Memory Access Time High Density General Purpose Programmable Logic Module (8,000 Gates) 4K-Bit Memory FIFO/Dual-Port/Single-Port Memory Module 16-Bit Register/Counter Module 208-Pin Package with User I/Os In-System Programmable Boundary Scan Test (IEEE 1149.1 Standard)
ispLSI Technology
UltraMOS E2CMOS Technology Choice Electrically Erasable/Programmable/ Reprogrammable 100% Tested During Manufacture 100% Programming Yield Fast Programming
ispLSI Development Tools
ispDesignEXPERTSystems Lattice UNIX-Based Design Tools Tightly Integrated with Leading Vendors' Tools Productivity Enhancing ispANALYZER(Hardware Debug Software), Static Timing Analyzer, Physical Viewer Explore Tools VHDL, Verilog-HDL, ABEL, State Machine Schematic Entry Timing Functional Simulators Comprehensive Programming Tools Windows® Windows Windows NT®, Solaris Hewlett-Packard UNIX Platforms
intro6k_07
January 2000
Introduction ispLSI 6000 Family
6000 Family Overview
ispLSI 6000 Family high-density devices address high-performance system integration needs, including registers, counters, multiplexers, complex state machines memory single device. first series devices ispLSI 6000 Family consists ispLSI 6192FF, 6192DM 6192SM. These devices vary only dedicated memory configuration: 6192FF programmable 4K-Bit FIFO, 6192DM dual-port memory, 6192SM single-port memory. Each device includes 16-Bit programmable register/counter module Table ispLSI 6000 Family Attributes
Family Member 6192FF FIFO Memory Module 6192SM Single-Port SRAM 6192DM Dual-Port SRAM
Twin GLB/192 macrocell programmable logic module based ispLSI 3000 Family architecture. Each device contains multiple Generic Logic Blocks (GLBs) programmable logic module, which designed maximize system flexibility performance. balanced ratio registers cells provides optimum combination internal logic external connections. global interconnect scheme ties logic memory together. abundance general-purpose dedicated module pins gives easy access resources externally. Table describes family attributes.
Organization: (FF, DM); Only) Speed: Access Time Organization: 16-Bit Register/Counter/Timer/Shift Register Speed: Counter Frequency Organization: Macrocell/24 Twin Speed: Tpd/77 Fmax
Attributes
Register/Counter Module Programmable Logic Module
Figure ispLSI 6000 Family Package
ispLSI 6192
208-Pin MQFP
0288-160C/6K

Lattice Semiconductor Corporation ispLSI 6000 Family combines high-den

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