Crossbar switches widely used today variety applications including net
|
|
|
Top Searches for this datasheet
Crossbar Switch Implementation Using Lattice ispLSI 5384V Device
Crossbar switches widely used today variety applications including network switching, parallel computing various telecommunications applications. There off-the-shelf devices available today that implement standard crossbar configurations. using CPLDs implement crossbar switches, design engineers have flexibility customize switch suit their specific design goals, well obtain switch configurations available with off-the-shelf parts. Additionally, in-system programmable devices allows switch re-configured design modifications become necessary. This document addresses implementation Non-Blocking Crossbar switch Lattice ispLSI 5384V Complex Programmable Logic Device (CPLD) architecture. design modifications implementing crossbar switch also given.
Figure 8-Port Unidirectional Switch
Connection
Inputs
Crossbar Switches
crossbar switch, also known crosspoint switch, defined switch with input lines output lines port switch). switch intersections, called crosspoints, where input line output line electrically connected (see Figure seen from Figure number crosspoints grows square number lines into switch. assume that switch port does connect itself, number crosspoints needed given n(n-1)/2. n=32, there crosspoint connections. Figure Space Division Switch
Crossbars
Outputs
Splitting crossbar switch into several smaller switches interconnecting them dramatically reduce number crosspoints. This technique called space division switching. There penalty inherent this technique known blocking. Blocking occur when switch inputs attempt access same intermediate switch channel. Figure illustrates space division switching.
Crossbars
Crossbars (N/n)
(N/n)
Inputs
Outputs
an8035_02
November 1998
Crossbar Switch Implementation Using Lattice ispLSI 5384V Device
seen from Figure only half number switch inputs transmit given time. total number crosspoints needed switch Figure calculated. first stage, there crossbars with crosspoints total second stage there crossbars with (N/n)2 crosspoints. third stage same number crosspoints first. Adding three stages gives: Number crosspoints k(N/n)2 inputs, N=32, k=4, n=8. This gives crosspoints, which percent reduction number crosspoints needed non-partitioned crossbar switch. percent reduction number crosspoints proportional ASONET. block diagram switch shown Figure switch inputs that connect outputs switch matrix. switch matrix constructed with 32-input multiplexers. Each output supports individual tri-state control. select lines (switch interconnects) tri-state control configured using double buffered configuration registers. LOAD Registers loaded each port individually asserting LOAD signals. Output Address lines decoded select port's LOAD register, input address lines latched along with signal. latched input address lines drive port's select lines, drives port's tri-state control. After LOAD registers have been configured, CNFG signals asserted, simultaneously configuring ports. This double buffering scheme prevents data from being lost while switch interconnects updated. reset modes supported. Broadcast reset results switch outputs being select port Broadcast initiated asserting simultaneously. Tri-state reset
Crossbar Switch Architecture
This ispLSI 5384V port) crossbar switch design based National Semiconductor CLC018 Digital Crosspoint Switch, which used serial digital video routing, telecom/datacom switching,
Figure Crossbar Switch Block Diagram
Inputs
Switch Matrix
Outputs
CNFG Configuration Registers
LOAD
Load Registers
Decoder
Output Address
Input Address
Crossbar Switch Implementation Using Lattice ispLSI 5384V Device
Figure Crossbar Switch Implementation
Switch Inputs DI0-DI31
Lattice ispLSI 5384V
Switch Outputs DO0-DO15
Lattice ispLSI 5384V
DO16-DO31
Switch Control Lines
results outputs being disabled. Tri-state reset initiated when asserted along with
Implementation
flexibility ispLSI 5384V does limit maximum number ports Crossbar Switch implemented using four ispLSI 5384V devices, single level logic. This accomplished following manner. Although there inputs into each GLB, maximum number product terms allowed output would take levels directly implement MUX. However, because ispLSI 5384V supports tri-state control I/Os, constructed single level. This accomplished externally tying outputs MUXes together using tri-state control I/Os select lines (Figure inverting tri-state control between outputs, only drive output given time, thus avoiding possibility contention.
Implementation
This design ideally suited Lattice ispLSI 5384V device large number inputs required each MUX. switch, 32-input MUXes required. Lattice ispLSI 5384V inputs into each Generic Logic Block (GLB), which allows MUXes implemented single level logic. Because this design uses double buffered switch configuration scheme, significant amount device resources must devoted switch control. Each port requires configuration registers. ports, this totals macrocells, including required decoding logic. Because this, ispLSI 5384V CPLDs required implement crossbar switch (Figure However, entire implementation still takes only level logic. This implementation requires macrocells device, utilization, leaving room additional logic. switch design coded VHDL allowing number ports control logic reconfigured simply making modifications VHDL source code.
Conclusion
Clearly, Lattice ispLSI 5384V superior choice implementing crossbar switches Fast Wide (BFW) structure. other CPLD boast
Crossbar Switch Implementation Using Lattice ispLSI 5384V Device
Figure 64-Input
Input
Input Input
Output
Input
Select Select
one-level crossbar switch implementation with inputs outputs. This achieved ispLSI 5384V large number inputs (68/GLB) product terms (160/GLB). using ispLSI 5384V coding design VHDL, system designer limited standard feature available with off-theshelf solutions. Because this implementation requires only device utilization, there sufficient resources left available implement other types standard logic control functions.
Other recent searches
SP14Q001 - SP14Q001 SP14Q001 Datasheet
RN4605 - RN4605 RN4605 Datasheet
IRM-2638 - IRM-2638 IRM-2638 Datasheet
HFD3023-002 - HFD3023-002 HFD3023-002 Datasheet
Privacy Policy | Disclaimer
© 2012 Datasheet Archive
