Personal Computer Memory Card International Association (PCMCIA) devel

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Personal Computer Memory Card International Association (PCMCIA) devel

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PCMCIA Interface ispLSI 2064 TQFP
Personal Computer Memory Card International Association (PCMCIA) developed standards personal computer cards cards) which often referred PCMCIA cards. cards represent technology adding memory, storage capabilities portable systems. This application note provides overview card interface describes in-system programmable (ISPTM) Lattice ispLSI 2064 implementation single, space-saving TQFP (thin quad flat pack) package.
Card Standard
PCMCIA Electrical Specification describes connector pinout, interface protocol, signaling environment, interface timing, programming model specifics card insertion, removal, power configuration. specifies both 16-bit card 32-bit CardBus interfaces. PCMCIA specification defines three card sizes. three types same 68-pin edge connector attachment computer, differ only thickness. details PCMCIA standards, access Association's world-wide site http://www.pccard.com.
Market Applications
PCMCIA standard bringing benefits cards variety industries vertical applications, including smart cards, set-top boxes, automobiles others. card technology's compact size durability make ideal technology wide variety applications, including growing hand-held storage market. Government data encryption systems driving adoption cards interface variety government commercial uses.
Device Selection
typical short design cycles such Card, usually can't wait ASIC design. small form factor cards, entire interface should implemented single device. Using space-saving TQFP packages becomes practical with Lattice highdensity PLDs. Conventional programmer sockets damage fragile leads TQFP packages. Only Lattice offers proven combination logic devices TQFP. Lattice In-System Programmability will reduce your prototype time eliminate stand-alone programming during design phase your system.
Figure 100-Pin TQFP Package with Dimensions Millimeters, MIN/MAX.
Detail 0.45 View 0.17 0.27 0.75 0.05 0.15
0.50
1.35 14.00 16.00
Coplanarity exceed 0.102
1.45 Detail
an8005_01
July 1997
PCMCIA Interface ispLSI 2064 TQFP
This application requires both high-density logic high device count, offered Lattice ispLSI 2000 family devices. Combining features Lattice in-system programmability with small size TQFP make ispLSI 2064-80LT device excellent choice PCMCIA applications. Figure 100-pin TQFP dimensions. Figure PCMCIA Interface Logic Block
ispLSI 2064-80LT100
INPUTS OUTPUTS
IOWR IORD
Input/ Output Handler
INPACK IOCSE IOIS16
Interface Functions
Figure shows block diagram PCMCIA Interface Logic. This main PCMCIA Interface card. This logic integrates functions described below. logic designed generic tailored many applications.
WE/PGM
Common Memory Handler
CMCSE CMCSO CMOE CMWE
Input/Output Handler Function
This function generates control signals 16-bit I/O. INPACK asserted when address valid selected reading. IOIS16 signal asserted when transfer attempted. bus-controller handles even bytes individually byte access 16bit controller. IOCSE selects even addresses IOCSO used select addresses.
CE[1:0]
Attribute Memory Handler
AMCS AMOE AMWE
(expandable address bus)
Card Configuration Registers
BI-DIR LINES
(expandable data bus)
Common Memory Handler Function
This function decodes address generates control signals Common Memory. Common Memory bits wide. High Byte Byte Common Memory accessed individually. CMCSE selects even addresses CMCSO selects addresses.
Summary
Lattice In-System Programmability reduces prototype time eliminates stand-alone programming during design phase card. Combining these features with small size TQFP package makes Lattice ispLSI 2064-80LT device excellent choice PCMCIA applications. plan expand your design with wider address data bus, ispLSI 2096-80LT device with registers inputs pins space-saving 128-pin TQFP.
Attribute Memory Handler Function
This function decodes Card enable signals generates control signals attribute memory. Locations 0100H, 0102H, 0104H 0106H reserved Card Configuration registers.
Card Configuration Registers Function
This function assumes four card configuration registers located 10H, 12H, 16H. card design, these registers would contain card configurable attributes including address space, power requirements, interrupt request. addresses decoded assuming 256-bit ROM. However, this expandable modifying register bank width.
Source File
source file this design available text format (file name: an8005.txt) Lattice Semiconductor CDROM site (www.latticesemi.com). Please note that copy download this file another directory, this link will work.

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