IRMCF371 Sensorless Motor Control Appliances MCE(Motion Cont

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IRMCF371 Sensorless Motor Control Appliances MCE(Motion Cont

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Data Sheet PD60314
IRMCF371
Sensorless Motor Control Appliances
MCE(Motion Control Engine) Hardware based computation engine high efficiency sinusoidal sensorless control permanent magnet motor Supports both interior surface permanent magnet motors Built-in hardware peripheral single shunt current feedback reconstruction external current voltage sensing operational amplifier required Three/two-phase Space Vector Analog output (PWM) Embedded 8-bit high speed microcontroller (8051) flexible man-machine control JTAG programming port emulation/debugger Serial communication interface (UART) I2C/SPI serial interface Watchdog timer with independent analog clock Three general purpose timers/counters special timers: periodic timer, capture timer External EEPROM internal facilitate debugging code development compatible with IRMCK371, OTP-ROM version 1.8V/3.3V CMOS
Product Summary
Maximum crystal frequency Maximum internal clock (SYSCLK) frequency Sensorless control computation time
signed bytes bits/ SYSCLK bits SYSCLK bits 57.6K QFP48
computation data range
Program loaded from external EEPROM bytes Data GateKill latency (digital filtered) carrier frequency counter input channels converter resolution converter conversion speed 8051 instruction execution speed Analog output (PWM) resolution UART baud rate (typ) Number (max) Package (lead-free)
Description
IRMCF371 high performance based motion control designed primarily appliance applications. IRMCF371 designed achieve cost high performance control solutions advanced inverterized appliance motor control. IRMCF371 contains computation engines. Motion Control Engine (MCETM) sensorless control permanent magnet motors; other 8-bit high-speed microcontroller (8051). Both computation engines integrated into monolithic chip. MCEcontains collection control elements such Proportional plus Integral, Vector rotator, Angle estimator, Multiply/Divide, loss SVPWM, Single Shunt IFB. user program motion control algorithm connecting these control elements using graphic compiler. components sensorless control algorithms, such Angle Estimator, provided complete pre-defined control blocks implemented hardware. unique analog/digital circuit algorithm fully support single shunt current reconstruction also provided. 8051 microcontroller performs 2-cycle instruction execution (60MIPS 120MHz). 8051 microcontroller connected dual port process signal monitoring command input. advanced graphic compiler MCEis seamlessly integrated into MATLAB/Simulink environment, while third party JTAG based emulator tools supported 8051 developments. IRMCF371 comes with small QFP48 lead-free package.
IRMCF371 TABLE CONTENTS
Overview IRMCF371 Block Diagram Main Functions.5 Pinout.7 Input/Output IRMCF371.8 8051 Peripheral Interface Group Motion Peripheral Interface Group Analog Interface Group Power Interface Group Test Interface Group Application Connections Characteristics Absolute Maximum Ratings.12 System Clock Frequency Power Consumption Digital Characteristics.13 Oscillator characteristics.14 Analog Characteristics Under Voltage Lockout characteristics.15 CMEXT AREF Characteristics Characteristics Characteristics Analog Digital Converter Characteristics.17 Characteristics SYNC SVPWM Conversion Timing GATEKILL SVPWM Timing Interrupt Timing Timing.21 Timing.22 7.8.1 Write timing 7.8.2 Read Timing.23 UART Timing.24 7.10 CAPTURE Input Timing 7.11 JTAG Timing List Package Dimensions Part Marking Information
IRMCF371
TABLE FIGURES
Figure Figure Figure Figure Figure Figure Typical Application Block Diagram Using IRMCF371.4 IRMCF371 Internal Block Diagram IRMCF371 Configuration.7 Input/Output IRMCF371.8 Application Connection IRMCF371 Clock Frequency Power Consumption.12
TABLE TABLES
Table Table Table Table Table Table Table Table Table Table Table Table Table Table Table Table Table Table Table Table Absolute Maximum Ratings System Clock Frequency Digital Characteristics Characteristics Analog Characteristics UVcc Characteristics CMEXT AREF Characteristics.15 Characteristics.16 Converter Characteristics Current Sensing Characteristics.17 SYNC Characteristics GATEKILL SVPWM Timing Interrupt Timing.20 Timing Write Timing Read Timing.23 UART Timing CAPTURE Timing JTAG Timing List
IRMCF371 Overview
IRMCF371 International Rectifier integrated circuit device primarily designed onechip solution complete inverter controlled appliance motor control applications. Unlike traditional microcontroller DSP, IRMCF371 provides built-in closed loop sensorless control algorithm using unique Motion Control Engine (MCETM) permanent magnet motors. MCEconsists collection control elements, motion peripherals, dedicated motion control sequencer dual port internal signal nodes. IRMCF371 also employs unique single shunt current reconstruction circuit eliminate additional analog/digital circuitry enables direct shunt resistor interface Motion control programming achieved using dedicated graphical compiler integrated into MATLAB/Simulinkdevelopment environment. Sequencing, user interface, host communication, upper layer control tasks implemented 8051 high-speed 8-bit microcontroller. 8051 microcontroller equipped with JTAG port facilitate emulation debugging tools. Figure shows typical application schematic using IRMCF371. IRMCF371 intended development purpose contains bytes RAM, which loaded from external EEPROM 8051 program execution. high volume production, IRMCK371 contains place program reduce cost. Both IRMCF371 IRMCK371 come same 48-pin package with identical configuration facilitate board layout transition mass production
Figure
Typical Application Block Diagram Using IRMCF371
IRMCF371 IRMCF371 Block Diagram Main Functions
IRMCF371 block diagram shown Figure
8bit Address/Data
Figure
IRMCF371 Internal Block Diagram
IRMCF371 contains following functions sensorless motor control applications: Motion Control Engine (MCETM) Proportional plus Integral block pass filter Differentiator (high pass filter) Ramp Limit Angle estimate (sensorless control) Inverse Clark transformation Vector rotator latch Peak detect
Motion Control
IRMCF371
Transition Multiply-divide (signed unsigned) Divide (signed unsigned) Adder Subtractor Comparator Counter Accumulator Switch Shift ATAN (arc tangent) Function block (any curve fitting, nonlinear function) 16-bit wide Logic operations (AND, XOR, NOT, NEGATE) MCEprogram data memory byte). Note MCEcontrol sequencer
8051 microcontroller Three 16-bit timer/counters 16-bit periodic timer 16-bit analog watchdog timer 16-bit capture timer discrete I/Os Four-channel 12-bit buffered channel current sensing 1.2V input) Three unbuffered channels 1.2V input) JTAG port pins) channel analog output (8-bit PWM) UART I2C/SPI port byte program loaded from external EEPROM byte data RAM. Note Note Total size byte including program, data, 8051 data. Different sizes allocated depending applications.
IRMCF371 Pinout
SCL/SO-SI P3.2/INT0 P5.1/TMS P5.2/TDO SDA/CS0 TSTMOD P5.3/TDI PLLVDD PLLVSS RESET
XTAL0 XTAL1 P1.0/T2 P1.1/RXD P1.2/TXD P1.3/SYNC/SCK P1.4/CAP VDD2 VDD1 P2.0/NMI P2.1 P3.0/INT2/CS1 PWMUH PWMUL PWMVH PWMVL PWMWH PWMWL GATEKILL VDD1 VDD2 AIN2
(Top View)
IFB-
AVDD
AVSS
CMEXT
AREF
IFB+
P2.6/AOPWM
VDD2
Figure
IRMCF371 Configuration
IFBO
AIN0
AIN1
IRMCF371 Input/Output IRMCF371
signals IRMCF371 shown Figure pins 3.3V logic interface except interface pins.
Crystal
XTAL0 XTAL1
PWMUH PWMUL PWMVH PWMVL PWMWH PWMWL GATEKILL
UART Interface Interface
P1.2/TXD P1.1/RXD
gate signal Interface
SDA/CS0 SCL/SO-SI AVDD(1.8V) AVSS
P1.0/T2 P1.3/SYNC/SCK
Analog power/ ground
Discrete
P1.4/CAP P2.0/NMI P2.1 P3.0/INT2/CS1 P3.2/INT0
AREF CMEXT
System Reset
RESET
JTAG port Interface (PWM output)
P5.3/TDI P5.1/TMS P5.2/TDO
IFB+ IFBIFBO AIN0 AIN1 AIN2
Interface
P2.6/AOPWM
VDD1(3.3V) VDD2(1.8V) PLLVDD(1.8V) PLLVSS
Digital power/ ground power/ ground
Test Mode (must tied VSS)
TSTMOD
Figure
Input/Output IRMCF371
8051 Peripheral Interface Group
Output, Transmit data from IRMCF371, configured P1.2 Input, Receive data IRMCF371, configured P1.1
UART Interface P1.2/TXD P1.1/RXD
Discrete Interface P1.0/T2 Input/output port 1.0, configured Timer input P1.1/RXD Input/output port 1.1, configured input P1.2/TXD Input/output port 1.2, configured output P1.3/SYNC/SCK Input/output port 1.3, configured SYNC output clock, needs pulled VDD1 order boot from EEPROM P1.4/CAP Input/output port 1.4, configured Capture Timer input P2.0/NMI Input/output port 2.0, configured non-maskable interrupt input P2.1 Input/output port
IRMCF371
P3.0/INT2/CS1 P3.2/INT0 Input/output port 3.0, configured INT2 input chip select Input/output port 3.2, configured INT0 input
Analog Output Interface AOPWM Output, output 8-bit resolution, configurable carrier frequency Crystal Interface XTAL0 XTAL1 Reset Interface RESET I2C/SPI Interface SCL/SO-SI SDA/CS0 P3.0/INT2/CS1 P1.3/SYNC/SCK Input, connected crystal Output, connected crystal Inout, system reset, needs pulled VDD1 doesn't require external time constant Input/output, clock output data Input/output, Data line chip select Input/output, INT2 chip select Input/output, SYNC output clock, needs pulled VDD1 order boot from EEPROM
Motion Peripheral Interface Group
Output, phase high side gate signal Output, phase side gate signal Output, phase high side gate signal Output, phase side gate signal Output, phase high side gate signal Output, phase side gate signal Input, upon assertion, this negates signals, programmable logic sense
PWMUH PWMUL PWMVH PWMVL PWMWH PWMWL Fault GATEKILL
Analog Interface Group
Analog power (1.8V) Analog power return 0.6V buffered output Unbuffered 0.6V, input AREF buffer, capacitor needs connected. Input, Operational amplifier positive input shunt resistor current sensing Input, Operational amplifier negative input shunt resistor current sensing Output, Operational amplifier output shunt resistor current sensing
AVDD AVSS AREF CMEXT IFB+ IFBIFBO
IRMCF371
AIN0 AIN1 AIN2 Input, Analog input channel 1.2V), typically configured voltage input Input, Analog input channel 1.2V), needs pulled down AVSS unused Input, Analog input channel 1.2V), needs pulled down AVSS unused
Power Interface Group
Digital power (3.3V) Digital power core logic (1.8V) Digital common power (1.8V) ground return
VDD1 VDD2 PLLVDD PLLVSS
Test Interface Group
Must tied VSS, used only factory testing. Input/output port 5.1, configured JTAG port default Input/output port 5.2, configured JTAG port default Input/output port 5.3, configured JTAG port default Input, JTAG test clock
TSTMOD P5.1/TSM P5.2/TDO P5.3/TDI
IRMCF371 Application Connections
Typical application connection shown Figure components necessary implement complete sensorless drive control algorithm shown connected IRMCF371.
Figure
Application Connection IRMCF371
IRMCF371 Characteristics
Absolute Maximum Ratings
Parameter Supply Voltage Supply Voltage Analog Input Voltage Digital Input Voltage Ambient Temperature Storage Temperature Table -0.3 -0.3 1.98 -0.3 1.98 -0.3 3.65 Absolute Maximum Ratings Condition Respect Respect Respect AVSS Respect
Symbol VDD1 VDD2
Caution: Stresses beyond those listed "Absolute Maximum Ratings" cause permanent damage device. These stress ratings only function device these other conditions beyond those indicated operational sections specifications implied.
System Clock Frequency Power Consumption
Parameter System Clock Table System Clock Frequency Unit
Symbol SYSCLK
Power (mW) VDD2 (1.8V) VDD1 (3.3V) Total
Figure
Clock Frequency (MHz) Clock Frequency Power Consumption
IRMCF371
VDD1 VDD2 IOL1(2) IOH1(2) IOL2(3) IOH2(3)
Digital Characteristics
Parameter Supply Voltage Supply Voltage Input Voltage Input High Voltage Input capacitance Input leakage current level output current High level output current level output current High level output current Table 1.62 -0.3 12.4 17.9 24.6 13.2 24.8 26.3 49.5 1.98 15.2 33.4 Condition Recommended Recommended Recommended Recommended
Symbol
Digital Characteristics
Note: Data guaranteed design. Applied SCL/SO-SI, SDA/CS0 pins. Applied P1.0/T2, P1.1/RXD, P1.2/TXD, P1.3/SYNC/SCK, P1.4/CAP, P2.0/NMI, P2.1, P2.6/AOPWM0, P3.0/INT2/CS1, P3.2/INT0, P5.1/TMS, P5.2/TDO, P5.3/TDI, GATEKILL, PWMUL, PWMUH, PWMVL, PWMVH, PWMWL, PWMWH pins.
IRMCF371
VPLLVDD
Oscillator characteristics
Parameter Supply Voltage 1.62 1.92 Oscillator Input VPLLVSS 0.2* Voltage VPLLVDD Oscillator Input High 0.8* VPLLVDD Voltage VPLLVDD Table Characteristics Condition Recommended VPLLVDD
Symbol
VPLLVDD
Note: Data guaranteed design.
Analog Characteristics
current sensing (IFB+, IFB-, IFBO) CAREF 1nF, CMEXT= 100nF. Unless specified, 25°C. Symbol Parameter VAVDD Supply Voltage 1.71 VOFFSET Input Offset Voltage Input Voltage Range VOUTSW output operating range Input capacitance RFDBK feedback resistor GAINCL CMRR ISRC ISNK Operating Close loop Gain Common Mode Rejection Ratio output source current output sink current Table Condition Recommended VAVDD Recommended VAVDD
1.89
Requested between IFBO IFB(1)
VOUT VOUT
Analog Characteristics
Note: Data guaranteed design.
IRMCF371
Under Voltage Lockout characteristics
Based AVDD (1.8V) Unless specified, 25°C. Symbol Parameter UVCC+ UVcc positive going 1.53 1.66 1.71 Threshold UVCCUVcc negative going 1.52 1.62 1.71 Threshold UVCCH UVcc Hysteresys Table UVcc Characteristics Condition VDD1 VDD1
CMEXT AREF Characteristics
Condition VAVDD VAVDD
CAREF 1nF, CMEXT= 100nF. Unless specified, 25°C. Symbol Parameter CMEXT voltage VAREF Buffer Output Voltage Load regulation (VDC-0.6) PSRR Power Supply Rejection Ratio Table CMEXT AREF Characteristics Note: Data guaranteed design.
IRMCF371 Characteristics
Characteristics
Parameter Crystal input frequency Internal clock frequency Sleep mode output FCLKIN frequency Short time jitter psec Duty cycle lock time Table Characteristics Condition
Symbol FCLKIN FPLL FLWPW TLOCK
(see figure below)
Note: Data guaranteed design.
R1=1M
R2=10
Xtal
C1=30PF C2=30PF
IRMCF371
Analog Digital Converter Characteristics
2.05 Condition
Unless specified, 25°C. Symbol Parameter TCONV Conversion time THOLD Sample/Hold maximum hold time Table Note: Data guaranteed design.
Voltage droop (see figure below)
Converter Characteristics
Input Voltage Voltage droop Voltage
tSAMPLE THOLD
Characteristics
amps current sensing (IFB+, IFB-, IFBO) Unless specified, 25°C. Symbol Parameter OPSR slew rate OPIMP TSET input impedance Settling time Table
V/sec
Condition VAVDD
VAVDD Current Sensing Characteristics
Note: Data guaranteed design.
IRMCF371
SYNC SVPWM Conversion Timing
twSYNC
SYNC
tdSYNC1
IU,IV,IW
tdSYNC2
AINx
tdSYNC3
PWMUx,PWMVx,PWMWx
Unless specified, 25°C. Symbol Parameter twSYNC SYNC pulse width tdSYNC1 SYNC current feedback conversion time tdSYNC2 SYNC AIN0-6 analog input conversion time tdSYNC3 SYNC output delay time Table
Unit SYSCLK SYSCLK SYSCLK
SYSCLK
SYNC Characteristics
Note: AIN1 through AIN6 channels converted once every SYNC events
IRMCF371
GATEKILL SVPWM Timing
Unless specified, 25°C. Symbol Parameter twGK GATEKILL pulse width tdGK GATEKILL output delay Table GATEKILL SVPWM Timing
Unit SYSCLK SYSCLK
IRMCF371
Interrupt Timing
Unless specified, 25°C. Symbol Parameter twINT INT0, INT1 Interrupt Assertion Time tdINT INT0, INT1 latency Table Interrupt Timing
Unit SYSCLK SYSCLK
IRMCF371
Timing
TI2CLK TI2CLK
tI2WSETUP tI2WHOLD tI2RSETUP tI2RHOLD tI2EN2
tI2ST1 tI2ST2
tI2EN1
Unless specified, 25°C. Symbol Parameter TI2CLK clock period tI2ST1 start time tI2ST2 start time tI2WSETUP write setup time tI2WHOLD write hold time tI2RSETUP read setup time tI2RHOLD read hold time
0.25 0.25 0.25 0.25 filter time(1) Table Timing
8192
Unit SYSCLK TI2CLK TI2CLK TI2CLK TI2CLK SYSCLK SYSCLK
Note: read setup time determined programmable filter time applied communication.
IRMCF371
Timing
7.8.1 Write timing
Unless specified, 25°C. Symbol Parameter TSPICLK clock period tSPICLKHT clock high time tSPICLKLT clock time tCSDELAY data delay time tWRDELAY falling edge data delay time tCSHIGH high time between consecutive byte transfer tCSHOLD hold time Table
Unit SYSCLK TSPICLK TSPICLK nsec nsec TSPICLK TSPICLK
Write Timing
IRMCF371
7.8.2 Read Timing
Unless specified, 25°C. Symbol Parameter TSPICLK clock period tSPICLKHT clock high time tSPICLKLT clock time tCSRD data delay time tRDSU read data setup time tRDHOLD read data hold time tCSHIGH high time between consecutive byte transfer tCSHOLD hold time Table
Unit SYSCLK TSPICLK TSPICLK nsec nsec nsec TSPICLK TSPICLK
Read Timing
IRMCF371
UART Timing
TBAUD
Start
Data Parity
Stop
TUARTFIL
Unless specified, 25°C. Symbol Parameter TBAUD Baud Rate Period 57600 TUARTFIL UART sampling filter 1/16 period Table UART Timing
Unit bit/sec TBAUD
Note: Each including start stop sampled three times center interval 1/16 TBAUD. three sampled values agree, then UART noise error generated.
IRMCF371
7.10 CAPTURE Input Timing
Unless specified, 25°C. Symbol Parameter TCAPCLK CAPTURE input period tCAPHIGH CAPTURE input high time tCAPLOW CAPTURE input time tCRDELAY CAPTURE falling edge capture register latch time tCLDELAY CAPTURE rising edge capture register latch time tINTDELAY CAPTURE input interrupt latency time Table CAPTURE Timing
Unit SYSCLK SYSCLK SYSCLK SYSCLK SYSCLK SYSCLK
IRMCF371
7.11 JTAG Timing
TJCLK
tJHIGH
tJLOW
tJSETUP tJHOLD
TDI/TMS
Unless specified, 25°C. Symbol Parameter TJCLK Period tJHIGH High Period tJLOW Period propagation delay time tJSETUP TDI/TMS setup time tJHOLD TDI/TMS hold time Table
Unit nsec nsec nsec nsec nsec
JTAG Timing
IRMCF371 List
Number Name XTAL0 XTAL1 P1.0/T2 P1.1/RXD P1.2/TXD P1.3/SYNC/ P1.4/CAP VDD2 VDD1 P2.0/NMI P2.1 P2.6/AOPWM VDD2 AIN0 AVDD AVSS AIN1 CMEXT AREF IFBIFB+ IFBO AIN2 VDD2 VDD1 GATEKILL PWMWL PWMWH PWMVL Pull Pull Pull Internal Pull-up /Pull-down Type Description Crystal input Crystal output Discrete programmable Timer/Counter input Discrete programmable UART receive input Discrete programmable UART transmit output Discrete programmable SYNC output clock output, needs pulled VDD1 order boot from EEPROM Discrete programmable Capture Timer input 1.8V digital power Digital common 3.3V digital power Discrete Maskable Interrupt Discrete Discrete digital output 1.8V digital power Digital common Analog input channel 0-1.2V range, needs pulled down AVSS unused 1.8V analog power Analog common Analog input channel 0-1.2V range, needs pulled down AVSS unused Unbuffered 0.6V output. Capacitor needs connected. Analog reference voltage output (0.6V) Single shunt current sensing input Single shunt current sensing input Single shunt current sensing output Analog input channel 0-1.2V range, needs pulled down AVSS unused 1.8V digital power Digital common 3.3V digital power shutdown input, 2-sec digital filter, configurable either high true. gate drive phase side, configurable either high true gate drive phase high side, configurable either high true gate drive phase side, configurable either high true
IRMCF371
Number Name PWMVH PWMUL PWMUH P3.0/INT2/CS1 P3.2/NINT0 SCL/SO-SI SDA/CS0 P5.1/TMS P5.2/TDO P5.3/TDI TSTMOD RESET PLLVDD PLLVSS Internal Pull-up /Pull-down Pull Pull Pull Type Table Description gate drive phase high side, configurable either high true gate drive phase side, configurable either high true gate drive phase high side, configurable either high true Discrete programmable external interrupt input chip select Discrete programmable external interrupt input Digital common clock data data chip select Discrete JTAG test mode select Discrete JTAG test data output Discrete JTAG test data input JTAG test clock input Test mode input, must tied Reset, true, Schmitt trigger input 1.8V power ground List
pull down
IRMCF371 Package Dimensions
IRMCF371 Part Marking Information
Part Number
IRMCF371 YWWP XXXXXX
Logo
Date Code
Production
Indentifier
Order Information
Lead-Free Part 48-lead Moisture sensitivity rating MSL3 Part number IRMCF371TR IRMCF371TY Order quantities 2000 parts tape reel pack 2500 parts trays (250 parts tray) pack
LQFP-48 MSL3 qualified This product been designed qualified industrial level Qualification standards found www.irf.com <http://www.irf.com> WORLD HEADQUARTERS: Kansas St., Segundo, California 90245, Tel: (310) 252-7105
Data specifications subject change without notice. 12/05/2006 www.irf.com

IRMCF371 Sensorless Motor Control Appliances MCE(Motion Cont

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