IRMCF312 Dual Channel Sensorless Motor Control Appliances (M

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IRMCF312 Dual Channel Sensorless Motor Control Appliances (M

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Data Sheet PD60300-A
IRMCF312
Dual Channel Sensorless Motor Control Appliances
(Motion Control Engine) Hardware based computation engine high efficiency sinusoidal sensorless control permanent magnet motor Integrated Power Factor Correction control Supports both interior surface permanent magnet motors Built-in hardware peripheral single shunt current feedback reconstruction external current voltage sensing operational amplifier required Dual channel three/two-phase Space Vector Three-channel analog output (PWM) Embedded 8-bit high speed microcontroller (8051) flexible man-machine control JTAG programming port emulation/debugger serial communication interface (UART) I2C/SPI serial interface Watchdog timer with independent analog clock Three general purpose timers/counters special timers: periodic timer, capture timer External EEPROM internal facilitate debugging code development compatible with IRMCK312, OTP-ROM version 1.8V/3.3V CMOS
Product Summary
Maximum crystal frequency Maximum internal clock (SYSCLK) frequency Sensorless control computation time
signed bytes bits/ SYSCLK bits SYSCLK bits 57.6K QFP100
computation data range
Program loaded from external EEPROM bytes Data GateKill latency (digital filtered) carrier frequency counter input channels converter resolution converter conversion speed 8051 instruction execution speed Analog output (PWM) resolution UART baud rate (typ) Number (max) Package (lead-free)
Description
IRMCF312 high performance based motion control designed primarily appliance applications. IRMCF312 designed achieve cost high performance control solutions advanced inverterized appliance motor control. IRMCF312 contains computation engines. Motion Control Engine (MCETM) sensorless control permanent magnet motors; other 8-bit high-speed microcontroller (8051). Both computation engines integrated into monolithic chip. MCEcontains collection control elements such Proportional plus Integral, Vector rotator, Angle estimator, Multiply/Divide, loss SVPWM, Single Shunt IFB. user program motion control algorithm connecting these control elements using graphic compiler. components sensorless control algorithms, such Angle Estimator, provided complete pre-defined control blocks implemented hardware. unique analog/digital circuit algorithm fully support single shunt current reconstruction also provided. 8051 microcontroller performs 2cycle instruction execution (60MIPS 120MHz). 8051 microcontroller connected dual port process signal monitoring command input. advanced graphic compiler MCEis seamlessly integrated into MATLAB/Simulink environment, while third party JTAG based emulator tools supported 8051 developments. IRMCF312 comes with small QFP100 lead-free package.
IRMCF312 TABLE CONTENTS
Overview. IRMCF312 Block Diagram Main Functions Pinout. Input/Output IRMCF312. 8051 Peripheral Interface Group. Motion Peripheral Interface Group Analog Interface Group Power Interface Group Test Interface. Application Connections Characteristics Absolute Maximum Ratings System Clock Frequency Power Consumption. Digital Characteristics. Oscillator Characteristics. Analog Characteristics Analog Characteristics Under Voltage Lockout Characteristics CMEXT AREF Characteristics. Characteristics Characteristics Analog Digital Converter Characteristics Characteristics Characteristics SYNC SVPWM Conversion Timing. GATEKILL SVPWM Timing. Interrupt Timing Timing Timing. 7.9.1 Write timing 7.9.2 Read Timing. 7.10 UART Timing 7.11 CAPTURE Input Timing 7.12 JTAG Timing List. Package Dimensions. Part Marking Information.
IRMCF312 TABLE FIGURES
Figure Figure Figure Figure Figure Figure Typical Application Block Diagram Using IRMCF312. IRMCF312 Internal Block Diagram IRMCF312 Configuration Input/Output IRMCF312 Application Connection IRMCF312 Clock Frequency Power Consumption.
TABLE TABLES
Table Table Table Table Table Table Table Table Table Table Table Table Table Table Table Table Table Table Table Table Table Table Absolute Maximum Ratings. System Clock Frequency. Digital Characteristics Characteristics Analog Characteristics Analog Characteristics UVcc Characteristics CMEXT AREF Characteristics. Characteristics Converter Characteristics. Current Sensing Characteristics. Voltage sensing Characteristics. SYNC Characteristics. GATEKILL SVPWM Timing Interrupt Timing. Timing Write Timing. Read Timing. UART Timing. CAPTURE Timing JTAG Timing. List
IRMCF312 Overview
IRMCF312 International Rectifier integrated circuit device primarily designed onechip solution complete inverter controlled appliance dual motor control applications. Unlike traditional microcontroller DSP, IRMCF312 provides built-in closed loop sensorless control algorithm using unique Motion Control Engine (MCETM) permanent magnet motors. MCEconsists collection control elements, motion peripherals, dedicated motion control sequencer dual port internal signal nodes. IRMCF312 also employs unique single shunt current reconstruction circuit eliminate additional analog/digital circuitry enables direct shunt resistor interface sensorless control same both motors with single shunt current sensing capability. Motion control programming achieved using dedicated graphical compiler integrated into MATLAB/Simulinkdevelopment environment. Sequencing, user interface, host communication, upper layer control tasks implemented 8051 high-speed 8-bit microcontroller. 8051 microcontroller equipped with JTAG port facilitate emulation debugging tools. Figure shows typical application schematic using IRMCF312. IRMCF312 intended development purpose contains bytes RAM, which loaded from external EEPROM 8051 program execution. high volume production, IRMCK312 contains place program reduce cost. Both IRMCF312 IRMCK312 come same 100-pin package with identical configuration facilitate board layout transition mass production
Figure Typical Application Block Diagram Using IRMCF312
IRMCF312 IRMCF312 Block Diagram Main Functions
IRMCF312 block diagram shown Figure
8bit Address/Data
Figure IRMCF312 Internal Block Diagram IRMCF312 contains following functions sensorless motor control applications: Motion Control Engine (MCETM) Proportional plus Integral block pass filter Differentiator (high pass filter) Ramp Limit Angle estimate (sensorless control) Inverse Clark transformation Vector rotator latch
Motion Control
IRMCF312
Peak detect Transition Multiply-divide (signed unsigned) Divide (signed unsigned) Adder Subtractor Comparator Counter Accumulator Switch Shift ATAN (arc tangent) Function block (any curve fitting, nonlinear function) 16-bit wide Logic operations (AND, XOR, NOT, NEGATE) MCEprogram data memory byte). Note MCEcontrol sequencer
8051 microcontroller Three 16-bit timer/counters 16-bit periodic timer 16-bit analog watchdog timer 16-bit capture timer discrete I/Os Eleven-channel 12-bit Five buffered channels 1.2V input) unbuffered channels 1.2V input) JTAG port pins) three channels analog output (8-bit PWM) UART I2C/SPI port byte program loaded from external EEPROM byte data RAM. Note Note Total size byte including program, data, 8051 data. Different sizes allocated depending applications.
IRMCF312 Pinout
Figure IRMCF312 Configuration Attention: must left floating. connect.
IRMCF312 Input/Output IRMCF312
signals IRMCF312 shown Figure pins 3.3V logic interface except interface pins.
Figure Input/Output IRMCF312
IRMCF312
8051 Peripheral Interface Group
Input, Receive data IRMCF312, configured P1.1 Output, Transmit data from IRMCF312, configured P1.2 Input, channel Receive data IRMCF312, configured P3.6 Output, channel Transmit data from IRMCF312, configured P3.7
UART Interface P1.1/RXD P1.2/TXD P3.6/RXD1 P3.7/TXD1
Discrete Interface P1.0/T2 Input/output port 1.0, configured Timer/Counter input P1.3/SYNC/SCK Input/output port 1.3, configured SYNC output clock, needs pulled VDD1 order boot from EEPROM P1.4/CAP Input/output port 1.4, configured Capture Timer input P1.5 Input/output port P1.6 Input/output port P1.7 Input/output port P2.0/NMI Input/output port 2.0, configured non-maskable interrupt P2.1 Input/output port P2.2 Input/output port P2.3 Input/output port P2.4 Input/output port P2.5 Input/output port P3.0/INT2/CS1 Input/output port 3.0, configured external interrupt chip select P3.2/INT0 Input/output port 3.2, configured external interrupt P3.3/INT1 Input/output port 3.3, configured external interrupt P3.4/T0 Input/output port 3.4, configured Timer/Counter input P3.5/T1 Input/output port 3.5, configured Timer/Counter input P4.0/INT3 Input/output port 4.0, configured external interrupt P4.1/INT4 Input/output port 4.1, configured external interrupt P4.2/INT5 Input/output port 4.2, configured external interrupt P4.3/INT6 Input/output port 4.3, configured external interrupt P4.4/INT7 Input/output port 4.4, configured external interrupt P4.5/INT8 Input/output port 4.5, configured external interrupt P4.6/INT9 Input/output port 4.6, configured external interrupt P4.7/INT10 Input/output port 4.7, configured external interrupt P5.0/PFCGKILL Input/output port 5.0, configured PFCGKILL P5.1/TMS Input/output port 5.1, configured JTAG P5.2/TDO Input/output port 5.2, configured JTAG P5.3/TDI Input/output port 5.3, configured JTAG
IRMCF312
Analog Output Interface P2.6/AOPWM0 Input/output, configured 8-bit output with programmable carrier frequency P2.7/AOPWM1 Input/output, configured 8-bit output with programmable carrier frequency P3.1/AOPWM2 Input/output, configured 8-bit output with programmable carrier frequency Crystal Interface XTAL0 XTAL1 Reset Interface RESET I2C/SPI Interface SCL/SO-SI SDA/CS0 P3.0/INT2/CS1 Input, connected crystal Output, connected crystal Inout, system reset, needs pulled VDD1 doesn't require external time constant
Output, clock output, SO-SI Input/output, Data line, Chip Select Input/output port 3.0, configured external interrupt chip select P1.3/SYNC/SCK Input/output port 1.3, configured SYNC output clock, needs pulled VDD1 order boot from EEPROM
Motion Peripheral Interface Group
Output, motor phase high side gate signal Output, motor phase side gate signal Output, motor phase high side gate signal Output, motor phase side gate signal Output, motor phase high side gate signal Output, motor phase side gate signal Output, motor phase high side gate signal Output, motor phase side gate signal Output, motor phase high side gate signal Output, motor phase side gate signal Output, motor phase high side gate signal Output, motor phase side gate signal Output,
CPWMUH CPWMUL CPWMVH CPWMVL CPWMWH CPWMWL FPWMUH FPWMUL FPWMVH FPWMVL FPWMWH FPWMWL PFCPWM
IRMCF312
Fault CGATEKILL
Input, upon assertion, this negates signals motor programmable logic sense P5.0/PFCGKILL Input, upon assertion, this negates PFCPWM signal, programmable logic sense, configured discrete which case CGATEKILL negates PFCPWM FGATEKILL Input, upon assertion, this negates signals motor programmable logic sense
Analog Interface Group
Analog power (1.8V) Analog power return Buffered 0.6V output Unbuffered 0.6V, input AREF buffer, capacitor needs connected. Input, Operational amplifier positive input shunt resistor current sensing motor Input, Operational amplifier negative input shunt resistor current sensing motor Output, Operational amplifier output shunt resistor current sensing motor Input, Operational amplifier positive input shunt resistor current sensing motor Input, Operational amplifier negative input shunt resistor current sensing motor Output, Operational amplifier output shunt resistor current sensing motor Input, Operational amplifier positive input current sensing Input, Operational amplifier negative input current sensing Output, Operational amplifier output current sensing Input, Operational amplifier positive input voltage sensing Input, Operational amplifier negative input voltage sensing Output, Operational amplifier output voltage sensing Input, Operational amplifier positive input voltage sensing Input, Operational amplifier negative input voltage sensing Input/Output, Analog input channel Operational amplifier output voltage sensing Input, Analog input channel (0-1.2V), needs pulled down AVSS unused Input, Analog input channel (0-1.2V), needs pulled down AVSS unused
AVDD AVSS AREF CMEXT IFBC+ IFBCIFBCO IFBF+ IFBFIFBFO IPFC+ IPFCIPFO VAC+ VACVACO VDC+ VDCAIN0/VDCO AIN1 AIN2
IRMCF312
AIN3 AIN4 AIN5 AIN6 Input, Analog input channel (0-1.2V), needs pulled down AVSS unused Input, Analog input channel (0-1.2V), needs pulled down AVSS unused Input, Analog input channel (0-1.2V), needs pulled down AVSS unused Input, Analog input channel (0-1.2V), needs pulled down AVSS unused
Power Interface Group
Digital power (3.3V) Digital power core logic (1.8V) Digital common power (1.8V) ground return
VDD1 VDD2 PLLVDD PLLVSS
Test Interface
Must tied VSS, used only factory testing. Input, JTAG test data input Input, JTAG test mode select Input, JTAG test clock Output, JTAG test data output
TSTMOD P5.3/TDI P5.1/TMS P5.2/TDO
IRMCF312 Application Connections
Typical application connection shown Figure components necessary implement complete sensorless drive control algorithm shown connected IRMCF312.
Figure Application Connection IRMCF312
IRMCF312 Characteristics
Absolute Maximum Ratings
Parameter Supply Voltage -0.3 Supply Voltage -0.3 1.98 Analog Input Voltage -0.3 1.98 Digital Input Voltage -0.3 3.65 Ambient Temperature Storage Temperature Table Absolute Maximum Ratings Condition Respect Respect Respect AVSS Respect
Symbol VDD1 VDD2
Caution: Stresses beyond those listed "Absolute Maximum Ratings" cause permanent damage device. These stress ratings only function device these other conditions beyond those indicated operational sections specifications implied.
System Clock Frequency Power Consumption
Parameter System Clock Table System Clock Frequency Unit
Symbol SYSCLK
Power (mW) VDD2 (1.8V) Clock Frequency (MHz) VDD1 (3.3V) Total
Figure Clock Frequency Power Consumption
IRMCF312
VDD1 VDD2 IOL1(2) IOH1 IOL2
Digital Characteristics
Parameter Supply Voltage Supply Voltage 1.62 1.98 Input Voltage -0.3 Input High Voltage Input capacitance Input leakage current level output 13.2 15.2 current High level output 12.4 24.8 current level output 17.9 26.3 33.4 current High level output 24.6 49.5 current Table Digital Characteristics Condition Recommended Recommended Recommended Recommended
Symbol
IOH2(3)
Note: Data guaranteed design. Applied SCL/SO-SI, SDA/CS0 pins. Applied P1.0/T2, P1.1/RXD, P1.2/TXD, P1.3/SYNC/SCK, P1.4/CAP, P1.5, P1.6, P1.7, P2.0/NMI, P2.1, P2.2, P2.3, P2.4, P2.5, P2.6/AOPWM0, P2.7/AOPWM1, P3.0/INT2/CS1, P3.1/AOPWM2, P3.2/INT0, P3.3/INT1, P3.4/T0, P3.5/T1, P3.6/RXD1, P3.7/TXD1, P4.0/INT3, P4.1/INT4, P4.2/INT5, P4.3/INT6, P4.4/INT7, P4.5/INT8, P4.6/INT9, P4.7/INT10, P5.0/PFCGKILL, P5.1/TMS, P5.2/TDO, P5.3/TDI, CGATEKILL, FGATEKILL, CPWMUL, CPWMUH, CPWMVL, CPWMVH, CPWMWL, CPWMWH, FPWMUL, FPWMUH, FPWMVL, FPWMVH, FPWMWL, FPWMWH, PFCPWM pins.
IRMCF312
Oscillator Characteristics
Parameter Supply Voltage Oscillator Input Voltage Oscillator Input High Voltage Table 1.62 VPLLVSS 0.8* 1.92 0.2* VPLLVDD VPLLVDD Condition Recommended VPLLVDD
Symbol VPLLVDD
VPLLVDD
VPLLVDD Characteristics
Note: Data guaranteed design.
Analog Characteristics
amps current sensing (IFBC+, IFBC-, IFBCO, IFBF+, IFBF-, IFBFO, IPFC+, IPFC-, IPFCO) CAREF 1nF, CMEXT= 100nF. Unless specified, 25°C. Symbol Parameter VAVDD Supply Voltage 1.71 VOFFSET Input Offset Voltage Input Voltage Range VOUTSW output operating range Input capacitance RFDBK feedback resistor GAINCL CMRR ISRC ISNK
1.89
Condition Recommended VAVDD Recommended VAVDD
Operating Close loop Gain Common Mode Rejection Ratio output source current output sink current Table Analog Characteristics
Requested between output negative input
VOUT
VOUT
Note: Data guaranteed design.
IRMCF312
Analog Characteristics
amps voltage sensing (VAC+,VAC-,VACO, VDC+, VDC-, VDCO) CAREF 1nF, CMEXT= 100nF. Unless specified, 25°C. Symbol Parameter VAVDD Supply Voltage 1.71 1.89 VOFFSET Input Offset Voltage Input Voltage Range VOUTSW output operating range Input capacitance GAINCL Operating Close loop Gain CMRR Common Mode Rejection Ratio ISRC output source current ISNK output sink current Table Analog Characteristics Note: Data guaranteed design.
Condition VAVDD VAVDD
VOUT
VOUT
IRMCF312
Under Voltage Lockout Characteristics
Based AVDD (1.8V) Unless specified, 25°C. Symbol Parameter UVCC+ UVcc positive going 1.53 1.66 1.71 Threshold UVCCUVcc negative going 1.52 1.62 1.71 Threshold UVCCH UVcc Hysteresys Table UVcc Characteristics
Condition VDD1 VDD1
CMEXT AREF Characteristics
CAREF 1nF, CMEXT= 100nF. Unless specified, 25°C. Condition Symbol Parameter CMEXT voltage VAVDD VAREF Buffer Output Voltage VAVDD Load regulation (VDCVo 0.6) PSRR Power Supply Rejection Ratio Table CMEXT AREF Characteristics Note: Data guaranteed design.
IRMCF312 Characteristics
FCLKIN FPLL FLWPW TLOCK
Characteristics
Parameter Condition Crystal input frequency (see figure below) Internal clock frequency Sleep mode output FCLKIN frequency Short time jitter psec Duty cycle lock time Table Characteristics
Symbol
Note: Data guaranteed design.
R1=1M
R2=10
Xtal
C1=30PF C2=30PF
IRMCF312
Analog Digital Converter Characteristics
2.05 Condition
Unless specified, 25°C. Symbol Parameter TCONV Conversion time THOLD Sample/Hold maximum hold time
Voltage droop (see figure below)
Table Converter Characteristics Note: Data guaranteed design.
Input Voltage Voltage droop Voltage
tSAMPLE THOLD
IRMCF312
Characteristics
amps current sensing (IFBC+, IFBC-, IFBCO, IFBF+, IFBF-, IFBFO, IPFC+, IPFC-, IPFCO) Unless specified, 25°C. Symbol Parameter OPSR slew rate OPIMP TSET input impedance Settling time
V/sec
Condition VAVDD
VAVDD Table Current Sensing Characteristics
Note: Data guaranteed design.
Characteristics
amps voltage sensing (VAC+,VAC-,VACO, VDC+, VDC-, VDCO) Unless specified, 25°C. Symbol Parameter OPSR slew rate OPIMP TSET input impedance Settling time
V/sec
Condition VAVDD
VAVDD Table Voltage sensing Characteristics
Note: Data guaranteed design.
IRMCF312
SYNC SVPWM Conversion Timing
twSYNC
SYNC
tdSYNC1
IU,IV,IW
tdSYNC2
AINx
tdSYNC3
PWMUx,PWMVx,PWMWx
Unless specified, 25°C. Symbol Parameter twSYNC SYNC pulse width tdSYNC1 SYNC current feedback conversion time tdSYNC2 SYNC AIN0-6 analog input conversion time tdSYNC3 SYNC output delay time Table SYNC Characteristics Note: AIN1 through AIN6 channels converted once every SYNC events
Unit SYSCLK SYSCLK SYSCLK
SYSCLK
IRMCF312
GATEKILL SVPWM Timing
Unless specified, 25°C. Symbol Parameter twGK GATEKILL pulse width tdGK GATEKILL output delay Table GATEKILL SVPWM Timing
Unit SYSCLK SYSCLK
Interrupt Timing
Unless specified, 25°C. Symbol Parameter twINT INT0, INT1 Interrupt Assertion Time tdINT INT0, INT1 latency Table Interrupt Timing
Unit SYSCLK SYSCLK
IRMCF312
Timing
TI2CLK TI2CLK
tI2WSETUP tI2WHOLD tI2RSETUP tI2RHOLD tI2EN2
tI2ST1 tI2ST2
tI2EN1
Unless specified, 25°C. Symbol Parameter TI2CLK clock period tI2ST1 start time tI2ST2 start time tI2WSETUP write setup time tI2WHOLD write hold time tI2RSETUP read setup time tI2RHOLD read hold time
0.25 0.25 0.25 0.25 filter time Table Timing
8192
Unit SYSCLK TI2CLK TI2CLK TI2CLK TI2CLK SYSCLK SYSCLK
Note: read setup time determined programmable filter time applied communication.
IRMCF312
Timing
7.9.1 Write timing
Unless specified, 25°C. Symbol Parameter TSPICLK clock period tSPICLKHT clock high time tSPICLKLT clock time tCSDELAY data delay time tWRDELAY falling edge data delay time tCSHIGH high time between consecutive byte transfer tCSHOLD hold time Table Write Timing
Unit SYSCLK TSPICLK TSPICLK nsec nsec TSPICLK TSPICLK
IRMCF312
7.9.2 Read Timing
Unless specified, 25°C. Symbol Parameter TSPICLK clock period tSPICLKHT clock high time tSPICLKLT clock time tCSRD data delay time tRDSU read data setup time tRDHOLD read data hold time tCSHIGH high time between consecutive byte transfer tCSHOLD hold time Table Read Timing
Unit SYSCLK TSPICLK TSPICLK nsec nsec nsec TSPICLK TSPICLK
IRMCF312
7.10 UART Timing
TBAUD
Start
Data Parity
Stop
TUARTFIL
Unless specified, 25°C. Symbol Parameter TBAUD Baud Rate Period 57600 1/16 TUARTFIL UART sampling filter period Table UART Timing
Unit bit/sec TBAUD
Note: Each including start stop sampled three times center interval 1/16 TBAUD. three sampled values agree, then UART noise error generated.
IRMCF312
7.11 CAPTURE Input Timing
Unless specified, 25°C. Symbol Parameter TCAPCLK CAPTURE input period tCAPHIGH CAPTURE input high time tCAPLOW CAPTURE input time tCRDELAY CAPTURE falling edge capture register latch time tCLDELAY CAPTURE rising edge capture register latch time tINTDELAY CAPTURE input interrupt latency time Table CAPTURE Timing
Unit SYSCLK SYSCLK SYSCLK SYSCLK SYSCLK SYSCLK
IRMCF312
7.12 JTAG Timing
TJCLK
tJHIGH
tJLOW
tJSETUP tJHOLD
TDI/TMS
Unless specified, 25°C. Symbol Parameter TJCLK Period tJHIGH High Period tJLOW Period propagation delay time tJSETUP TDI/TMS setup time tJHOLD TDI/TMS hold time Table JTAG Timing
Unit nsec nsec nsec nsec nsec
IRMCF312 List
Number Name XTAL0 XTAL1 P1.0/T2 P1.1/RXD P1.2/TXD P1.3/SYNC/ P1.4/CAP P1.5 P1.6 P1.7 P4.3/INT6 P4.7/INT10 VDD2 VDD1 FGATEKILL FPWMWL FPWMWH FPWMVL FPWMVH FPWMUL FPWMUH P2.0/NMI P2.1 P2.2 P2.3 Pull Pull Pull Pull Pull Pull Internal Pull-up /Pull-down Type Description Crystal input Crystal output Discrete programmable Timer/Counter input Discrete programmable UART receive input Discrete programmable UART transmit output Discrete programmable SYNC output clock output, needs pulled VDD1 order boot from EEPROM Discrete programmable Capture Timer input Discrete programmable Discrete programmable Discrete programmable Discrete programmable Interrupt Discrete programmable Interrupt 1.8V digital power Digital common 3.3V digital power shutdown input, 2-sec digital filter, configurable either high true. gate drive phase side, configurable either high true gate drive phase high side, configurable either high true gate drive phase side, configurable either high true gate drive phase high side, configurable either high true gate drive phase side, configurable either high true gate drive phase high side, configurable either high true Discrete programmable Maskable Interrupt Discrete programmable Discrete programmable Discrete programmable
IRMCF312
Number Name P2.4 P2.5 P2.6/ AOPWM0 P2.7/ AOPWM1 VDD2 VDD1 P4.0/INT3 P4.4/INT7 IFBFIFBF+ IFBFO AIN0/VDCO VDC+ VDCAVDD AVSS AIN1 CMEXT AREF IFBCIFBC+ IFBCO AIN2 AIN3 AIN4 AIN5 Internal Pull-up /Pull-down Type Description Discrete programmable Discrete programmable Discrete programmable analog output (PWM) Discrete programmable analog output (PWM) 1.8V digital power Digital common Digital common digital power Discrete programmable Interrupt Discrete programmable Interrupt single shunt current sensing input single shunt current sensing input single shunt current sensing output Analog input channel voltage sensing output voltage sensing input voltage sensing input Analog power (1.8V) Analog common Analog input channel 0-1.2V range, needs pulled down AVSS unused Unbuffered analog reference voltage output (0.6V) Analog reference voltage output (0.6V) Compressor single shunt current sensing input Compressor single shunt current sensing input Compressor single shunt current sensing output connect. Analog input channel 0-1.2V range, needs pulled down AVSS unused Analog input channel 0-1.2V range, needs pulled down AVSS unused Analog input channel 0-1.2V range, needs pulled down AVSS unused Analog input channel 0-1.2V range, needs pulled down AVSS unused
IRMCF312
Number Name AIN6 VAC+ VACVACO IPFCO IPFC+ IPFCP4.5/INT8 P4.1/INT4 VDD2 VDD1 CGATEKILL CPWMWL CPWMWH CPWMVL CPWMVH CPWMUL CPWMUH P3.0/INT2/ P5.0/ PFCGKILL PFCPWM P3.1/ AOPWM2 P3.2/INT0 P3.3/INT1 P3.4/T0 Pull Pull Pull Pull Pull Pull Pull Internal Pull-up /Pull-down Type Description Analog input channel 0-1.2V range, needs pulled down AVSS unused input voltage sensing input input voltage sensing input input voltage sensing output shunt current sensing output shunt current sensing input shunt current sensing input Discrete programmable Interrupt Discrete programmable Interrupt digital power Digital common 3.3V digital power Compressor shutdown input, 2-sec digital filter, configurable either high true. Compressor gate drive phase side, configurable either high true Compressor gate drive phase high side, configurable either high true Compressor gate drive phase side, configurable either high true Compressor gate drive phase high side, configurable either high true Compressor gate drive phase side, configurable either high true Compressor gate drive phase high side, configurable either high true Discrete programmable INT2 digital input Chip Select Discrete programmable shutdown input, 2-sec digital filter, configurable either high true. gate drive, configurable either high true Discrete programmable analog output (PWM) Discrete programmable external interrupt Discrete programmable external interrupt Discrete programmable Timer/Counter input
IRMCF312
Number Name P3.5/T1 P3.6/RXD1 P3.7/TXD1 VDD1 P4.2/INT5 P4.6/INT9 SCL/SO-SI SDA/CS0 P5.1/TMS P5.2/TDO P5.3/TDI TSTMOD RESET VDD2 PLLVDD PLLVSS Internal Pull-up /Pull-down Type Description Discrete programmable Timer/Counter input Discrete programmable UART receive input Discrete programmable UART transmit output Digital common Digital common 3.3V digital power Discrete programmable Interrupt Discrete programmable Interrupt clock output data data Chip Select Discrete programmable JTAG test mode select Discrete programmable JTAG port test data output Discrete programmable JTAG test data input JTAG test clock Test mode. Must tied VSS. Factory only
pull down
Reset, true, Schmitt trigger input 1.8V digital power 1.8V power. ground. Table List
IRMCF312 Package Dimensions
IRMCF312 Part Marking Information
Part Number
IRMCF312
Logo
Date Code
YWWP XXXXXX
Production
Indentifier
Order Information
Lead-Free Part 64-lead Moisture sensitivity rating MSL3 Part number IRMCF312TR Order quantities 1000 parts tape reel pack
LQFP-100 MSL3 qualified This product been designed qualified industrial level Qualification standards found www.irf.com <http://www.irf.com> WORLD HEADQUARTERS: Kansas St., Segundo, California 90245, Tel: (310) 252-7105
Data specifications subject change without notice. 12/05/2006 www.irf.com

IRMCF312 Dual Channel Sensorless Motor Control Appliances (M

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