Data Sheet 2008 FN9034.3 Microprocessor CORE Voltage Regulator Mu

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Data Sheet 2008 FN9034.3 Microprocessor CORE Voltage Regulator Mu

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HIP6301V, HIP6302V
Data Sheet 2008 FN9034.3
Microprocessor CORE Voltage Regulator Multi-Phase Buck Controller
HIP6301V HIP6302V control microprocessor CORE voltage regulation driving four synchronous-rectified buck channels parallel. Multiphase buck converter architecture uses interleaved timing multiply ripple frequency reduce input output ripple currents. Lower ripple results fewer components, lower component cost, reduced power dissipation, smaller implementation area. HIP6301V versatile 4-phase controller HIP6302V cost-saving dedicated 2-phase controller. HIP6301V HIP6302V exact compatible replacements their predecessor parts, HIP6301 HIP6302. They first controllers incorporate Dynamic VIDtechnology manage output voltage current during on-the-fly changes. Using Dynamic VID, HIP6301V HIP6302V detect changes code, gradually change reference 25mV increments until reaching value. gradually changing reference setting, in-rush current accompanying voltage swings remain negligibly small. Intersil offers wide range MOSFET drivers form highly integrated solutions high-current, high slew-rate applications. HIP6301V HIP6302V regulate output voltage, balance load currents provide protective functions four synchronous-rectified buck converter channels. These parts feature integrated high-bandwidth error amplifier fast, precise regulation 5-bit digital interface program 0.8% accuracy. window comparator toggles PGOOD output voltage moves range, acts protect load case over voltage. Current sensing accomplished reading voltage developed across lower MOSFETs during their conduction intervals. Current sensing provides needed signals precision droop, channel-current balancing, load sharing, overcurrent protection. This saves cost taking advantage power device's parasitic resistance.
Features
Multi-Phase Power Conversion Precision CORE Voltage Regulation ±0.8% System Accuracy Over-Temperature Microprocessor Voltage Identification Input Dynamic-VID Technology 5-bit Decoder Precision Channel-Current Balance Overcurrent Protection Lossless Current Sensing Programmable "Droop" Voltage Fast Transient Response Selection 4-Phase Operation High Ripple Frequency (100kHz 6MHz) Pb-Free Available (RoHS Compliant)
Ordering Information
PART NUMBER HIP6301VCB* HIP6301VCBZ* (Note) PART MARKING HIP6301VCB HIP6301VCBZ TEMP. RANGE (°C) PKG. DWG. M20.3 M20.3 M20.3 M16.15 M16.15
PACKAGE SOIC SOIC (Pb-free) SOIC (Pb-free) SOIC SOIC (Pb-free)
HIP6301VCBZA* HIP6301VCBZ (Note) HIP6302VCB* HIP6302VCBZ* (Note) HIP6302VCB HIP6302VCBZ
*Add "-T" suffix tape reel. Please refer TB347 details reel specifications. NOTE: These Intersil Pb-free plastic packaged products employ special Pb-free material sets; molding compounds/die attach materials 100% matte plate PLUS ANNEAL termination finish, which RoHS compliant compatible with both SnPb Pb-free soldering operations. Intersil Pb-free products classified Pbfree peak reflow temperatures that meet exceed Pb-free requirements IPC/JEDEC STD-020.
CAUTION: These devices sensitive electrostatic discharge; follow proper Handling Procedures. 1-888-INTERSIL 1-888-468-3774 Intersil (and design) trademark Intersil Americas Inc. Copyright Intersil Americas Inc. 2002, 2004, 2008. Rights Reserved Dynamic VIDis trademark Intersil Americas Inc.
HIP6301V, HIP6302V Pinouts
HIP6301V SOIC VIEW
VID4 VID3 VID2 VID1 VID0 COMP FS/DIS VSEN PGOOD PWM4 ISEN4 ISEN1 PWM1 PWM2 ISEN2 ISEN3 PWM3 VID4 VID3 VID2 VID1 VID0 COMP FS/DIS
HIP6302V SOIC VIEW
PGOOD ISEN1 PWM1 PWM2 ISEN2 VSEN
FN9034.3 2008
HIP6301V, HIP6302V HIP6301V Block Diagram
PGOOD
POWER-ON RESET (POR) VSEN X1.15 LATCH THREE-STATE CLOCK SAWTOOTH GENERATOR
FS/DIS
PWM1
SOFTSTART FAULT LOGIC
PWM2
COMP
PWM3
VID0 VID1 VID2 VID3 VID4 DYNAMIC
PWM4
CURRENT CORRECTION PHASE NUMBER
CHANNEL DETECTOR
ISEN1 I_TOT I_TRIP
ISEN2
ISEN3
ISEN4
FN9034.3 2008
HIP6301V, HIP6302V HIP6302V Block Diagram
PGOOD
POWER-ON RESET (POR) VSEN X1.15 LATCH TRI-STATE CLOCK SAWTOOTH GENERATOR
FS/DIS
PWM1
SOFTSTART FAULT LOGIC
COMP VID0 VID1 VID2 VID3 VID4 DYNAMIC
PWM2
CURRENT CORRECTION
I_TOT I_TRIP
ISEN1
ISEN2
FN9034.3 2008
HIP6301V, HIP6302V HIP6301V HIP6302V Functional Descriptions
HIP6301V SOIC VIEW
VID4 VID3 VID2 VID1 VID0 COMP FS/DIS VSEN PGOOD PWM4 ISEN4 ISEN1 PWM1 PWM2 ISEN2 ISEN3 PWM3 VID4 VID3 VID2 VID1 VID0 COMP FS/DIS
HIP6302V SOIC VIEW
PGOOD ISEN1 PWM1 PWM2 ISEN2 VSEN
VID4, VID3, VID2, VID1 VID0 (Pins thru Both Parts)
Voltage Identification inputs. HIP6301V HIP6302V decode bits establish reference voltage (see Table Each internal 20µA pull-up current source 2.5V making parts compatible with CMOS logic from down 2.5V. When change detected, reference voltage slowly ramps down value 25mV steps. input levels above 2.9V produce reference-voltage offset inaccuracy.
PWM1 (Pin HIP6301V, HIP6302V), PWM2 (Pin HIP6301V, HIP6302V), PWM3 (Pin HIP6301V only) PWM4 (Pin HIP6301V only)
outputs each channel. Connect these pins input external MOSFET driver. HIP6301V systems using channels, connect PWM4 high. channel systems, connect PWM3 PWM4 high.
COMP (Pin Both Parts)
Output internal error amplifier. Connect this external feedback compensation network.
ISEN1 (Pin HIP6301V, HIP6302V), ISEN2 (Pin HIP6301V, HIP6302V), ISEN3 (Pin HIP6301V only) ISEN4 (Pin HIP6301V only)
Current sense inputs from individual converter channel's phase nodes. Unused sense lines MUST left open.
(Pin Both Parts)
Inverting input internal error amplifier.
PGOOD (Pin HIP6301V, HIP6302V)
Power-good. This open-drain logic signal that indicates when microprocessor CORE voltage (VSEN pin) within specified limits soft-start timed out.
FS/DIS (Pin Both Parts)
Channel frequency, FSW, select disable. resistor from this ground sets switching frequency converter. Pulling this ground disables converter three states outputs. Figure
(Pin HIP6301V, HIP6302V)
Bias supply. Connect this supply.
(Pin Both Parts)
Bias reference ground. signals referenced this pin.
VSEN (Pin Both Parts)
Power-good monitor input. Connect microprocessor CORE voltage.
FN9034.3 2008
HIP6301V, HIP6302V Typical Application HIP6301V Controller with HIP6601B Gate Drivers
+12V
PVCC
BOOT UGATE PHASE
HIP6601B DRIVER LGATE
VSEN
COMP ISEN1
+12V
PGOOD VID4 VID3 VID2 VID1 VID0 MAIN CONTROL HIP6301V PWM3 FS/DIS ISEN3 PWM4 ISEN4 PVCC +12V PWM1 PWM2 ISEN2 PVCC
BOOT UGATE PHASE
HIP6601B DRIVER LGATE VCORE
BOOT UGATE PHASE
HIP6601B DRIVER LGATE
+12V
PVCC
BOOT UGATE PHASE
HIP6601B DRIVER LGATE
FN9034.3 2008
HIP6301V, HIP6302V
Absolute Maximum Ratings
Supply Voltage, .+7V Input, Output, Voltage -0.3V 0.3V
Thermal Information
Thermal Resistance (Typical, Note (°C/W) SOIC Package SOIC Package Maximum Junction Temperature +150°C Maximum Storage Temperature Range .-65°C +150°C Pb-free reflow profile .see link below
Recommended Operating Conditions
Supply Voltage Ambient Temperature. +70°C
CAUTION: operate near maximum ratings listed extended periods time. Exposure such conditions adversely impact product reliability result failures covered warranty.
NOTES: measured with component mounted high effective thermal conductivity test board free air. (See Tech Brief TB379 details.) input levels above 2.9V produce reference-voltage offset inaccuracy. Parts 100% tested +25°C. Temperature limits established characterization production tested.
Electrical Specifications
PARAMETER INPUT SUPPLY POWER Input Supply Current (Power-On Reset) Threshold
Operating Conditions: +0°C +70°C, Unless Otherwise Specified. TEST CONDITIONS (Note (Note UNITS
100k Rising Falling
4.25 3.75
4.38 3.88
4.00
REFERENCE System Accuracy Percent system deviation from programmed Codes -0.8
(VID0 VID3) Input Voltage Programming Input Threshold Voltage (VID0 VID3) Input High Voltage Programming Input High Threshold Voltage Pull-Up CHANNEL GENERATOR Frequency, Disable Voltage ERROR AMPLIFIER Gain Gain-Bandwidth Product Slew Rate Maximum Output Voltage Minimum Output Voltage ISEN Full-Scale Current Level Overcurrent Trip Level POWER-GOOD MONITOR Undervoltage Threshold Undervoltage Threshold PGOOD Output Voltage PROTECTION Overvoltage Threshold Overvoltage Hysteresis VSEN Rising VSEN Falling; tested reference, only VSEN Rising VSEN Falling IPGOOD tested reference, only tested reference, only ground 100pF, ground 100pF, ground ground ground 100k, VFS/DIS disable controller; tested reference, only VIDx VIDx 2.5V (Note tested reference only
V/µs
82.5
0.92 0.90
VDAC VDAC
1.12
1.15
1.20
VDAC
FN9034.3 2008
HIP6301V, HIP6302V
ERROR AMPLIFIER PROGRAMMABLE REFERENCE AVERAGE CURRENT SENSING ISEN2 RISEN2 PHASE COMPARATOR CIRCUIT PWM2 HIP6601B CURRENT AVERAGING VCORE COUT RLOAD CORRECTION
COMPARATOR CIRCUIT PWM1 HIP6601B
PHASE
CURRENT SENSING
ISEN1
RISEN1
CORRECTION
FIGURE SIMPLIFIED BLOCK DIAGRAM HIP6301V VOLTAGE CURRENT CONTROL LOOPS 2-PHASE REGULATOR
Operation
Figure shows simplified diagram voltage regulation current control loops. Both voltage current feedback used precisely regulate voltage tightly control output currents, IL2, power channels. voltage loop comprises error amplifier, comparators, gate drivers output MOSFETs. error amplifier essentially connected voltage follower that input, programmable reference output that CORE voltage.
CIRCUIT with phase reversal HIP6601B, again with phase reversal gate drive upper MOSFETs, Increased duty cycle ON-time MOSFET transistors results increased output voltage compensate output voltage sensed.
Current Loop
current control loop works similar fashion voltage control loop, with current control information applied individually each channel's comparator. information used this control voltage that developed across rDS(ON) lower MOSFETs, when they conducting. single resistor converts scales voltage across MOSFETs current that applied current sensing circuit within controller. Output from these sensing circuits applied current averaging circuit. Each channel receives difference signal from summing circuit that compares average sensed current individual channel current. When power channel's current greater than average current, signal applied summing correction circuit comparator, reduces output pulse width comparator compensate detected "above average" current that channel.
FN9034.3 2008
Voltage Loop
Feedback from CORE voltage applied resistor inverting input error amplifier. This signal drive error amplifier output either high low, depending upon CORE voltage. CORE voltage makes amplifier output move towards higher output voltage level. Amplifier output voltage applied positive inputs comparators correction summing networks. Out-of-phase sawtooth signals applied Comparators inverting inputs. Increasing error amplifier voltage results increased comparator output duty cycle. This increased duty cycle signal passed through
HIP6301V, HIP6302V
Droop Compensation
addition control each power channel's output current, average channel current also used provide CORE voltage droop compensation. Average full channel current defined 50µA. selecting input resistor, RIN, amount voltage droop required full load current programmed. average current driven into results voltage increase across resistor that direction make error amplifier "see" higher voltage inverting input, resulting Error Amplifier adjusting output voltage lower. voltage developed across equal "droop" voltage. "Current Sensing Balancing" page more details.
Initialization
HIP6301V HIP6302V circuits usually operate from power supply. Many functions initiated rising supply voltage controller. Oscillator, Sawtooth Generator, Soft-start other functions initialized during this interval. These circuits controlled POR, Power-On Reset. During this interval, outputs driven three-state condition that makes these outputs essentially open. This state results gate drive output MOSFETS. Once voltage reaches 4.375V (±125mV), voltage level insure proper internal function, outputs enabled Soft-start sequence initiated. reason, voltage drops below 3.875V (±125mV), circuit shuts converter down again three states outputs.
Applications Convertor Start-Up
Each power channel's current regulated. This enables channels accurately share load current enhanced reliability. HIP6601, HIP6602 HIP6603 MOSFET driver interfaces with HIP6301V. more information, datasheets individual Intersil MOSFET drivers. HIP6301V capable controlling power channels. Connecting unused outputs automatically sets number channels. phase relationship between channels 360°/number active channels. example, three channel operation, outputs separated 120°. Figure shows output signals four channel system.
Soft-start
After function completed with reaching 4.375V, soft-start sequence initiated. Soft-start slow rise CORE voltage from zero, avoids overcurrent condition slowly charging discharged output capacitors. This voltage rise initiated internal that slowly raises reference voltage error amplifier input. voltage rise controlled oscillator frequency within controller, therefore, output voltage effectively regulated rises final programmed CORE voltage value. first switching cycles, output remains inhibited outputs remain three stated. From 33rd cycle another, approximately cycles output remains low, clamping lower output MOSFETs ground, (see Figure time variability error amplifier, sawtooth generator comparators moving into their active regions. After this short interval, outputs enabled increment pulse width from zero duty cycle operational pulse width, thus allowing output voltage slowly reach CORE voltage. CORE voltage will reach programmed value before 2048 cycles, PGOOD output will initiated until 2048th switching cycle. soft-start time delay time, 2048/FSW. oscillator frequency, FSW, 200kHz, first cycles 160µs, outputs held three state level explained above. After this period short interval previously described, outputs initiated voltage rises 10.08ms, total delay time 10.24ms. Figure shows start-up sequence initiated fast rising supply, VCC, applied controller. Note short rise three state level output during first cycles. Figure shows waveforms when regulator operating 200kHz. Note that soft-start duration
FIGURE FOUR PHASE OUTPUT 500kHz
Power supply ripple frequency determined channel frequency, FSW, multiplied number active channels. example, channel frequency 250kHz there three phases, ripple frequency 750kHz. monitors precisely regulates CORE voltage microprocessor. After initial start-up, controller also provides protection load power supply. following section discusses these features.
FN9034.3 2008
HIP6301V, HIP6302V
function Channel Frequency, explained previously. Also note pulses COMP terminal. These pulses current correction signal feeding into comparator input (see Figure Figure shows regulator operating from supply. this figure, note slight rise PGOOD supply rises.The PGOOD output stage made NMOS PMOS transistors. rising VCC, PMOS device becomes active slightly before NMOS transistor pulls "down", generating slight rise PGOOD voltage.
SUPPLY
PGOOD
VCORE
SUPPLY CORE LOAD CURRENT FREQUENCY 200kHz SUPPLY ACTIVATED "PS-ON PIN"
OUTPUT
DELAY TIME
FIGURE SUPPLY POWERED SUPPLY
PGOOD
VCORE
Note that Figure shows gate driver voltage available before supply controller reached threshold level. conditions were reversed supply rise first, start-up sequence would different. this case controller sense overcurrent condition charging output capacitors. supply would then restart through normal soft-start cycle.
Dynamic
HIP6301V HIP6302V require full clock cycles detect change code. code changes that valid least cycles detected. Once detected, controller waits additional two-cycle wait period certain change stable. After two-cycle wait period, begins stepping toward setting 25mV increments. makes 25mV step every clock cycles. example, 500kHz system detecting change from 1.300V 1.800V requires between 84ms 88ms complete change. code detected during change continue toward code without changing direction, processing continues without interruption. code detected during change change direction order proceed toward then code, processing halts. two-cycle wait period initiated processing continues above. These decisions made with reference transitional value rather than original target value.
FIGURE START-UP 4-PHASE SYSTEM OPERATING 500kHz
COMP
DELAY TIME
PGOOD
VCORE
FIGURE START-UP 4-PHASE SYSTEM OPERATING 200kHz
FN9034.3 2008
HIP6301V, HIP6302V
input. outputs driven when VSEN detects that CORE voltage above programmed level. This condition drives outputs low, causing lower MOSFETs conduct shunt CORE voltage ground protect load. after this event, CORE voltage falls below overvoltage limit (plus some hysteresis), outputs will three state. HIP6601 family drivers pass three state information along, shuts both upper lower MOSFETs. This prevents "dumping" output capacitors back through lower MOSFETs, avoiding possibly destructive ringing capacitors output inductors. conditions that caused overvoltage still persist, outputs will cycled between three state VCORE clamped ground, hysteretic shunt regulator.
1.85V 1.85V VCORE VREF
PGOOD 5.00V CHANGE 5.00V
50µs/DIV
FIGURE VCORE TRACKING REFERENCE VOLTAGE AFTER 1.85V 1.10V CHANGE COMMAND
Undervoltage
VSEN also detects when CORE voltage falls more than below programmed level. This causes PGOOD low, other effect operation latched. There also hysteresis this detection point.
VCORE
Overcurrent
VREF 1.10V 1.10V PGOOD 5.00V 5.00V CHANGE 50µs/DIV
FIGURE VCORE TRACKING REFERENCE VOLTAGE AFTER 1.10V 1.85V CHANGE COMMAND
Fault Protection
HIP6301V HIP6302V protect microprocessor entire power system from damaging stress levels. Within controller, both overvoltage overcurrent circuits incorporated protect load regulator.
event overcurrent condition, overcurrent protection circuit reduces average current delivered less than current limit. When overcurrent condition detected, controller forces outputs into three state mode. This condition results gate driver removing drive output stages. controller goes into wait delay timing cycle that equal soft-start ramp time. PGOOD also goes "low" during this time VSEN going below threshold voltage.To lower average output dissipation, soft-start initial wait time increased from 2048 cycles, then soft-start ramp initiated. frequency 200kHz, instance, overcurrent detection would cause dead time 10.24ms, then ramp 10.08ms. delay, outputs restarted soft-start ramp initiated. short present that time, cycle repeated. This hiccup mode. Figure shows supply shorted under operation hiccup operating mode previously described. Note that high short circuit current, overcurrent detected before completion start-up sequence delay quite long normal soft-start cycle.
Overvoltage
VSEN connected microprocessor CORE voltage. CORE overvoltage condition detected when VSEN goes more than above programmed level. overvoltage condition latched, disabling normal operation, causing PGOOD low. latch only reset lowering returning high initiate soft-start sequence. During latched overvoltage, outputs will driven either three state, depending upon VSEN
FN9034.3 2008
HIP6301V, HIP6302V
TABLE VOLTAGE IDENTIFICATION CODES (Continued)
SHORT APPLIED HERE PGOOD
VID4
SHORT CURRENT 50A/Div
VID3
VID2
VID1
VID0
VDAC 1.625 1.650 1.675 1.700 1.725 1.750 1.775 1.800 1.825 1.850
HICCUP MODE. SUPPLY POWERED SUPPLY CORE LOAD CURRENT 31A, LOAD SUPPLY FREQUENCY 200kHz, SUPPLY ACTIVATED "PS-ON PIN"
FIGURE SHORT APPLIED SUPPLY AFTER POWER-UP
CORE Voltage Programming
voltage identification pins (VID0, VID1, VID3, VID4) CORE output voltage. Each pulled 2.5V internal 20µA current source accepts open-collector/ standard low-voltage CMOS signals. Table shows nominal voltage function codes. power supply system ±0.8% accurate over operating temperature voltage range.
TABLE VOLTAGE IDENTIFICATION CODES VID4 VID3 VID2 VID1 VID0 VDAC 1.100 1.125 1.150 1.175 1.200 1.225 1.250 1.275 1.300 1.325 1.350 1.375 1.400 1.425 1.450 1.475 1.500 1.525 1.550 1.575 1.600
FN9034.3 2008
HIP6301V, HIP6302V
COMP HIP6301V SAWTOOTH ERROR AMPLIFIER REFERENCE DIFFERENCE OTHER CHANNELS CURRENT SENSING FROM OTHER CHANNELS AVERAGING ISEN RISEN GENERATOR CORRECTION COMPARATOR CIRCUIT
HIP6601
VCORE COUT RLOAD
PHASE
CURRENT SENSING
ONLY OUTPUT STAGE SHOWN
OVERCURRENT TRIP
INDUCTOR CURRENT(S) FROM OTHER CHANNELS
COMPARATOR REFERENCE
FIGURE SIMPLIFIED FUNCTIONAL BLOCK DIAGRAM SHOWING CURRENT VOLTAGE SAMPLING
Current Sensing Balancing
Overview
HIP6301V HIP6302V sample on-state voltage drop across each synchronous MOSFET, indication inductor current that phase, Figure Neglecting effects discussed later), voltage drop across simply rDS(ON)(Q2) inductor current (IL). Note that inductor current, either 1/2, 1/3, total current (ILT), depending many phases use. voltage Q2's drain, PHASE node, applied RISEN resistor develop IISEN current through ISEN pin. This held virtual ground, current through RISEN shown Equation
ISEN (EQ.
Reduce regulator output voltage with increasing load current (droop) Balance currents multiple channels
Overcurrent, Selecting RISEN
current detected through RISEN resistor averaged with current(s) detected other channels. averaged current compared with trimmed, internally generated current, used detect overcurrent condition. nominal current through RISEN resistor should 50µA full output load current, nominal trip point overcurrent detection 165% that value, 82.5µA (typical current levels) shown Equation Therefore:
ISEN -50A (EQ.
IISEN current provides information perform following functions: Detection overcurrent condition
full load phase, rDS(ON) (Q2) RISEN overcurrent trip point would 165% 25A, phase. RISEN value adjusted change overcurrent trip point, suggested stay within ±25% nominal.
FN9034.3 2008
HIP6301V, HIP6302V
Droop, Selection
average currents detected through RISEN resistors also steered pin. There return path connected except RIN, average current creates voltage drop across RIN. This drop increases apparent VCORE voltage with increasing load current, causing system decrease VCORE maintain balance pin. This desired "droop" voltage used maintain VCORE within limits under transient conditions. With high dv/dt load transient, typical high performance microprocessors, largest deviations output voltage occur leading trailing edges load transient. order fully utilize output-voltage tolerance range, output voltage positioned upper half range when output unloaded lower half range when controller under full load. This droop compensation allows larger transient voltage deviations thus reduces size cost output filter components. should selected give desired "droop" voltage normal full load current 50µA applied through RISEN resistor different full load current adjusted "Overcurrent, Selecting RISEN" page 13).
Vdroop (EQ.
effects, such series resistance, peak-to-peak value sawtooth current described Equation
CORE CORE
(EQ.
Where: VCORE
value output voltage value input supply voltage value inductor switching frequency
Example: VCORE 1.6V, 12V, 1.3µH, 250kHz, Then IP-P 4.3A
AMPERES AMPERES
Vdroop 80mV, 1.6k feedback components, scaled relation RIN.
FIGURE CHANNEL MULTIPHASE SYSTEM WITH CURRENT BALANCING DISABLED
Current Balancing
detected currents also used balance phase currents. Each phase's current compared average phase currents, difference used create offset that phase's comparator. offset direction reduce imbalance. balancing circuit make difference rDS(ON) between synchronous rectifiers. higher rDS(ON), current through that phase will reduced. Figures show inductor current 2-phase system without with current balancing.
Inductor Current
inductor current each phase multiphase buck converter components. There current equal load current divided number phases (ILT/n), sawtooth current, (IP-P) resulting from switching. sawtooth component dependent size inductors, switching frequency each phase, values input output voltage. Ignoring secondary
FIGURE CHANNEL MULTIPHASE SYSTEM WITH CURRENT BALANCING ENABLED
inductor, load current, flows alternately from through from ground through controller samples on-state voltage drop across each transistor indicate inductor current that phase. voltage drop sampled switching period, 1/FSW, after
FN9034.3 2008
HIP6301V, HIP6302V
turned turned Because sawtooth current component, sampled current different from average current phase. Neglecting secondary effects, sampled current (ISAMPLE) related load current (ILT) Equation
CORE CORE SAMPLE (EQ.
picked lower MOSFET. inductance switched current path generates large voltage spike during switching interval. Careful component selection, tight layout critical components, short, wide circuit traces minimize magnitude voltage spikes. Contact Intersil evaluation board drawings component placement printed circuit board. There sets critical components DC/DC converter using HIP6301V HIP6302V controller HIP6601 family gate driver. power components most critical because they switch large amounts energy. Next small signal components that connect sensitive nodes supply critical bypassing current signal coupling.
1,000
Where: total load current number channels Example: Using previously given conditions, 100A, Then ISAMPLE 25.49A discussed previously, voltage drop across each transistor point time when current sampled rDS(ON) (Q2) ISAMPLE. voltage Q2's drain, PHASE node, applied through RISEN resistor HIP6301V ISEN pin. This held virtual ground, current into ISEN calculated Equations
SAMPLE SENSE ISEN SAMPLE ISEN -50A (EQ.
(EQ.
Example: From previous conditions, where ISAMPLE rDS(ON) (Q2) Then: RISEN ICURRENT TRIP Short circuit 100A, 25.49A, 2.04k 165% 165A.
CHANNEL OSCILLATOR FREQUENCY, (Hz)
FIGURE RESISTANCE FREQUENCY
Channel Frequency Oscillator
channel oscillator frequency placing resistor, ground from FS/DIS pin. Figure curve showing relationship between frequency, FSW, resistor avoid pickup FS/DIS pin, important place this resistor next pin.
power components should placed first. Locate input capacitors close power switches. Minimize length connections between input capacitors, CIN, power switches. Locate output inductors output capacitors between MOSFETs load. Locate gate driver close MOSFETs. critical small components include bypass capacitors PVCC gate driver ICs. Locate bypass capacitor, CBP, controller close device. especially important locate resistors associated with input amplifiers close their respective pins, since they represent input feedback amplifiers. Resistor that sets oscillator frequency should also located next associated pin. especially important place RSEN resistor(s) respective ISEN terminals.
Layout Considerations
MOSFETs switch very fast efficiently. speed with which current transitions from device another causes voltage spikes across interconnecting impedances parasitic circuit elements. These voltage spikes degrade efficiency, radiate noise into circuit lead device overvoltage stress. Careful component layout printed circuit design minimizes voltage spikes converter. Consider, example, turnoff transition upper MOSFET. Prior turnoff, upper MOSFET carrying channel current. During turnoff, current stops flowing upper MOSFET
FN9034.3 2008
HIP6301V, HIP6302V
+5VIN +12V PVCC LOCATE NEXT PIN(S) CBOOT COMP FS/DIS LOCATE NEXT VSEN ISEN HIP6301V LOCATE NEXT RSEN HIP6601 PHASE COUT LOCATE NEAR TRANSISTOR VCORE
INDIVIDUAL METAL RUNS EACH CHANNEL HELP ISOLATE OUTPUT STAGES
ISLAND POWER PLANE LAYER ISLAND CIRCUIT PLANE LAYER CONNECTION GROUND PLANE
FIGURE PRINTED CIRCUIT BOARD POWER PLANES ISLANDS
multi-layer printed circuit board recommended. Figure shows connections critical components output channel converter. Note that capacitors COUT could each represent numerous physical capacitors. Dedicate solid layer, (usually middle layer board), ground plane make critical component ground connections with vias this layer. Dedicate another solid layer power plane break this plane into smaller islands common voltage levels. Keep metal runs from PHASE terminal inductor short. power plane should support input power output power nodes. copper filled polygons bottom circuit layers phase nodes. remaining printed circuit layers small signal wiring. wiring traces from driver MOSFET gate source should sized carry least ampere current.
High frequency decoupling capacitors should placed close power pins load physically possible. careful inductance circuit board wiring that could cancel usefulness these inductance components. Consult with manufacturer load specific decoupling requirements. only specialized low-ESR capacitors intended switching-regulator applications bulk capacitors. bulk capacitor's determines output ripple voltage initial voltage drop following high slew-rate transient's edge. most cases, multiple capacitors small case size perform better than single large case capacitor. Bulk capacitor choices include aluminum electrolytic, OS-Con, Tantalum even ceramic dielectrics. aluminum electrolytic capacitor's value related case size with lower available larger case sizes. However, equivalent series inductance (ESL) these capacitors increases with case size reduce usefulness capacitor high slew-rate transient loading. Unfortunately, specified parameter. Consult capacitor manufacturer measure capacitor's impedance with frequency select suitable component.
Component Selection Guidelines
Output Capacitor Selection
output capacitor selected meet both dynamic load requirements voltage ripple requirements. load transient microprocessor CORE characterized high slew rate (di/dt) current demands. general, multiple high quality capacitors different size dielectric paralleled meet design constraints. Modern microprocessors produce severe transient load rates. High frequency capacitors supply initially transient current slow load rate-of-change seen bulk capacitors. bulk filter capacitor values generally determined (effective series resistance) voltage rating requirements rather than actual capacitance requirements.
Output Inductor Selection
parameters limiting converter's response load transient time required change inductor current. Small inductors multi-phase converter reduce response time without significant increases total ripple current. output inductor each power channel controls ripple current. control stable channel ripple current (peak-to-peak) twice average current.
FN9034.3 2008
single channel's ripple current approximtely calculated Equation
CURRENT MULTIPLIER
SINGLE CHANNEL
(EQ.
current from multiple channels tend cancel each other reduce total ripple current. Figure gives total ripple current function duty cycle, normalized parameter zero duty cycle. determine total ripple current from number channels duty cycle, multiply y-axis value Small values output inductance cause excessive power dissipation. HIP6301V HIP6302V designed stable operation ripple currents twice load current. However, this condition, current 115% above value shown "MOSFET Selection Considerations" page With else fixed, decreasing inductance could increase power dissipated MOSFETs 30%.
SINGLE CHANNEL
CHANNEL CHANNEL CHANNEL
DUTY CYCLE (VO/VIN)
FIGURE CURRENT MULTIPLIER DUTY CYCLE
First determine operating duty ratio ratio output voltage divided input voltage. Find current multiplier from curve with appropriate power channels. Multiply current multiplier full load output current. resulting value current rating required input capacitor. input bypass capacitors control voltage overshoot across MOSFETs. ceramic capacitance high frequency decoupling bulk capacitors supply current. Small ceramic capacitors should placed very close drain upper MOSFET suppress voltage induced parasitic circuit impedances. bulk capacitance, several electrolytic capacitors (Panasonic series Nichicon series Sanyo MV-GX equivalent) needed. surface mount designs, solid tantalum capacitors used, caution must exercised with regard capacitor surge current rating. These capacitors must capable handling surge-current power-up. series available from AVX, 593D series from Sprague both surge current tested.
RIPPLE CURRENT (AP-P)
FSW)
2-CHANNEL 3-CHANNEL 4-CHANNEL DUTY CYCLE (VO/VIN)
FIGURE RIPPLE CURRENT DUTY CYCLE
Input Capacitor Selection
important parameters bulk input capacitors voltage rating current rating. reliable operation, select bulk input capacitors with voltage current ratings above maximum input voltage largest current required circuit. capacitor voltage rating should least 1.25x greater than maximum input voltage voltage rating 1.5x conservative guideline. current required multi-phase converter approximated with Figure
MOSFET Selection Considerations
high-current applications, MOSFET power dissipation, package selection heatsink dominant design factors. power dissipation includes loss components; conduction loss switching loss. These losses distributed between upper lower MOSFETs according duty factor (see Equation conduction losses main component power dissipation lower MOSFETs, Figure Only upper MOSFETs, have significant switching losses, since lower device turns into near zero voltage. equations assume linear voltage-current transitions model power loss reverse-recovery lower MOSFETs body diode. gate-charge losses dissipated Driver don't heat MOSFETs.
FN9034.3 2008
However, large gate-charge increases switching time, which increases upper MOSFET switching losses. Ensure that both MOSFETs within their maximum junction temperature high ambient temperature calculating temperature rise according package thermal-resistance specifications. separate heatsink necessary depending upon MOSFET power, package type, ambient temperature flow.
UPPER (EQ. LOWER
diode, anode ground, placed across Figure These diodes function clamp that catches negative inductor swing during dead time between turn lower MOSFETs turn upper MOSFETs. diodes must Schottky type prevent lossy parasitic MOSFET body diode from conducting. usually acceptable omit diodes body diodes lower MOSFETs clamp negative inductor swing, efficiency could drop percent result. diode's rated reverse breakdown voltage must greater than maximum input voltage.
FN9034.3 2008
HIP6301V, HIP6302V Small Outline Plastic Packages (SOIC)
INDEX AREA SEATING PLANE 0.25(0.010)
M16.15 (JEDEC MS-012-AC ISSUE
LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE INCHES SYMBOL
MILLIMETERS 1.35 0.10 0.33 0.19 9.80 3.80 1.75 0.25 0.51 0.25 10.00 4.00 NOTES Rev. 6/05
0.0532 0.0040 0.013 0.0075 0.3859 0.1497
0.0688 0.0098 0.020 0.0098 0.3937 0.1574
0.10(0.004)
0.050 0.2284 0.0099 0.016 0.2440 0.0196 0.050
1.27 5.80 0.25 0.40 6.20 0.50 1.27
0.25(0.010)
NOTES: Symbols defined Series Symbol List" Section Publication Number Dimensioning tolerancing ANSI Y14.5M-1982. Dimension does include mold flash, protrusions gate burrs. Mold flash, protrusion gate burrs shall exceed 0.15mm (0.006 inch) side. Dimension does include interlead flash protrusions. Interlead flash protrusions shall exceed 0.25mm (0.010 inch) side. chamfer body optional. present, visual index feature must located within crosshatched area. length terminal soldering substrate. number terminal positions. Terminal numbers shown reference only. lead width "B", measured 0.36mm (0.014 inch) greater above seating plane, shall exceed maximum value 0.61mm (0.024 inch). Controlling dimension: MILLIMETER. Converted inch dimensions necessarily exact.
FN9034.3 2008
HIP6301V, HIP6302V Small Outline Plastic Packages (SOIC)
INDEX AREA 0.25(0.010)
M20.3 (JEDEC MS-013-AC ISSUE LEAD WIDE BODY SMALL OUTLINE PLASTIC PACKAGE
INCHES SYMBOL 0.0926 0.0040 0.014 0.0091 0.4961 0.2914 0.1043 0.0118 0.019 0.0125 0.5118 0.2992 MILLIMETERS 2.35 0.10 0.35 0.23 12.60 7.40 2.65 0.30 0.49 0.32 13.00 7.60 NOTES Rev. 6/05
SEATING PLANE
0.10(0.004)
0.050 0.394 0.010 0.016 0.419 0.029 0.050
1.27 10.00 0.25 0.40 10.65 0.75 1.27
0.25(0.010)
NOTES: Symbols defined Series Symbol List" Section Publication Number Dimensioning tolerancing ANSI Y14.5M-1982. Dimension does include mold flash, protrusions gate burrs. Mold flash, protrusion gate burrs shall exceed 0.15mm (0.006 inch) side. Dimension does include interlead flash protrusions. Interlead flash protrusions shall exceed 0.25mm (0.010 inch) side. chamfer body optional. present, visual index feature must located within crosshatched area. length terminal soldering substrate. number terminal positions. Terminal numbers shown reference only. lead width "B", measured 0.36mm (0.014 inch) greater above seating plane, shall exceed maximum value 0.61mm (0.024 inch) Controlling dimension: MILLIMETER. Converted inch dimensions necessarily exact.
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FN9034.3 2008

Data Sheet 2008 FN9034.3 Microprocessor CORE Voltage Regulator Mu

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