Data Sheet February 2006 FN2924.8 250MHz Video Buffer HA-503

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Data Sheet February 2006 FN2924.8 250MHz Video Buffer HA-503

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HA-5033
Data Sheet February 2006 FN2924.8
250MHz Video Buffer
HA-5033 unity gain monolithic designed application requiring fast, wideband buffer. Featuring bandwidth 250MHz outstanding differential phase/ gain characteristics, this high performance voltage follower excellent choice video circuit design. Other features, which include minimum slew rate 1000V/µs high output drive capability, make HA-5033 applicable line driver high speed data conversion circuits. high performance this product result Intersil Dielectric Isolation process. major feature this process that produces both high frequency transistors which makes wide bandwidth designs, such HA-5033, practical. Alternative process methods typically produce lower performance.
Features
Differential Phase Error 0.02 Degrees Differential Gain Error 0.03% High Slew Rate 1100V/µs Wide Bandwidth (Small Signal) 250MHz Wide Power Bandwidth 17.5MHz Fast Rise Time High Output Drive. ±10V With Load Wide Power Supply Range ±16V Replace Costly Hybrids
Applications
Video Buffer High Frequency Buffer
Ordering Information
PART NUMBER PART MARKING TEMP. RANGE (°C) PACKAGE PKG. DWG.
Isolation Buffer High Speed Line Driver Impedance Matching Current Boosters
HA2-5033-2 HA2-5033-2 HA3-5033-5 HA3-5033-5
Metal T12.C PDIP E8.3
Pinouts
HA-5033 (PDIP) VIEW
SUBSTRATE
High Speed Input Buffers Related Literature AN548, Designer's Guide HA-5033
HA-5033 (METAL CAN) VIEW
CASE
CAUTION: These devices sensitive electrostatic discharge; follow proper Handling Procedures. 1-888-INTERSIL 1-888-468-3774 Intersil (and design) registered trademark Intersil Americas Inc. Copyright Intersil Americas Inc. 2003, 2005, 2006. Rights Reserved other trademarks mentioned property their respective owners.
HA-5033
Absolute Maximum Ratings
Voltage Between Pins. Input Voltage VOutput Current (Peak) (50ms On/1 Second Off) ±200mA Rating Human Body Model (Per MIL-STD-883 Method 3015.7) 2000V
Thermal Information
Thermal Resistance (Typical, Note (°C/W) (°C/W) Metal Package PDIP Package Maximum Junction Temperature (Note 175°C Maximum Junction Temperature (Plastic Packages) 150°C Maximum Storage Temperature Range -65°C 150°C Maximum Lead Temperature (Soldering 10s) 300°C
Operating Conditions
Temperature Ranges (Note HA-5033-2 -55°C 125°C HA-5033-5 75°C
CAUTION: Stresses above those listed "Absolute Maximum Ratings" cause permanent damage device. This stress only rating operation device these other conditions above those indicated operational sections this specification implied.
NOTES: Maximum power dissipation, including load conditions, must designed maintain maximum junction temperature below 175°C metal package, below 150°C plastic packages (See Figure 5.). measured with component mounted evaluation board free air. maximum operating temperature have derated depending output load condition. Figure more information.
Electrical Specifications
PARAMETER INPUT CHARACTERISTICS Offset Voltage
VSUPPLY ±12V, 100, 10pF, Unless Otherwise Specified TEST CONDITIONS TEMP. (°C) HA-5033-2 HA-5033-5 UNITS
Full
µV/°C µVP-P
Average Offset Voltage Drift Bias Current
Full Full
Input Resistance Input Capacitance Input Noise Voltage TRANSFER CHARACTERISTICS Voltage Gain -3dB Bandwidth OUTPUT CHARACTERISTICS Output Voltage Swing ±15V Output Current Output Resistance Full Power Bandwidth Full Power Bandwidth (Note TRANSIENT RESPONSE Rise Time Propagation Delay VOUT 500mV VOUT 1VRMS 10Hz 100MHz
Full
0.93 0.93 0.92
0.99
0.93 0.93 0.92
0.99
Full Full
15.9
±100 17.5
15.9
±100 17.5
FN2924.8
HA-5033
Electrical Specifications
PARAMETER Overshoot Slew Rate (Note Settling Time 0.1% Differential Phase Error (Note Differential Gain Error (Note POWER SUPPLY CHARACTERISTICS Supply Current Full Power Supply Rejection Ratio Harmonic Distortion NOTES: VSUPPLY ±15V, VOUT ±10V, Differential gain phase error nonlinear signal distortions found video systems defined follows: Differential gain error defined change amplitude color subcarrier frequency picture signal varied from blanking white level. Differential phase error defined change phase color subcarrier picture signal varied from blanking white level. 300. 1VRMS 100kHz Full <0.1 <0.1 VSUPPLY ±12V, 100, 10pF, Unless Otherwise Specified (Continued) TEST CONDITIONS TEMP. (°C) HA-5033-2 0.02 0.03 HA-5033-5 0.02 0.03 UNITS V/ns Degree
Test Circuits Waveforms
+15V 0.1µF +12V 0.1µF
0.1µF -15V
0.1µF -12V
FIGURE SLEW RATE SETTLING TIME
FIGURE TRANSIENT RESPONSE
INPUT
500mV INPUT OVERSHOOT SLEW RATE SETTLING TIME ERROR BAND ±10mV FROM FINAL VALUE
OUTPUT
OUTPUT
NOTE: Measured both positive negative transitions.
FIGURE SETTLING TIME SLEW RATE
FIGURE RISE TIME OVERSHOOT
FN2924.8
HA-5033 Test Circuits Waveforms
(Continued)
VOUT
VOUT
25°C, +10V RESPONSE
25°C, +10V RESPONSE
500mV
500mV VOUT
25°C, PULSE RESPONSE
Schematic Diagram
VOUT
FN2924.8
HA-5033 Application Information
Layout Considerations
wide bandwidth HA-5033 necessitates that high frequency circuit layout procedures followed. Failure follow these guidelines result marginal performance. Probably most crucial RF/video layout rules ground plane. ground plane provides isolation minimizes distributed circuit capacitance inductance which will degrade high frequency performance. sockets contribute inter-lead capacitance which limits device bandwidth should avoided. tied either supply, grounded, simply used. optimize device performance improve isolation, recommended that this grounded. Other considerations proper power supply bypassing keeping input output connections short possible which minimizes distributed capacitance reduces board space. also recommended that bypass capacitors connected close HA-5033 (preferably directly supply pins).
Figure based JMAX DMAX Where: TJMAX Maximum Junction Temperature Device Ambient Temperature Junction Ambient Thermal Resistance
MAXIMUM TOTAL POWER DISSIPATION TEMPERATURE (°C) QUIESCENT 0.72W ±12V, 30mA PDIP
Power Supply Decoupling
optimum device performance, recommended that positive negative power supplies bypassed with capacitors ground. Ceramic capacitors ranging value from 0.01µF 0.1µF will minimize high frequency variations supply voltage. Solid tantalum capacitors larger will optimize frequency performance.
FIGURE MAXIMUM POWER DISSIPATION TEMPERATURE
Typical Applications
+12V 0.1µF
(Also Application Note AN548)
HA-2539 VIDEO SIGNAL INPUT VIDEO OUTPUT
HA-5033
V900
0.1µF -12V
FIGURE VIDEO COAXIAL LINE DRIVER SYSTEM
FIGURE VIDEO GAIN BLOCK
FN2924.8
HA-5033 Typical Applications
(Also Application Note AN548) (Continued)
VOUT
VOUT
25°C, POSITIVE PULSE RESPONSE
25°C, NEGATIVE PULSE RESPONSE
Typical Performance Curves
OFFSET VOLTAGE (mV) TEMPERATURE (°C) ±10V ±12V ±15V ±10V
INPUT BIAS CURRENT (µA)
±12V ±15V
TEMPERATURE (°C)
FIGURE INPUT OFFSET VOLTAGE TEMPERATURE
±15V SUPPLY CURRENT (mA) SLEW RATE (V/µs)
FIGURE INPUT BIAS CURRENT TEMPERATURE
3000 ±15V, ±10V
FALL 2000 FALL 100)
±12V ±10V
1000 RISE RISE 100)
TEMPERATURE (°C)
TEMPERATURE (°C)
FIGURE SUPPLY CURRENT TEMPERATURE
FIGURE SLEW RATE TEMPERATURE
FN2924.8
HA-5033 Typical Performance Curves
2400 2200 ±15V, 25°C, ±10V 2000 1800 SLEW RATE (V/µs) 1600 1400 1200 1000 1000 5000 10,000 RISE FALL SLEW RATE (V/µs)
(Continued)
1400 1300 1200 1100 1000
±15V, 25°C, ±10V
FALL
RISE
1000
5000
10,000
CAPACITANCE (pF)
CAPACITANCE (pF)
FIGURE SLEW RATE LOAD CAPACITANCE
FIGURE SLEW RATE LOAD CAPACITANCE
OUTPUT INPUT (mV)
±15V, 25°C
OUTPUT INPUT (mV)
±15V, 25°C
-100 -300 -500 -700 -900
INPUT VOLTAGE
INPUT VOLTAGE
FIGURE GAIN ERROR INPUT VOLTAGE
FIGURE GAIN ERROR INPUT VOLTAGE
±15V, ±10V OUTPUT INPUT (mV) VOUT (mV) ±15, 25°C TEMPERATURE (°C) IOUT (mA) VOUT SOURCING CURRENT VOUT SINKING CURRENT VOUT VOUT
FIGURE GAIN ERROR TEMPERATURE
FIGURE VOUT IOUT
FN2924.8
HA-5033 Typical Performance Curves
PHASE ANGLE (DEGREES) 10-1 -135 -180 MAGNITUDE 10-2
(Continued)
Y21,
10-3
10-4
10-5
FREQUENCY (Hz)
FREQUENCY (Hz)
FIGURE PARAMETERS PHASE FREQUENCY
FIGURE PARAMETER MAGNITUDE FREQUENCY
POWER SUPPLY REJECTION RATIO (dB)
TOTAL HARMONIC DISTORTION
±12V, 25°C
0.10 0.09 0.08 0.07 0.06 0.05 0.04 0.03 0.02 0.01
±12V, 1VRMS
100K FREQUENCY (Hz)
FREQUENCY (Hz)
100K
FIGURE POWER SUPPLY REJECTION RATIO FREQUENCY
FIGURE TOTAL HARMONIC DISTORTION FREQUENCY
TOTAL HARMONIC DISTORTION
PEAK PEAK OUTPUT VOLTAGE
±12V ±12V, 100kHz
25°C
±15V ±12V
±10V LOAD RESISTANCE
0.01
INPUT VOLTAGE (RMS)
FIGURE TOTAL HARMONIC DISTORTION INPUT VOLTAGE
FIGURE OUTPUT VOLTAGE SWING LOAD RESISTANCE
FN2924.8
HA-5033 Typical Performance Curves
OUTPUT VOLTAGE (VRMS) 100K FREQUENCY (Hz) 100M HEAT SINK FREE
(Continued)
±15V, OUTPUT VOLTAGE (VRMS)
100K HEAT SINK FREE
±15V,
FREQUENCY (Hz)
100M
FIGURE OUTPUT SWING FREQUENCY (NOTE) NOTE:
FIGURE OUTPUT SWING FREQUENCY (NOTE)
This curve obtained noting output voltage necessary produce observable distortion given frequency. higher distortion acceptable, then higher output voltage given frequency obtained. However, operating HA-5033 with increased distortion right curve shown), will also accompanied increase supply current. resulting increase chip temperature must considered heat sinking will necessary prevent thermal runaway. This characteristic result output transistor operation. signal amplitude signal frequency both increased beyond curve shown, NPN, output transistors will approach condition being simultaneously Under this condition, thermal runaway occur.
FN2924.8
HA-5033 Characteristics
SUBSTRATE POTENTIAL (POWERED UP): Unbiased TRANSISTOR COUNT: PROCESS: Bipolar Dielectric Isolation
Metallization Mask Layout
HA-5033
FN2924.8
HA-5033 Metal Packages (Can)
REFERENCE PLANE
T12.C
LEAD METAL PACKAGE SYMBOL INCHES 0.130 0.016 0.016 0.585 0.540 0.150 0.019 0.021 0.615 0.560 MILLIMETERS 3.30 0.41 0.41 14.86 13.72 3.81 0.48 0.53 15.62 14.22 NOTES Rev. 5/18/94
BASE METAL LEAD FINISH
0.400 0.100 0.020 0.027 0.027 0.500 0.040 0.034 0.045 0.560
10.16 2.54 0.51 0.69 0.69 12.70 1.02 0.86 1.14 14.22
SECTION
NOTES: reference, base, seating planes same this variation. Measured from maximum diameter product. maximum number terminal positions. Dimensioning tolerancing ANSI Y14.5M 1982. Controlling dimension: INCH.
FN2924.8
HA-5033 Dual-In-Line Plastic Packages (PDIP)
INDEX AREA
E8.3 (JEDEC MS-001-BA ISSUE
LEAD DUAL-IN-LINE PLASTIC PACKAGE INCHES SYMBOL
MILLIMETERS 0.39 2.93 0.356 1.15 0.204 9.01 0.13 7.62 6.10 5.33 4.95 0.558 1.77 0.355 10.16 8.25 7.11 NOTES Rev. 12/93
0.015 0.115 0.014 0.045 0.008 0.355 0.005 0.300 0.240
0.210 0.195 0.022 0.070 0.014 0.400 0.325 0.280
BASE PLANE SEATING PLANE 0.010 (0.25)
NOTES: Controlling Dimensions: INCH. case conflict between English Metric dimensions, inch dimensions control. Dimensioning tolerancing ANSI Y14.5M-1982. Symbols defined Series Symbol List" Section Publication Dimensions measured with package seated JEDEC seating plane gauge GS-3. dimensions include mold flash protrusions. Mold flash protrusions shall exceed 0.010 inch (0.25mm). measured with leads constrained perpendicular datum measured lead tips with leads unconstrained. must zero greater. maximum dimensions include dambar protrusions. Dambar protrusions shall exceed 0.010 inch (0.25mm). maximum number terminal positions. Corner leads E8.3, E16.3, E18.3, E28.3, E42.6 will have dimension 0.030 0.045 inch (0.76 1.14mm).
0.100 0.300 0.115 0.430 0.150
2.54 7.62 10.92 3.81
2.93
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FN2924.8

Data Sheet February 2006 FN2924.8 250MHz Video Buffer HA-503

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