QUALITY SEMICONDUCTOR, INC. QuickSwitch® Products High-Speed CMOS
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QS3B491, QS3B2491 ADVANCE INFORMATION
QUALITY SEMICONDUCTOR, INC.
QuickSwitch® Products High-Speed CMOS Clocked Port 9-Bit CrossbarSwitchDESCRIPTION
QS3B491 QS3B2491 ADVANCE INFORMATION
Fully configurable Switch Matrix Sub-nanosecond Propagation Delay User-friendly Individual Port Control Power-on Reset Synchronous/Asynchronous Configuration Control Programmable Active Terminators each Port Resistor options line termination Available 64-pin TQFP package
QS3B491 QS3B2491 high speed Crossbar switches organized four independent 9-bit wide ports using QSI's 0.5micron CMOS technology. switch matrix consists N-channel switches controlled configuration logic. When closed, switches permit bidirectional data flow with near-zero propagation delay. Nchannel FETs also facilitate 3.3V, 2.5V voltage translation between ports. switch matrix configured independent connection between ports well multi-port broadcasting. Configuration control either synchronous asynchronous.
Figure Functional Block Diagram
Port
Port
SWITCH MATRIX
Port
Port
CLKEN
CONFIGURATION CONTROL LOGIC
TCA.TCD
MDSL-00251-01 AUGUST 1998
QUALITY SEMICONDUCTOR, INC.
QS3B491, QS3B2491 ADVANCE INFORMATION
synchronous mode, control logic behaves like Register. configuration stored positive edge Clock (CLK) Clock Enable (CLKEN) logic LOW. Asynchronous mode, switch configuration logic behaves Transparent Latch under control signal. When HIGH, Latch transparent mode. When LOW, configuration that meets set-up time requirements latched. internal Power-ON Reset circuir disables switches during power supply ramp-up ramp-down. port selection inputs provided portindependent interconnect control. Each port independently configured source destination. This control scheme eliminates `illegal' control input combinations. Each programmable Terminator with three modes operation: OFF, Active Terminator (Last Value Latch), Passive (Resistive) Terminator. Terminators each port connected independent VBIAS pins (VBA.VBD)and controlled independent Terminator Control (TCx) pins with three-state inputs. This control arrangement provides maximum flexibility voltage translation between ports. QS3B491 resistance Crossbar Switch, with resistance typical. QS32491 adds internal series resistor ideal series termination traces reduction signal overshoots undershoots.
Table Configuration Control
Control Inputs CLKEN Mode Asynch Synch Synch Asynch Asynch Status Switches Transparent Mode Hold Previous Configuration Load Configuration Hold Previous Configuration Hold Previous Configuration
Table Port Selection Control
Port Status Source Destination Destination Destination Port Status Destination Source Destination Destination Port Status Destination Destination Source Destination Port Status Destination Destination Destination Source QUALITY SEMICONDUCTOR, INC. MDSL-00251-01 AUGUST 1998
QS3B491, QS3B2491 ADVANCE INFORMATION Table Terminator Control
TCA, TCB, TCC, OPEN Terminator Status Active Terminator (Bus Hold) VBIAS (VBA.VBD) Resistor Termination VBIAS (VBA.VBD) Terminator
Figure Configuration
(All Pins View) TQFP
Table Absolute Maximum Ratings
Supply Voltage Ground -0.5V 7.0V Bias Voltage Ground -0.5V 7.0V Switch Input Voltage -0.5V 7.0V Control Input Voltage -0.5V 7.0V Control Input Voltage (for pulse width 20ns -3.0V Input Diode Current, -20mA Current, Max. Sink Current 100mA Maximum Power Dissipation watt Storage Temperature Range -65oC 150oC
Note: ABSOLUTE MAXIMUM CONTINUOUS RATINGS those values beyond which damage device occur. Exposure these conditions conditions beyond those indicated rating adversely affect device reliability. Functional operation under absolute-maximum conditions implied.
MDSL-00251-01 AUGUST 1998
CLKEN
QUALITY SEMICONDUCTOR, INC.
QS3B491, QS3B2491 ADVANCE INFORMATION Table Capacitance
25oC, 1MHz, VOUT Pins Control Inputs (Switches OFF) (One-to-one Channels) 64-Pin TQFP Units
Note: Capacitance characterized tested.
Figure Typical Resistance VCC, 25°C (3B491)
(ohms)
Symbol ICCQ QCCD
Note: QS3B2491 adove values.
(Volts)
Table Power Supply Characteristics
Parameter Quiescent Power Supply Current Power Supply Current(2) Input HIGH Dynamic Power Supply Current MHz(3) Test Conditions(1) VCC, VBIAS 5.5V 3.4V, Control Input VBIAS 5.5V, Switching Pins Open Control Inputs Toggling Duty Cycle Unit
Notes: conditions shown Min. Max., appropriate values specified under specifications. driven input (VIN 3.4V, control inputs only). pins contribute ICC. This current applies control inputs only represents current required switch internal capacitance specified frequency. This parameter guaranteed production tested.
QUALITY SEMICONDUCTOR, INC.
MDSL-00251-01 AUGUST 1998
QS3B491, QS3B2491 ADVANCE INFORMATION TABLE Electrical Characteristics Over Operating Range
-40oC 85oC, 5.0V
Symbol Parameter
Test Conditions CONTROL INPUTS
Typ(1)
Unit
VIHH VIMM VILL
Input HIGH Voltage Input Voltage Input HIGH Voltage Input Voltage Input Voltage Input Leakage Current Input Clamp Voltage
Guaranteed Logic HIGH Control Pins, except TCA.TCD Guaranteed Logic Control Pins, except TCA.TCD 3-Level Inputs Only TCA.TCD 3-Level Inputs Only TCA.TCD 3-Level Inputs Only TCA.TCD Control Inputs, except TCA.TCD -18mA, 4.5V Switch Ports)
-1.0 VCC/2 -0.5
0.02
VCC/2 +0.5
Off-State Current (Hi-Z) Switch Resistance Min., 0.0V, 30mA Min., 2.4V, 15mA VBIAS 4.50V Switch TCA.TCD HIGH VBIAS 5.5V Switch TCA.TCD HIGH
IBHL IBHH
Input Hold Current(2,3) Port)
3B491 3B2491 3B491 3B2491
-1.2 0.02 650(5)
0.8V 2.0V 0.8V< <2.0V
Input Current(4) Port Pass Voltage(5) Input Current
IOUT -5µA VBIAS 4.5V Switch OFF, TCA.TCD
Notes: Typical values indicate 5.0V 25°C. IBHL Minimum sustaining "sink" current input 0.8V. Signifies logic latching capability. IBHH Minimum sustaining "source" current input 2.0V. Signifies logic HIGH latching capability. Magnitude input current specified under conditions: Input voltage VCC. This indicates input current under steady-state condition. Input voltage between 0.8V 2.0V (TTL input threshold range). This indicates maximum input current during transient condition. driver connected input must overcome this current requirement order switch logic state Bus-hold circuit. Pass voltage guaranteed, production tested.
MDSL-00251-01 AUGUST 1998
QUALITY SEMICONDUCTOR, INC.
QS3B491, QS3B2491 ADVANCE INFORMATION Table Switching Characteristics Over Operating Range
-40oC 85oC, 5.0V +10% CLOAD 30pF, RLOAD unless otherwise noted Symbol tPLH tPHL tPLH tPHL tPZL tPZH tPLZ tPHZ tPZL tPZH tPLZ tPHZ tPZL tPZH tPLZ tPHZ tSCS tHCS tSEC tHEC tSCL tHCL Description Single Channel Port-Port Propagation Delay (3B491) Single Channel Port-Port Propagation Delay (3B2491) Asynchronous Enable Switch Turn-on Delay Asynchronous Enable Switch Turn-off Delay Select Control Switch Turn-on Delay (Asynchronous Mode) Select Control Switch Turn-off Delay (Asynchronous Mode) Switch Turn-on Delay (Synchronous Mode) Switch Turn-off Delay (Synchronous Mode) Select Control Input Set-up Time Select Control Input Hold Time Units
CLKEN Set-up Time CLKEN Hold Time Select Control Input Set-up Time Select Control Input Hold Time Clock Pulse Width (HIGH)
QUALITY SEMICONDUCTOR, INC.
MDSL-00251-01 AUGUST 1998
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