QUALITY SEMICONDUCTOR, INC. QuickSwitch® Products High-Speed CMOS

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QUALITY SEMICONDUCTOR, INC. QuickSwitch® Products High-Speed CMOS

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QS3388, QS3L388
QUALITY SEMICONDUCTOR, INC.
QuickSwitch® Products High-Speed CMOS Exchange Switches With Active Termination (Bus Hold)
DESCRIPTION
QS3388 QS3L388
Enhanced channel with inherent diode bidirectional switches connect inputs outputs Active termination drives pins rails when switches Zero propagation delay, zero ground bounce Undershoot clamp diodes switch control pins Available 24-pin QSOP exchange allows nibble swap TTL-compatible input output levels Bus-hold eliminates floating lines reduces static power consumption
APPLICATIONS
Resource sharing Crossbar switching Last value latch (graphics DSP)
QS3388 (standard power) QS3L388 (low power) provide high-speed CMOS compatible switches with active terminators switch pins. resistance 3388/3L388 allows inputs connected outputs without adding propagation delay without generating additional ground bounce noise. When switches turned off, drive active terminator circuit drives disconnected pins ground, away from threshold. This prevents undriven buses from floating. Enable (BE) signal turns switches Exchange (BX) signal provides nibble swap pairs signals. This exchange configuration allows byte swapping buses systems. also used five-wide 2-to-1 multiplexer create delay barrel shifters, etc.
Figure Functional Block Diagram
MDSL-00033-04 JULY 1997
QUALITY SEMICONDUCTOR, INC.
QS3388, QS3L388 Table Description
Name A0-A4, B0-B4 C0-C4, D0-D4 Function Buses Buses Switch Enable Exchange QSOP
Figure Configuration (All Pins View)
Table Function Table
A0-A4 Hi-Z C0-C4 D0-D4 B0-B4 Hi-Z D0-D4 C0-C4 Function Disconnect Connect Exchange
Table Absolute Maximum Ratings
Supply Voltage Ground -0.5V +7.0V Switch Voltage -0.5V +7.0V Input Voltage -0.5V +7.0V Input Voltage (for pulse width 20ns) -3.0V Output Current Max. Sink Current/Pin 120mA Maximum Power Dissipation watts TSTG Storage Temperature -65° +150°C
Note: ABSOLUTE MAXIMUM CONTINUOUS RATINGS those values beyond which damage device occur. Exposure these conditions conditions beyond those indicated adversely affect device reliability. Functional operation under absolute-maximum conditions implied.
Table Capacitance
25°C, 1MHz, VOUT QSOP
Note: Capacitance guaranteed, production tested. total capacitance while switch please Section under "Input Switch Capacitance."
Pins Control Inputs QuickSwitch Channels (Switch OFF)
Unit
QUALITY SEMICONDUCTOR, INC.
MDSL-00033-04 JULY 1997
QS3388, QS3L388 Table Electrical Characteristics Over Operating Range
-40°C 85°C, 5.0V Symbol IBHH IBHL Parameter Input HIGH Voltage Input Voltage Input Leakage Current (Control Inputs) Switch Resistance(2) Switch Resistance(2) Input Current(3) Switch Pins Hold Sustaining(4,5) Current Test Conditions Guaranteed Logic HIGH Control Inputs Guaranteed Logic Control Inputs Min., 0.0V 30mA Min., 2.4V 15mA Max., Max., 0.8V 2.0V 2.0V 0.8V Typ(1) 500(3) Unit
Notes: Typical values indicate 5.0V 25°C. diagram explaining procedure measurement, please section under Electrical Characteristics." |IBH| Magnitude input current specified under conditions: Input voltage VCC. This indicates input current under steady-state conditions. Input voltage between 0.8V 2.0V (TTL input threshold range). This indicates maximum input current during transient condition. driver connected input must overcome this current requirement order switch logic state Bus-hold circuit. IBHH Minimum sustaining `source' current input 2.0V. This parameter signifies latching capability Bus-hold circuit logic HIGH state. IBHL Minimum sustaining `sink' current input 0.8V. This parameter signifies latching capability Bus-hold circuit logic state.
Figure Typical Resistance 5.0V
(ohms)
(Volts)
MDSL-00033-04 JULY 1997
QUALITY SEMICONDUCTOR, INC.
QS3388, QS3L388 Table Power Supply Characteristics Over Operating Range
-40°C 85°C, 5.0V Symbol ICCQ QCCD Parameter Quiescent Power Supply Current Power Supply Current Input HIGH(2) Dynamic Power Supply Current MHz(3) Test Conditions(1) Max., VCC, Max., 3.4V, Control Input Max., Pins Open, Control Inputs Toggling Duty Cycle 3388 3L388 0.25 Unit
Notes: conditions shown Min. Max., appropriate values specified under specifications. driven input (VIN 3.4V, control inputs only). pins contribute ICC. This current applies control inputs only represents current required switch internal capacitance specified frequency. inputs generate significant currents they transition. This parameter guaranteed, production tested.
Table Switching Characteristics Over Operating Range
-40°C 85°C, 5.0V CLOAD 50pF, RLOAD unless otherwise noted. Symbol tPLH tPHL tPZL tPZH tPLZ tPHZ Description(1) Data Propagation Delay(2,3) AiBi CiDi, CiDi AiBi Switch Turn-on Delay Switch Turn-off Delay(2) Switch Multiplex Delay
0.25(3)
QS3388, QS3L388
Unit
Notes: Test Circuit Waveforms. Minimums guaranteed, production tested. This parameter guaranteed, production tested. switch contributes propagation delay other than delay resistance switch load capacitance. time constant switch alone order 0.25ns 50pF. Since this time constant much smaller than rise/fall times typical driving signals, adds very little propagation delay system. Propagation delay switch when used system determined driving circuit driving side switch interaction with load driven side.
QUALITY SEMICONDUCTOR, INC.
MDSL-00033-04 JULY 1997
QS3388, QS3L388 ACTIVE TERMINATOR 'BUS-HOLD' CIRCUIT
Active Terminator circuit, also known Bus-hold circuit, configured `weak latch' with positive feedback. When connected CMOS input port, Bus-hold circuit holds last logic state input when input `disconnected' from driver. When output device connected such input attempts logic level transition, will overdrive Bus-hold circuit. primary benefit Bus-hold circuit that prevents CMOS inputs from floating, situation which should avoided prevent spurious switching inputs unnecessary power dissipation. Bus-hold better solution than traditional approach using resistive termination prevent floating, because Bus-hold circuit does consume static power.
Figure Characteristics Bus-hold Circuit
Sinking Current
IBHL IBHH
IBHL
Voltage
Sourcing Current
-500
0.8V
IBHH
Threshold Voltage 1.5V 0.80
Figure shows input characteristics typical Bus-hold implementation. input characteristics resemble resistor. input voltage increased from volts, input `sink' current increases linearly. When threshold circuit reached (typically volts), latch changes logic state positive feedback direction current reversed. input voltage further increased towards VCC, input `source' current begins decrease, reaching lowest level VCC.
MDSL-00033-04 JULY 1997
QUALITY SEMICONDUCTOR, INC.

QUALITY SEMICONDUCTOR, INC. QuickSwitch® Products High-Speed CMOS

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