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QUALITY SEMICONDUCTOR, INC. QuickSwitch® Products High-Speed CMOS


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QS3801 ADVANCE INFORMATION
QUALITY SEMICONDUCTOR, INC.
QuickSwitch® Products High-Speed CMOS 10-Bit QuickSwitch With Pull-Up Termination
DESCRIPTION
QS3801 ADVANCE INFORMATION
bidirectional switches connect ports Zero propagation delay Undershoot clamp diodes switch control pins TTL-comptatible input output levels Zero ground bounce Available 24-pin SOIC(SO) QSOP
APPLICATIONS
Voltage translation
QS3801 10-bit high-speed CMOS switch controlled single enable (ON) input. When switch resistance QS3801 allows inputs connected outputs with zero propagation delay without additional noise. When low, switches closed port connected port When input node logic high (i.e., 3.3V), channel pull will raise voltage node VBIAS (i.e., 5V). channel pull allows switch perform voltage translation when output node without channel (i.e., 3.3V) considered logic high CMOS. When switch input node logic Low, channel pull significant effect node hence voltage node will logic Low.
Figure Functional Block Diagram
VBIAS
MDSL-00097-00 JULY 1997
QUALITY SEMICONDUCTOR, INC.
QS3801 ADVANCE INFORMATION Table Description
Name A0-A9 B0-B9 VBIAS Function Switch Enable Bias Voltage
Table Configuration (All Pins View)
SOIC, QSOP VBIAS
Table Function Table
B0-B9 A0-A9 (LOW state) VBIAS (A0-A9 HIGH state) VBIAS Function Connect Disconnect
Table Absolute Maximum Ratings
Supply Voltage Ground -0.5V +7.0V Bias Voltage Range, BIAS -0.5V Input Voltage -0.5V 0.5V Input Voltage (for pulse width 20ns) -3.0V Output Current Max. Sink Current/Pin 128mA Input Clamp Current -50mA Maximum Power Dissipation watts TSTG Storage Temperature -65° +150°C
Pins
Note: ABSOLUTE MAXIMUM CONTINUOUS RATINGS those values beyond which damage device occur. Exposure these conditions conditions beyond those indicated adversely affect device reliability. Functional operation under absolute-maximum conditions implied.
Table Capacitance
QSOP, SOIC Unit
Note: total capacitance while switch please Section under "input switch capacitance."
Control Inputs QuickSwitch Channels (Switch OFF)
Note: Capacitance characterized tested.
QUALITY SEMICONDUCTOR, INC.
MDSL-00097-00 JULY 1997
QS3801 ADVANCE INFORMATION Table Electrical Characteristics Over Operating Range
Commercial: -40°C 85°C, 5.0V Symbol VBIAS Parameter Input HIGH Voltage Input Voltage Input Leakage Current (Control Inputs) Off-State Current (Hi-Z) Bias Voltage Bias Current Switch Resistance(2) Switch Resistance(2) Test Conditions Guaranteed Logic HIGH Control Inputs Guaranteed Logic Control Inputs VOUT 4.5V, VBIAS 2.4V, HIGH Min., 0.0V 30mA Min., 2.4V 0.25 Typ(1) Unit
Notes: Typical values indicate 5.0V 25°C. diagram explaining procedure measurement, please Section1 under Electrical Characteristics." Max. value guaranteed characterization, production tested.
Figure Typical Resistance 5.0V
(ohms)
(Volts)
MDSL-00097-00 JULY 1997
QUALITY SEMICONDUCTOR, INC.
QS3801 ADVANCE INFORMATION Table Power Supply Characteristics Over Operating Range
-40°C 85°C, 5.0V Symbol ICCQ QCCD Parameter Quiescent Power Supply Current Power Supply Current Input HIGH Dynamic Power Supply Current MHz(4) Test Conditions(1) Max., VCC, Max., 3.4V(3), Control Input Max., Pins Open, Data Inputs GND, Control Inputs Toggling Duty Cycle Typ(2) 0.25 Unit
Notes: conditions shown Min. Max., appropriate values specified under specifications. Typical Values 5.0V, +25°C Ambient. driven input (VIN 3.4V, control inputs only). pins contribute ICC. This current applies control inputs only represents current required switch internal capacitance specified frequency. inputs generate significant currents they transition. This parameter guaranteed design, tested. Values these conditions examples formula. These limits guaranteed tested.
QUALITY SEMICONDUCTOR, INC.
MDSL-00097-00 JULY 1997
QS3801 ADVANCE INFORMATION Table Switching Characteristics Over Operating Range
Commercial: -40°C 85°C, 5.0V CLOAD 50pF, RLOAD unless otherwise noted. Symbol tPLH tPHL tPZL tPZH tPLZ tPHZ Description
(2,3)
QS3801 0.25
Unit
Data Propagation Delay Switch Turn-on Delay Switch Turn-off Delay(2)
Notes: Test Circuit Waveforms. Minimums guaranteed tested. This parameter guaranteed design tested. switch contributes propagation delay other than delay resistance switch load capacitance. time constant switch alone order 0.25ns 50pF. Since this time constant much smaller than rise/fall times typical driving signals, adds very little propagation delay system. Propagation delay switch when used system determined driving circuit driving side switch interaction with load driven side.
Figure Voltage Translation Application
VBIAS
channel pull
3.3V
Node
Node
4.3V
3.3V translation application: Without channel pull 3.3V Node will appear 3.3V Node CMOS, 3.3V Node considered Logic High. With addition channel pull Node 3.3V Node will pulled VBIAS (Logic High).
MDSL-00097-00 JULY 1997
QUALITY SEMICONDUCTOR, INC.

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