| The Datasheet Archive - 100 Million Datasheets from 7500 Manufacturers. |
QUALITY SEMICONDUCTOR, INC. Skew Clock Driver/ Buffer Desktop wit
Top Searches for this datasheetQS5818 ADVANCE INFORMATION QUALITY SEMICONDUCTOR, INC. Skew Clock Driver/ Buffer Desktop with DIMMS QS5818 ADVANCE INFORMATION DESCRIPTION QS5818 high speed, noise noninverting buffer designed SDRAM clock buffer applications. outputs used drive four SDRAM DIMMs, remaining used external feedback PLL. QS5818 also includes interface, which enable disable each output clock driver. Turning unused outputs reduces EMI. output buffer/driver Tri-state testing programming capability Power Supply Voltage 3.3V Skew outputs (<250ps) Multiple noise reduction SSOP package Figure Functional Block Diagram SDRAM SDRAM SDRAM SDRAM SDRAM SDRAM BUF_IN SDATA DECODING PORT SDRAM SDRAM SDRAM SDRAM SDRAM SDRAM SDRAM SDRAM SDRAM SDRAM SDRAM SDRAM SCLK MDSC-00039-02 SEPTEMBER 1998 QUALITY SEMICONDUCTOR, INC. QS5818 ADVANCE INFORMATION Figure Configuration (All Pins View) SSOP SDRAM SDRAM SDRAM SDRAM BUF_IN SDRAM SDRAM SDRAM SDRAM SDRAM VDDI2C SDATA SDRAM SDRAM SDRAM SDRAM SDRAM SDRAM SDRAM SDRAM SDRAM GNDI2C SCLK Table Description Name SDRAM (0:3) SDRAM (4:7) SDRAM (8:11) SDRAM (12:15) SDRAM (16:17) BUF_IN SDATA SCLK GNDI2C VDDI2C Number 1,2,47,48 4,5,8,9 13,14,17,18 31,32,35,36 40,41,44,45 21,28 3,7,12,16,20, 29,33,37,42,46 6,10,15,19,22, 27,30,34,39,43 Type Functional Description Pins internally connected. SDRAM Byte Clock outputs. SDRAM Byte Clock outputs. SDRAM Byte Clock outputs. SDRAM Byte Clock outputs. SDRAM Clock Outputs useable feedback. Input buffers. Tri-state output enable. Includes internal pull VDD. When asserted LOW, clock outputs high impedance. Data Pin. Includes internal pull VDD. Clock Pin. Includes internal pull VDD. 3.3V power supply output buffers. Ground output buffers Ground circuitry. 3.3V power supply circuitry. QUALITY SEMICONDUCTOR, INC. MDSC-00039-02 SEPTEMBER 1998 QS5818 ADVANCE INFORMATION Table Absolute Maximum Ratings Supply Voltage Ground -0.5V 4.6V Output Voltage VOUT -0.5V 4.6V Input Voltage -0.5V 4.6V Input Diode Current with -20mA Maximum Power Dissipation 85°C, 600mW TSTG Storage Temperature -65° 150°C Note: Stresses greater than those listed under absolute maximum ratings cause permanent damage devices that result functional reliability type failures. Table Recommended Operating Conditions Symbol Parameter Power Supply Voltage Operating Temperature Load Capacitance Input Capacitance 3.135 3.465 Unit MDSC-00039-02 SEPTEMBER 1998 QUALITY SEMICONDUCTOR, INC. QS5818 ADVANCE INFORMATION Table Electrical Characteristics Over Operating Range Symbol Parameter Input High Voltage Input Voltage Test Condition inputs inputs except inputs inputs (SDATA SCLK) Input High Input Current Input Current BUF_IN SDATA, SCLK Supply Current 0pF; 66.66MHz(1) 0pF; 100MHz(1) 30pF; 66.66MHz(1) 30pF; 100MHz(1) BUF_IN VDD, other inputs Output High Voltage SDRAM(0:17) -36mA Output Voltage SDRAM(0:17) 25mA Output Voltage SDATA IOLI2C -100 Unit VOLI2C Table Electrical Characteristics Over Operating Range Symbol TPHL TPLH TPZL TPZH TPLZ TPHZ Skew (output output)(1) Propagation Delay Enable Delay Disable Delay 1.5V Figure 1.5V Figure Parameter Rise Time(1) Fall Time(1) Duty Cycle(1) Test Condition 0.4V 2.4V; 30pF 2.4V 0.4V; 30pF 1.5V; 30pF; With Input Clock 1.5V; 30pF outputs Figure 1.5V Unit Note: Applies SDRAM(0:17) outputs. Guaranteed design, subject 100% production testing. QUALITY SEMICONDUCTOR, INC. MDSC-00039-02 SEPTEMBER 1998 QS5818 ADVANCE INFORMATION Serial Interface Control interface permits individual enable/disable each clock output: unused outputs disabled reduce EMI. QS5818 slave receiver device. read back data stored latches verification. data transfer rate supported interface 100K bits/sec. Data transferred bytes (with addition start, stop, acknowledge bits) sequential order from lowest highest byte with ability stop after complete byte been transferred. first bytes transferred must Command Code followed Byte Count. Both these bytes ignored device. address QS5818 Address read/write writes reads. During read back, first byte read Byte Count representing number bytes following (fixed Table Serial Configuration Command Bitmaps Byte SDRAM Active/Inactive Register Enable, Disable, outputs held low), Default Enable Description SDRAM (Active/Inactive) SDRAM (Active/Inactive) SDRAM (Active/Inactive) SDRAM (Active/Inactive) SDRAM (Active/Inactive) SDRAM (Active/Inactive) SDRAM (Active/Inactive) SDRAM (Active/Inactive) Byte SDRAM Active/Inactive Register Enable, Disable, outputs held low), Default Enable Description SDRAM (Active/Inactive) SDRAM (Active/Inactive) SDRAM (Active/Inactive) SDRAM (Active/Inactive) SDRAM (Active/Inactive) SDRAM (Active/Inactive) SDRAM (Active/Inactive) SDRAM (Active/Inactive) Byte SDRAM Active/Inactive Register Enable, Disable, outputs held low), Default Enable Description SDRAM (Active/Inactive) SDRAM (Active/Inactive) Reserved, power Reserved, power Reserved, power Reserved, power Reserved, power Reserved, power MDSC-00039-02 SEPTEMBER 1998 QUALITY SEMICONDUCTOR, INC. QS5818 ADVANCE INFORMATION Figure Test Circuit Pulse Generator VOUT 7.0V Parameter Switch Tested Position Closed tPLZ, tPZL Others Coax Oscilloscope Open 30pF Figure Timing Diagram ENABLE DISABLE CONTROL INPUT OUTPUT NORMALLY tPZL SWITCH CLOSED tPZH 0.5VCC 0.5VCC tPLZ 0.3V tPHZ 0.3V 1.5V 3.5V INPUT OUTPUT NORMALLY HIGH SWITCH OPEN Enable Disable Times 1.5V tPLH OUTPUT tPHL 2.0V 0.5VCC 0.8V OUTPUT tPLH tPHL INPUT 1.5V 0.5VCC Propagation Delay Pulse Skew tSK(p) QUALITY SEMICONDUCTOR, INC. MDSC-00039-02 SEPTEMBER 1998 QS5818 ADVANCE INFORMATION Figure Ordering Information Clock Management Product Prefix (QS5) Part Number Package (300-mil SSOP) Figure Packaging Information 300-mil SSOP Package Code Shrink Small Outline Package Plastic Small Outline Gull-Wing Notes: Refer applicable symbol list. dimensions inches. number lead positions. Dimensions measured maximum material condition include mold flash. Allowable mold flash 0.006in. side. Lead coplanarity 0.004in. maximum. SEATING PLANE DWG# Symbol MO-118AA PSS-48B 0.102 0.012 0.010 0.008 0.625 0.295 0.025 0.410 0.030 0.025 JEDEC# MO-118AB PSS-56B 0.110 0.116 0.0135 0.010 0.630 0.299 0.420 0.040 0.028 0.095 0.008 0.008 0.005 0.720 0.291 0.395 0.020 0.022 0.102 0.012 0.010 0.008 0.725 0.295 0.025 0.410 0.030 0.025 0.028 0.420 0.040 0.110 0.016 0.0135 0.010 0.730 0.299 0.095 0.008 0.008 0.005 0.620 0.291 0.395 0.020 0.022 MDSC-00039-02 SEPTEMBER 1998 QUALITY SEMICONDUCTOR, INC. Other recent searchesVSP2212 - VSP2212 VSP2212 Datasheet VKA100MS05 - VKA100MS05 VKA100MS05 Datasheet VKA100MS05-1 - VKA100MS05-1 VKA100MS05-1 Datasheet TRS-5140G - TRS-5140G TRS-5140G Datasheet PGA370 - PGA370 PGA370 Datasheet PAN802154 - PAN802154 PAN802154 Datasheet PAN4555 - PAN4555 PAN4555 Datasheet CSTS0800MG03 - CSTS0800MG03 CSTS0800MG03 Datasheet AVR222 - AVR222 AVR222 Datasheet A264B - A264B A264B Datasheet
Privacy Policy | Disclaimer |