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QUALITY SEMICONDUCTOR, INC. Guaranteed Skew CMOS Clock Driver/Buf
Top Searches for this datasheetQS5807, QS52807 QUALITY SEMICONDUCTOR, INC. Guaranteed Skew CMOS Clock Driver/Buffer DESCRIPTION QS5807 QS52807 outputs Rail-to-rail output voltage swing on-chip resistors available noise Input hysteresis better noise margin Guaranteed skew 0.3ns same transition 0.6ns opposite transition 1.0ns different devices Industrial temperature range Available QSOP SOIC (SO) Figure Functional Block Diagram QS5807 clock driver/buffer circuits used clock buffering schemes where skew parameter. QS5807 offers noninverting outputs. Designed QSI's proprietary QCMOS process, these devices provide propagation delay buffering with on-chip skew 0.3ns same-transition signals. QS52807 onchip series termination resistors lower noise clock signals. QS52807 series resistor version recommended driving unterminated lines with capacitive loading other noise sensitive clock distribution circuits. These clock buffer products designed highperformance workstations, embedded personal computing systems. Several devices used parallel scattered throughout system guaranteed skew, system-wide clock distribution networks. Rail-to-rail output swing improves noise margin allows easy interface with CMOS inputs. Application Note AN-21 more information low-skew clock buffers. MDSC-00024-01 OCTOBER 1998 QUALITY SEMICONDUCTOR, INC. QS5807, 52807 Figure Configurations (All Pins View) QS5807, QS52807 QSOP, SOIC Table Description Name Description Clock Input Clock Outputs Table Absolute Maximum Ratings Supply Voltage Ground -0.5V 7.0V Output Voltage VOUT -0.5V 7.0V Input Voltage -0.5V 7.0V Input Voltage (for pulse width 20ns) -3.0V Input Diode Current with -20mA Output Current Max. Sink Current/Pin 120mA Maximum Power Dissipation TA=85°C, QSOP 0.82 watts SOIC 0.75 watts TSTG Storage Temperature -65° 150°C Note: Stresses greater than those listed under absolute maximum ratings cause permanent damage devices that result functional reliability type failures. Table Capacitance 25°C, 1MHz, QSOP Pins SOIC Unit Note: Capacitance characterized tested. QUALITY SEMICONDUCTOR, INC. MDSC-00024-01 OCTOBER 1998 QS5807, QS52807 Table Electrical Characteristics Over Operating Range Industrial: -40°C 85°C, 5.0V ±10%, -0.2V, 0.2V Symbol Parameter Input HIGH Voltage Input Voltage Clamp Diode Voltage Output HIGH Voltage QS5807 Test Conditions Guaranteed Logic HIGH Inputs Guaranteed Logic Inputs Min., -18mA(3) Typ(1) -0.7 Unit -1.2 0.55 0.50 Min.,VIN VIL,IOH -300µA -15mA -24mA Min.,VIN VIL,IOH -12mA 24mA Min.,VIN VIL,IOL 300µA 64mA Min.,VIN VIL,IOL 12mA Max., VOUT VTLH VTHL Inputs Min., 12mA ROUT Output HIGH Voltage QS52807 Output Voltage QS5807 Output Voltage QS52807 Input Leakage Current Short Circuit Current(2,3) Input Hysteresis Output Resistance(4) QS52807 Notes: Typical values indicate 5.0V 25°C. more than output should used test this high power condition duration second. Guaranteed design tested. Output resistance represents total output impedance logic device includes added series termination resistance. MDSC-00024-01 OCTOBER 1998 QUALITY SEMICONDUCTOR, INC. QS5807, 52807 Table Power Supply Characteristics Industrial: -40°C 85°C, 5.0V ±10% Symbol Parameter ICCD Quiescent Power Supply Current Supply Current Input HIGH Dynamic Power Supply Current Output(1) Total Power Supply Current Examples(2) Test Conditions Max.,VIN Max., 3.4V Input toggling duty cycle Max., outputs enbled Max., Input duty cycle, 10MHz Max., Input duty cycle, 2.5MHz Notes: Guaranteed characterization tested. (ICC)(DH)(NT) ICCD (fO)(NO) where: Input duty cycle Number HIGH inputs Output frequency Number outputs 0.005 0.12 3.0V 3.0V 12.0 12.0 21.0 Unit Table Switching Characteristics Over Operating Range Industrial: -40°C 85°C, 5.0V ±10% QS5807, CLOAD 50pF, RLOAD 500. QS52807, CLOAD 50pF resistor) Symbol Description(1) tSK(O1) tSK(p) Skew between outputs same transition Pulse Skew: Skew between opposite transitions same output (tPHL-tPLH) Part-to-part skew(2) Propagation Delay 0.35 Unit tSK(t) tPLH tPHL Output Rise/Fall Time, 0.8V-2.0V 0.2VCC-0.8VCC Notes: Skew parameters guaranteed characterization tested. Test Circuit Waveforms. Minimums guaranteed tested. Timing parameters measured 0.5VCC. tSK(t) only applies devices same transition, same part type, same temperature, power supply voltage, loading, package speed grade. propagation delay range indicated Min. Max. specifications results from process environmental variables. These propagation delay limits imply skew. QUALITY SEMICONDUCTOR, INC. MDSC-00024-01 OCTOBER 1998 QS5807, QS52807 Figure Test Circuits Waveforms Pulse Generator VOUT 50pF Pulse generator pulses: 1.0MHz; 2.5ns; 2.5ns Test Circuit INPUT tPLH OUPUT tPHL 2.0V 0.5VCC 0.8V OUPUT INPUT 1.5V tPLH INPUT tPHL 1.5V 0.5VCC tSK(p) |tPHL tPLHL| Pulse Skew tSK(p) Propagation Delay INPUT tPHL1 tSK(O1) tSK(O1) tPLH2 tPHL2 1.5V 1.5V tPLH1 tPHL1 tPLH1 OUPUT 0.5VCC PART OUTPUT tSK(t) 0.5VCC tSK(t) 0.5VCC tPLH2 tPHL2 0.5VCC OUPUT PART OUTPUT tSK(O1) |tPLH2 tPLH1| |tPHL2 tPHL1| tsk(t) |tPLH2 tPLH1| |tPHL2 tPHL1| Output Skew tSK(O1) Part-to-Part Skew tSK(t) MDSC-00024-01 OCTOBER 1998 QUALITY SEMICONDUCTOR, INC. QS5807, 52807 ORDERING INFORMATION Example: QS52807AClock Management Product Prefix (QS5) Resistor Option (blank) Part Number Package (150 wide QSOP) (300 wide SOIC) Speed (blank) QUALITY SEMICONDUCTOR, INC. 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