The Datasheet Archive - 100 Million Datasheets from 7500 Manufacturers.    


Datasheet Search Engine   
 
Part # or Description: • 5V RS232 Driver • 2SC5066* • "Real Time Clock" • "USB connector" • "blue led" 5mm • 10 watt zener diode • 2N3055* motorola
 
Search Tip: Try entering the part number only. Include a wildcard (eg. lm317* or 1n4148*)

 

 

Mapping Controller Operating voltage: 2.7V~5.2V Built-in oscillat


Datasheet Thumbnail

  

Download PDF



Top Searches for this datasheet



HT1623
Mapping Controller
Operating voltage: 2.7V~5.2V Built-in oscillator External 32.768kHz crystal 32kHz frequency source input Standby current bias, duty, frame frequency 64Hz Max. patterns, commons, segments Built-in internal resistor type bias generator 3-wire serial interface kinds time base selection Time base overflow output
Built-in display address auto increment selection buzzer frequencies (2kHz/4kHz) Power down command reduces power consumption Software configuration feature Data mode Command mode instructions Three data accessing modes VLCD adjust operating voltage Cascade application
General Description
HT1623 peripheral device specially designed type used expand display capability. max. display segment device patterns also supports serial interface, buzzer sound, watchdog timer time base timer functions. HT1623 memory mapping multi-function controller. software configuration feature HT1623 make suitable multiple applications including modules display subsystems. Only three lines required interface between host controller HT1623. HT162X series have many kinds products that match various applications.
Selection Table
HT162X Built-in Osc. Crystal Osc.
HT1620 HT1621 HT1622 HT16220 HT1623 HT1625 HT1626 HT1627 HT16270
27th
HT1623
Block Diagram
Assignment
27th
HT1623
Assignment
Chip size: (mil)2 substrate should connected layout artwork.
27th
HT1623
Coordinates
Unit:
-82.45 -82.45 -82.45 -83.21 -83.21 -83.21 -83.21 -83.21 -83.21 -83.21 -83.21 -83.21 -83.21 -83.21 -83.21 -83.21 -83.21 -82.88 -72.50 -65.88 -59.24 -52.62 -45.73 -33.32 -26.69 -14.28 -7.65 4.76 11.39 23.80 30.43 42.84 49.47 61.88 68.51 80.92
79.35 67.02 60.39 46.71 32.30 25.20 18.57 11.94 5.31 -4.84 -16.66 -29.92 -41.74 -48.37 -54.99 -61.63 -68.25 -78.96 -79.99 -79.99 -79.99 -79.99 -79.22 -79.22 -79.22 -79.22 -79.22 -79.22 -79.22 -79.22 -79.22 -79.22 -79.22 -79.22 -79.22 -79.22
82.83 82.83 82.83 82.83 82.83 82.83 82.83 82.83 82.83 82.83 82.83 82.83 82.83 82.83 82.83 82.83 82.83 82.83 82.83 27.03 20.40 13.77 7.14 0.51 -6.12 -12.75 -19.38 -26.01 -32.64 -39.27 -45.90 -52.53 -59.16 -65.79 -72.42
-52.44 -35.23 -28.60 -21.97 -15.34 -8.71 -2.08 4.55 11.18 17.81 24.44 31.07 37.70 44.33 50.96 57.59 64.22 70.85 77.48 79.35 79.35 79.35 79.35 79.35 79.35 79.35 79.35 79.35 79.35 79.35 79.35 79.35 79.35 79.35 79.35
27th
HT1623
Description
Name Description
Chip selection input with pull-high resistor. When logic high, data command read from written HT1623 disabled. serial interface circuit also reset logic level input pad, data command transmission between host controller HT1623 enabled. READ clock input with pull-high resistor. Data HT1623 clocked rising edge signal. clocked data will appear data line. host controller next falling edge latch clocked data. WRITE clock input with pull-high resistor. Data DATA line latched into HT1623 rising edge signal.
13~15 16~23 24~71
DATA OSCI OSCO VLCD T1~T3 COM0~COM7 SEG0~SEG47
Serial data input/output with pull-high resistor Negative power supply, Ground OSCI OSCO pads connected 32.768kHz crystal order generate system clock. system clock comes from external clock source, external clock source should connected OSCI pad. on-chip oscillator selected instead, OSCI OSCO pads left open. Positive power supply operating voltage input pad. Time base watchdog timer overflow flag, NMOS open drain output 2kHz 4kHz tone frequency output pair connected common outputs segment outputs
Absolute Maximum Ratings*
Supply Voltage .-0.3V 5.5V Input Voltage. VSS-0.3V VDD+0.3V Storage Temperature. -50°C 125°C Operating Temperature. -25°C 75°C
*Note: These stress ratings only. Stresses exceeding range specified under "Absolute Maximum Ratings" cause substantial damage device. Functional operation this device other conditions beyond those listed specification implied prolonged exposure extreme conditions affect device reliability.
27th
HT1623
D.C. Characteristics
Symbol
IDD1 IDD2 IDD11 IDD22 ISTB IOL1 IOH1 IOL1 IOH1 IOL2 IOH2 IOL3 IOH3 Ta=25°C
Parameter
Operating Voltage Operating Current Operating Current Operating Current Operating Current Standby Current Input Voltage Input High Voltage DATA DATA Common Sink Current Common Source Current Segment Sink Current
Test Conditions
Conditions
load/LCD On-chip oscillator load/LCD External clock source load/LCD On-chip oscillator load/LCD External clock source load Power down mode DATA, DATA, VOL=0.3V VOL=0.5V VOH=2.7V VOH=4.5V VOL=0.3V VOL=0.5V VOH=2.7V VOH=4.5V VOL=0.3V VOL=0.5V VOH=2.7V VOH=4.5V VOL=0.3V VOL=0.5V VOH=2.7V VOH=4.5V DATA,
Min. Typ. Max. Unit
-0.9 -1.7 -0.9 -1.7 -1.8 -1.8 -180 -140
Segment Source Current Pull-high Resistor
27th
HT1623
A.C. Characteristics
Symbol Parameter
fSYS1 System Clock System Clock Frame Frequency Frame Frequency Common Period Serial Data Clock Pin) Serial Data Clock Pin) Serial Interface Reset Pulse Width (Figure tCLK Input Pulse Width (Figure Rise/Fall Time Serial Data Clock Width (Figure Setup Time DATA Clock Width (Figure Hold Time DATA Clock Width (Figure Setup Time Clock Width (Figure Hold Time Clock Width (Figure Write mode Read mode Write mode Read mode Duty cycle Number Duty cycle External clock source On-chip oscillator External clock source Ta=25°C
Test Conditions Conditions
On-chip oscillator
Min.
3.34 6.67 1.67 3.34
Typ.
n/fLCD
Max. Unit
fSYS2
fLCD1
fLCD2 tCOM fCLK1
fCLK2
tsu1
27th
HT1623
Figure
Figure
Figure
Functional Description
Display memory structure Time base watchdog timer (WDT)
static display organized into bits stores display data. contents directly mapped contents driver. Data accessed READ, WRITE READ-MODIFY-WRITE commands. following mapping from patterns.
time base generator share same divided (/256) counter. TIMER DIS/EN/CLR, DIS/EN/CLR EN/DIS independent from each other. Once timeout occurs, will remain logic level until command issued.
mapping
27th
HT1623
Timer configurations external clock selected source system frequency, command turns invalid power down mode fails carried until external clock source removed.
Buzzer tone output
following data mode command mode
Operation
READ WRITE READ-MODIFY-WRITE COMMAND
Mode
Data Data Data
simple tone generator implemented HT1623. tone generator output pair differential driving signals which used generate single tone.
Command format
Command
HT1623 configured software setting. There mode commands configure HT1623 resource transfer display data.
successive commands have been issued, command mode omitted. While system operating non-successive command non-successive address data mode, should previous operation mode will reset also. returns "0", operation mode should issued first.
Name
TONE TONE TONE
Command Code
0000-1000-X 010X-XXXX-X 0110-XXXX-X Turn-off tone output
Function
Turn-on tone output, tone frequency 4kHz Turn-on tone output, tone frequency 2kHz
27th
HT1623
Timing Diagrams
READ mode (command code
READ mdoe (successive address reading)
27th
HT1623
WRITE mode (command code
WRITE mode (successive address writing)
27th
HT1623
READ-MODIFY-WRITE mode (command code
READ-MODIFY-WRITE mode (successive address accessing)
27th
HT1623
Command mode (command code
Mode (data command mode)
27th
HT1623
Application Circuits
Notes: connection selected depending requirement voltage applied VLCD must lower than VDD. Adjust display, VDD=5V, VLCD=4V, VR=15k±20%. Adjust (external pull-high resistance) user's time base clock.
27th
HT1623
Command Summary
Name
READ WRITE READMODIFYWRITE TIMER TIMER TONE TIMER (XTAL) TONE TONE
Command Code
Function
Read data from Write data Read Write data Turn both system oscillator bias generator Turn system oscillator Turn display Turn display Disable time base output
Def.
A6A5A4A3A2A1A0D0D1D2D3 A6A5A4A3A2A1A0D0D1D2D3 A6A5A4A3A2A1A0D0D1D2D3
0000-0000-X 0000-0001-X 0000-0010-X 0000-0011-X 0000-0100-X 0000-0101-X 0000-0110-X 0000-0111-X 0000-1000-X 0000-1101-X 0000-1111-X 0001-10XX-X
Disable time-out flag output Enable time base output Enable time-out flag output Turn tone outputs Clear contents time base generator Clear contents stage System clock source, on-chip oscillator System clock source, external 32kHz clock source crystal oscillator 32.768kHz Tone frequency output: 4kHz Tone frequency output: 2kHz Disable output Enable output Time base clock output: time-out flag after: Time base clock output: time-out flag after: Time base clock output: time-out flag after:
0001-11XX-X 010X-XXXX-X 0110-XXXX-X 100X-0XXX-X 100X-1XXX-X 101X-0000-X 101X-0001-X 101X-0010-X
27th
HT1623
Name
F128 TOPT NORMAL Notes:
Command Code
Function
Time base clock output: time-out flag after: Time base clock output: 16Hz time-out flag after: Time base clock output: 32Hz time-out flag after: Time base clock output: 64Hz time-out flag after: 1/16
Def.
101X-0011-X 101X-0100-X 101X-0101-X 101X-0110-X 101X-0111-X 1110-0000-X 1110-0011-X
Time base clock output: 128Hz time-out flag after: 1/32 Test mode Normal mode
Don't care A6~A0 address D3~D0 data Data/Command mode Def. Power reset default
bold forms, namely mode commands. these, indicates command mode successive commands have been issued, command mode except first command will omitted. source tone frequency time base/WDT clock frequency derived from on-chip 32kHz oscillator, 32.768kHz crystal oscillator, external 32kHz clock. Calculation frequency based system frequency sources stated above. recommended that host controller should initialize HT1623 after power reset, power reset fail, which turn leads malfunctioning HT1623.
27th

Other recent searches


TN1054 - TN1054   TN1054 Datasheet
SN74HC595 - SN74HC595   SN74HC595 Datasheet
SN54HC595 - SN54HC595   SN54HC595 Datasheet
PSC12-11GWA - PSC12-11GWA   PSC12-11GWA Datasheet
PFC6300 - PFC6300   PFC6300 Datasheet
L4931 - L4931   L4931 Datasheet
IDT74CBTLV3862 - IDT74CBTLV3862   IDT74CBTLV3862 Datasheet
3A0055 - 3A0055   3A0055 Datasheet

 

Privacy Policy | Disclaimer
© 2012 Datasheet Archive