H8/3048F Example On-Board Programming Using High-Speed Serial Communic
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H8/3048F H8/3047F On-Board Programming Examples
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F-ZTATMicrocomputer On-Board Programming Application Note User Program Mode Volume
H8/3048F Example On-Board Programming Using High-Speed Serial Communication
guarantee given on-board programming algorithms used this manual, programming times other data. This example intended only reference material that help user's system design process.
Contents
On-Board Programming Specifications Overview Operation Operation Software. Flowcharts Program List Hardware Programming Time
MCU: H8/3048F
On-Board Programming Mode: Boot Mode
Programming Method: Example On-Board Programming Using High-Speed Serial Communication
Specifications
On-board programming mode Boot mode Programming method application program (write data) received from transfer source written flash memory. Serial communication interface (SCI1) used communication with transfer source. transfer format shown below. Transfer format: Asynchronous mode, 8-bit data, stop bit, parity figure transfer rate setting. Hitachi adapter board (HS0008EASF1H/1) used apply disconnect pins, control reset pin.
Transfer source TXD1 RXD1 Flash memory H8/3048F
Adapter board
Figure Sample Configuration On-Board Programming Using Boot Mode
H8/3048F on-board programming procedure Figure shows on-board programming procedure. this programming example, H8/3048F operating frequency used.
Start H8/3048F on-board programming Start boot program
Transfer rate automatic rate adjustment function Receive programming control program from transfer source store on-chip Erase flash memory operation: 4800 bits/s operation: 9600 bits/s Start on-chip programming control program transfer rate high-speed Receive write data from transfer source, write on-chip flash memory operation: 31250 bits/s operation: 62500 bits/s programming
4800 bits/s H8/3048F operation, 9600 bits/s operation.
31250 bits/s H8/3048F operation, 62500 bits/s operation.
Processing executed boot program Processing executed programming control program
Note: Refer H8/3048F Hardware User's Manual details H8/3048F's automatic rate adjustment function.
Figure Example On-Board Programming Using High-Speed Serial Communication
Overview Operation
operation on-board programming using high-speed serial communication outlined below. Normal operation Start application program flash memory.
Transfer source Programming control program application program TXD1 RXD1 Flash memory Starting Application program
H8/3048F Boot program
Figure Normal Operation Boot program start-up Apply pins from adapter board, start boot program.
Transfer source Programming control program application program TXD1 RXD1 Flash memory Application program
H8/3048F Start-up Boot program
Apply pins
Figure Boot Program Start-Up
Programming control program transfer boot program performs automatic rate adjustment processing, determines rate communication with transfer source. Apply pins from adapter board, start boot program.
Transfer source TXD1 RXD1 operation: 4800 bits/s operation: 9600 bits/s Flash memory Application program Programming control program H8/3048F Starting Boot program
application program
pins
Figure Programming Control Program Transfer Flash memory erasing After programming control program received, boot program erases entire flash memory area branches programming control program RAM.
Transfer source TXD1 RXD1 application program Flash memory
H8/3048F Starting Boot program Branch Programming control program
Erased
pins
Figure Flash Memory Erasing
Flash memory programming programming control program makes high-speed setting transfer rate, writes application program flash memory.
Transfer source TXD1 RXD1 operation: 31250 bits/s operation: 62500 bits/s Flash memory application program Starting Programming control program
H8/3048F Boot program
pins
Figure Flash Memory Programming Application program start-up Disconnect supply H8/3048F's pins, start application program flash memory.
Transfer source TXD1 RXD1 Flash memory Start-up application program
H8/3048F Boot program
Disconnect pins
Figure Application Program Start-Up
Operation
Communication between H8/3048F transfer source on-board programming
Item Transfer Source Processing
Apply from adapter board After Boot mode start-up After High-level output Boot program start-up transfer rate 9600 bits/s Transmit H'00 times succession 4800 bits/s H'00 received? Transmit H'55 Receive H'AA Transmit programming control program byte count Transmit byte count bytes, upper lower Transmit data receive data? Upper byte, lower byte Echo-back Receive byte count Echo-back received byte count sequentially, byte byte Transfer received program on-chip area Echo-back received program sequentially, byte byte
"H'00""H'00""H'00""H'00""H'00"
Communication
H8/3048F Processing
Low-level output applied pins
Application program executing
Automatic rate adjustment processing*1
Automatic rate adjustment
"H'00"
Transmit adjustment processing indication
"H'55" "H'AA"
Receive H'55 Transmit H'AA
programming Programming Transmit programming control control program, byte byte program transfer Transmit data receive data? programming transmission? flash memory erase
"H'XX"
Echo-back
reception?
flash memory erase
Notes: 4800 bits/s operation, 9600 bits/s operation. on-chip area which programming control program transferred H'FF300 H'FFEFF mode H'FFF300 H'FFFEFF mode
Figure Communication On-Board Programming
Item
Transfer Source Processing
Communication
H8/3048F Processing
Erase entire flash memory area Erase ended normally?
Flash memory Boot program erase error erase programming Receive H'AA
"H'FF"
Transmit H'FF
"H'AA"
Transmit H'AA Branch on-chip programming control program Start programming control program
Transmit current rate 9600 bits/s: Transmit H'60 4800 bits/s: Transmit H'30
"H'60" "H'30"
Receive rate information Calculate H8/3048F's operating frequency
High-speed rate setting
Receive operating frequency
"H'04" "H'10"
Transmit operating frequency operation: Transmit H'04 operation: Transmit H'10 high transfer rate operation: 62500 bits/s operation: 31250 bits/s flash memory programming
high transfer rate H'10 received: 62500 bits/s H'04 received: 31250 bits/s
flash memory programming
Notes: operating frequency calculated from value H8/3048F's rate register (BRR1) determined automatic rate adjustment, rate information from transfer source. this on-board programming example, following equations used calculate operating frequency: Thus, 10-2) rate information from transfer source (set 9600 (bits/s) when H'60 received rate information, 4800 (bits/s) when H'30 received) BRR1 value determined automatic rate adjustment Operating frequency (MHz) 22n-1
Figure Communication On-Board Programming (cont)
Item
Transfer Source Processing
Transmit application program byte count Transmit byte count most significant byte, upper byte, lower byte Transmit data receive data? programming Transmit application program, byte byte
Communication
H8/3048F Processing
Most significant byte, upper byte, lower byte Echo-back
Receive byte count Echo-back received byte count sequentially, byte byte
"H'XX"
Write receive data flash memory Normal write?
Flash memory programming
Receive data Echo-back Transmit data receive data? programming
Transmit receive data Echo-back receive data
reception?
transmission?
programming After programming After
Low-level output Disconnect pins High-level output
programming
Start application program flash memory
Notes: byte count application program transferred bytes, most significant, upper, lower. Example: number bytes H'10000, this transmitted H'01 (most significant), H'00 (upper), H'00 (lower), that order.
Figure Communication On-Board Programming (cont)
Software
Hierarchical structure programming control program Figure shows hierarchical structure program/erase control program executed on-chip RAM.
_MAIN _Sci1_int _Input_data _Clock_fin _Output_data _Brr_set _Count_set _Bytet_set _Input_data _Output_data _Sci1_int
_FWgo
_Input_data _Output_data _Fwrite
Figure Hierarchical Structure Programming Control Program
Modules Table summarizes modules comprising programming control program. Table Programming Control Program Modules
Argument(s) Module Name _MAIN Register (Data Length) Return Value Register (Data Length) Function Assignment Main routine programming control program Initializes Sets transfer rate 38400 bits/s operation) 31250 bits/s operation) Receives byte data from transfer source Transmits byte data transfer source Calculates operating frequency from rate information Calculates software timer counter value Receives application program byte count from transfer source Writes write data flash memory Writes byte write data flash memory
Description
Description
_Sci1_int _Brr_set
BRR1 value Operating frequency
(byte) (byte)
_Input_data
Transmit data
(byte)
_Output_data
Receive data Operating frequency
(byte)
_Clock_fin
rate information
(byte)
(byte)
_Count_set _Byte_set
Operating frequency
(byte)
Application program byte count Normal write: Write error:
(long)
_FWgo _Fwrite
Write destination address Write data
_Waddress (longword) _Wdata (byte)
_Wcode (byte)
Note: On-chip used storage area arguments return values.
used Table shows on-chip used programming control program storage areas arguments return values, work areas. Table
Label _VPPE_cnt _Program_cnt
Used
Function Stores VPPE setup time (software timer counter value) Stores programming time setting software timer counter value) Stores program-verify time setup software timer counter value) Stores write destination address Stores write data Stores write error, normal write Data Length Word Word Relevant Modules _Count_set _FWgo _Count_set _Fwrite _Count_set _Fwrite _FWgo, Fwrite _FWgo, _Fwrite _FWgo, _Fwrite
_Verify_cnt
Word
_Waddress _Wdata _Wcode
Longword Byte Byte
Programming Control Program Flowcharts
_MAIN
Initialize stack pointer
Read rate register (BRR1) value determined automatic rate adjustment
_Sci_int (Initialize channel
_Input_data (Receive rate information)
_Ciock_fin (Calculate operating frequency)
_Output_data (Transmit operating frequency)
_Brr_set (Set rate high-speed)
_Count_set (Calculate programming time)
_Byte_set (Receive application program transfer byte count)
_FWgo (Start flash memory write)
_Sci_int
channel transfer rate
Enable channel transmit/receive operation
_Input_data
_Output_data
Receive data byte from transfer source
Transmit data byte transfer source
_Brr_set
Operating frequency MHz? transfer rate 31250 bits/s
transfer rate 62500 bits/s
_Sci_int
_Clock_fin
rate information received from transfer source BRR1 value determined automatic rate adjustment
ER2÷10000
operating frequency
_Count_set
Calculate VPPE setup time: software timer counter value
Calculate programming time setting time): software timer counter value Calculate program-verify time setup time): software timer counter value
Additional Information equations calculating various software timer counter values shown below.
VPPE setup time: ((Operating frequency _VPPE_cnt Programming time: ((Operating frequency _Program_cnt Program-verify time: ((Operating frequency _Verify_cnt
_Byte_set
_Input _data Receive application program byte count most significant byte
_Output_data Echo-back receive data transfer source
_Input_data Receive application program byte count upper byte
_Output_data Echo-back receive data transfer source
_Input_data Receive application program byte count lower byte
_Output_data Echo-back receive data transfer source
_FWgo
initial value write destination address H'00000
Byte count
_Input_data Receive byte application program _Fwrite Write application program byte flash memory
Write error? (_Wcode
_Output_data Transmit write error code
Byte count byte count
Write destination address write destination address
_Output_data Echo-back application program transfer source
_Fwritet Wcode VPPE (VPPE FLMCR) Wait erase block registers (H'FFEBR1, H'FFEBR2) Write data flash memory (Write contents _Wdata address indicated _Waddress) Programming time initial value Enable watchdog timer (#H'A579 @TCSR) program mode FLMCR Wait Clear Disable watchdog timer (#H'A500 @TCSR) program-verify mode FLMCR Wait least Verify (read memory) Clear 1Wcode (write error) Clear erase block registers (H'FFEBR1, H'FFEBR2) Clear VPPE N+1n Double programming time Notes: byte transfer instruction write write data. Programming time progressively increased initial value 2n-1 initial value 15.8 less must therefore provide total programming time timer overflow setting CKS2 CKS1 CKS0 byte transfer instruction verify memory reads.
Clear
Program List
;Sample programming control program ;<On-board programming using high-speed serial communication> ;Program mode: boot mode .CPU 300HA ;SCI SMR1 .EQU H'FFFFB8 BRR1 .EQU H'FFFFB9 SCR1 .EQU H'FFFFBA TDR1 .EQU H'FFFFBB SSR1 .EQU H'FFFFBC RDR1 .EQU H'FFFFBD ;FLASH FLMCR .EQU H'FFFF40 EBR1 .EQU H'FFFF42 EBR2 .EQU H'FFFF43 TCSR .EQU H'FFFFA8 ;Bit rate .EQU ;62500 bit/s operation) .EQU ;31250 bit/s operation) .SECTION FLASH,CODE,LOCATE=H'FFF300 ;Main routine _MAIN .EQU MOV.L #H'FFF300,ER7 ;Stack pointer initialization MOV.B @BRR1,R1L ;Value determined automatic rate adjustment _Sci1_int _Input_data ;Receive rate information MOV.B R3L,R1L ;Bit rate information _Clock_fin ;Calculate operating frequency MOV.B R2L,R3L _Output_data ;Transmit operating frequency _MAIN_0 .EQU BTST.B #2,@SSR1 ;Operating frequency transmission finished? _MAIN_0 _Brr_set ;Set rate high-speed _Count_set ;Calculate software timer counter value _Byte_set ;Receive application program transfer byte count _FWgo LOOP LOOP ;Start writing on-chip flash memory ;Argument: application program byte count ;Return value: none _FWgo .EQU SUB.L ER2,ER2 ;Set first write destination address address _Next_add .EQU MOV.L ER6,ER6 ;ER6=0? _FW_end _Input_data ;Receive write data
00FFFFB8 00FFFFB9 00FFFFBA 00FFFFBB 00FFFFBC 00FFFFBD 00FFFF40 00FFFF42 00FFFF43 00FFFFA8 00000007 00000003 FFF300
FFF300 FFF306 FFF308 FFF30C FFF310 FFF312 FFF316 FFF318
00FFF300 7A0700FFF300 29B9 5C000188 5C000198 0CB9 5C0001AE 0CAB 5C00019A
00FFF31C FFF31C 7EBC7320 FFF320 47FA FFF322 FFF326 FFF32A FFF32E FFF332 5C00015A 5C0000F0 5C00012E 5C000002 40FE
00FFF334 FFF334 1AA2 00FFF336 FFF336 0FE6 FFF338 58700030 FFF33C 5C000168
6AAB00FFF4E4 01006BA200FFF4E0 5C00001C 6A2D00FFF4E5 5860000A 1B76 0B72 5C000152 40D0 00FFF366 FFF366 8B01 FFF368 5C00014A 00FFF36C FFF36C 5470
FFF340 FFF346 FFF34E FFF352 FFF358 FFF35C FFF35E FFF360 FFF364
FFF36E FFF370 FFF372 FFF376 FFF378 FFF37A
00FFF36E 6DF0 6DF1 01006DF2 6DF3 6DF4 6DF5
FFF37C 1888 FFF37E 6AA800FFF4E5 FFF384 79044140 FFF388 6B2100FFF4DA FFF38E 3C40 00FFF390 FFF390 1B51 FFF392 0D11 FFF394 46FA FFF396 01006B2200FFF4E0 FFF39E 6A2B00FFF4E4 FFF3A4 FFF3A8 FFF3AC FFF3AE FFF3B0 7901FFFF 6B81FF42 F801 68AB 6B2500FFF4DC 00FFF3B6 7901A579 6B81FFA8 0D51 3440
FFF3B6 FFF3BA FFF3BE FFF3C0
MOV.B R3L,@_Wdata MOV.L ER2,@_Waddress _Fwrite MOV.B @_Wcode,R5L _FW_NG_end @_Wcode write error DEC.L #1,ER6 ;Byte count INC.L #1,ER2 ;Write destination address _Output_data ;Echo-back transfer source _Next_add ;Next address write _FW_NG_end .EQU ADD.B #1,R3L ;Write data _Output_data ;Transmit transfer source _FW_end .EQU ;Write data byte flash memory ;Arguments: :Write destination address @_Waddress :Write data @_Wdata ;Return value: Write error @_Wcode Normal write @_Wcode _Fwrite .EQU PUSH.W ;Save general registers PUSH.W PUSH.L PUSH.W PUSH.W PUSH.W SUB.B MOV.B MOV.W MOV.W MOV.B _WVPPE .EQU DEC.W MOV.W MOV.L MOV.B MOV.W MOV.W MOV.B MOV.B MOV.W _PRetry .EQU MOV.W MOV.W MOV.W MOV.B R0L,R0L R0L,@_Wcode #H'4140,R4 @_VPPE_cnt,R1 R4L,@FLMCR #1,R1 R1,R1 _WVPPE @_Waddress,ER2 @_Wdata,R3L ;Clear ;Clear _Wcode ;R4H setting, clearing ;Set VPPE loop counter ;Set VPPE
;Wait: 5-10
;Set write destination address ;Set write data
#H'FFFF,R1 R1,@EBR1 ;Set EBR1/EBR2 #1,R0L ;Set program-verify file counter R3L,@ER2 ;Write data flash memory (dummy write) @_Program_cnt,R5;Initialize write loop counter #H'A579,R1 R1,@TCSR R5,R1 R4H,@FLMCR
;Start watchdog timer ;Set write loop counter ;Set
00FFF3C2 FFF3C2 1B51 FFF3C4 0D11 FFF3C6 46FA FFF3C8 3C40 FFF3CA 7901A500 FFF3CE 6B81FFA8 FFF3D2 6B2100FFF4DE FFF3D8 F044 FFF3DA 3040 00FFF3DC FFF3DC 1B51 FFF3DE 0D11 FFF3E0 46FA FFF3E2 FFF3E4 FFF3E6 FFF3EA FFF3EC FFF3EE FFF3F2 FFF3F4 FFF3F6 6823 1C3B 58700016 3C40 A806 58700006 0A08 1015 40BE
00FFF3F8 FFF3F8 F001 FFF3FA 6AA000FFF4E5 00FFF400 FFF400 3C40 FFF402 1911 FFF404 6B81FF42 FFF408 3940 FFF40A FFF40C FFF40E FFF410 FFF414 FFF416 FFF418 6D75 6D74 6D73 01006D72 6D71 6D70 5470
00FFF41A
FFF41A FFF41E FFF422 FFF424 FFF426 FFF428
79000006 01C050A0 FC0A 51C0 8801 1750
_Program DEC.W MOV.W MOV.B MOV.W MOV.W
.EQU #1,R1 R1,R1 _Program R4L,@FLMCR #H'A500,R1 R1,@TCSR
;Wait: 120, 240,
;Clear ;Stop watchdog timer ;Set program-verify loop count ;Set ;Wait:
MOV.W @_Verfiy_cnt,R1 MOV.B #H'44,R0H MOV.B R0H,@FLMCR _Pverify .EQU DEC.W #1,R1 MOV.W R1,R1 _Pverify MOV.B CMP.B MOV.B CMP.B INC.B SHLL.W @ER2,R3H R3H,R3L _Write_OK R4L,@FLMCR #06,R0L _Write_NG _PRetry
;Read write address ;Read data write data? ;Program-verify decision ;Clear ;Program-verify executed times? executed times, _Write_NG ;Double write loop count ;Rewrite processing
_Write_NG .EQU ;Write error determined MOV.B #1,R0H MOV.B R0H,@_Wcode ;Set -Wcode _Write_OK .EQU MOV.B R4L,@FLMCR SUB.W R1,R1 MOV.W R1,@EBR1 ;Clear EBR1/EBR2 MOV.B R1L,@FLMCR ;Clear VPPE POP.W ;Save general registers POP.W POP.W POP.L POP.W POP.W ;Calculate software timer counter value ;Argument: operating frequency ;Return value: none _Count_set .EQU ;Software timer counter value when VPPE ;5us MOV.W #D'6,R0 MULXS.B R2L,R0 MOV.B #D'10,R4L DIVXU.B R4L,R0 ADD.B #1,R0L EXTU.W
FFF42A 6BA000FFF4DA
FFF430 FFF434 FFF438 FFF43A FFF43C FFF43E
79000013 01C050A0 FC0A 51C0 1750 6BA000FFF4DC
FFF444 FFF448 FFF44C FFF44E FFF450 FFF452 FFF454 FFF45A
79000005 01C050A0 FC0A 51C0 8801 1750 6BA000FFF4DE 5470
FFF45C FFF45E FFF462 FFF464 FFF466 FFF46A FFF46E FFF470 FFF474 FFF478 FFF47A FFF47E
00FFF45C 1AE6 5C000046 1753 0D3E 5C00004C 5C00003A 0CB6 5C000042 5C000030 0CBE 5C000038 5470
00FFF480 AA10 58600006 F907 58000002 00FFF48C FFF48C F903 00FFF48E FFF48E 5C000002 FFF492 5470 FFF480 FFF482 FFF486 FFF488
MOV.W R0,@_VPPE_cnt ;Software timer counter value when writing ;15us MOV.W #D'19,R0 MULXS.B R2L,R0 MOV.B #D'10,R4L DIVXU.B R4L,R0 EXTU.W MOV.W R0,@_Program_cnt ;Software timer counter value program-verify ;4us MOV.W #D'5,R0 MULXS.B R2L,R0 MOV.B #D'10,R4L DIVXU.B R4L,R0 ADD.B #1,R0L EXTU.W MOV.W R0,@_Verfiy_cnt ;Application program transfer byte count reception ;Argument: none ;Return value: transfer byte count _Byte_set .EQU SUB.L ER6,ER6 ;Clear _Input_data EXTU.W MOV.W R3,E6 _Output_data _Input_data MOV.B R3L,R6H _Output_data _Input_data MOV.B R3L,R6L _Output_data ;Set rate high-speed ;Argument: operating frequency ;Return value: none _Brr_set .EQU CMP.B #D'16,R2L ;Operating frequency MHz? _Brr_set0 MOV.B #B62,R1L rate 62500 bits/s _Brr_set1 _Brr_set0 .EQU MOV.B #B31,R1L rate 31250 bits/s _Brr_set1 .EQU _Sci1_int ;Serial initialization routine ;Argument: rate value (BRR value) ;Return value: none
FFF494 FFF496 FFF498 FFF49A FFF49E FFF4A0 FFF4A2 FFF4A4 FFF4A6
00FFF494 1888 38BA 39B9 79000115 00FFF49E 1B50 46FC F830 38BA 5470
FFF4A8 FFF4AC FFF4AE FFF4B0 FFF4B4
00FFF4A8 7EBC7360 47FA 2BBD 7FBC7260 5470
FFF4B6 FFF4BA FFF4BC FFF4BE FFF4C2
00FFF4B6 7EBC7370 47FA 3BBB 7FBC7270 5470
FFF4C4 FFF4C6 FFF4C8 FFF4CA FFF4CC FFF4CE FFF4D0 FFF4D4 FFF4D6 FFF4D8 FFF4DA FFF4DA FFF4DC FFF4DE FFF4E0 FFF4E4 FFF4E5
00FFF4C4 1751 1AA2 2AB9 F820 5081 5212 79012710 5312 8A01 5470 00000002 00000002 00000002 00000004 00000001 00000001
_Sci1_int .EQU SUB.B R0L,R0L ;Clear MOV.B R0L,@SCR1 MOV.B R1L,@BRR1 ;Set rate MOV.W #H'115,R0 _Sci1_wait .EQU DEC.W #1,R0 _Sci1_wait MOV.B #H'30,R0L ;Enable transmit/receive operations MOV.B R0L,@SCR1 ;Receive byte from transfer source ;Argument: none ;Return value: receive data _Input_data .EQU BTST.B #6,@SSR1 _Input_data MOV.B @RDR1,R3L BCLR.B #6,@SSR1 ;Transmit byte transfer source ;Argument: transmit data ;Return value: none _Output_data .EQU BTST.B #7,@SSR1 _Output_data MOV.B R3L,@TDR1 BCLR.B #7,@SSR1 ;Calculate operating frequency ;Argument: rate information received from transfer source ;Return value: operating frequency _Clock_fin .EQU EXTU.W SUB.L ER2,ER2 MOV.B @BRR1,R2L MOV.B #D'32,R0L MULXU.B R0L,R1 MULXU.W R1,ER2 MOV.W #D'10000,R1 DIVXU.W R1,ER2 ;ER2 10000 ADD.B #1,R2L ;R2L .ALIGN _VPPE_cnt .RES.W _Program_cnt .RES.W _Verfiy_cnt .RES.W _Waddress .RES.L _Wdata .RES.B _Wcode .RES.B .END
Hardware
application/disconnection reset signal control timing used this programming example control application disconnection pins, reset signal, on-board programming shown figure timing shown figure implemented means Hitachi adapter board.
12±0.6 VCCV
VCCV 10ms 500ms On-chip flash memory programming processing 10ms 500ms
Figure Application/Disconnection Reset Signal Timing Note: timing specifications application/disconnection, refer Hardware Manual relevant F-ZTAT microcomputer.
Circuit Diagram
1,35,68 11,22,44,57,65,92 H8/3048F Transfer source Application program Programming control program HRP22 Hitachi adapter board VPP/RESO AVCC AVref AVSS HRP22 TXD1 RXD1 STBY
0.01
Crystal oscillator MHz) EXTAL
0.01 1S2076 HC14
Notes: Bypass capacitors (0.01 must connected close pins prevent overshoot when applied.
Figure Circuit Diagram On-Board Programming Using High-Speed Serial Communication
Programming Time
programming time on-board programming using high-speed serial communication explained below. programming times shown below indicate time from activation H8/3048F's boot mode until flash memory program/erase processing. Programming time calculation results results programming time calculations (min., typ., max. values) shown table various processing times shown table calculated basis conditions listed below. equations used calculations shown following page. Operating Conditions H8/3048F: Size transferred programming control program: bytes Size transferred application program: kbytes (131,072 bytes) Erase block: Entire 128-kbyte area transfer rate: Programming control program transfer: 9600 bits/s Application program transfer: 62500 bits/s ±0.6 Table
Item Programming control program transmission time (transfer source H8/3048F) Programming control program echo-back time (H8/3048F transfer source) Erase time entire 128-kbyte area Application program transmission time (transfer source H8/3048F) Application program echo-back time (H8/3048F transfer source) Programming time entire 128-kbyte area Total
Programming Time Calculation Results
Notes Boot program processing time
33.1 19.1 95.2
575.3 132.5 750.8 Programming control program processing time
Unit: Note: boot program algorithm erasing entire 128-kbyte area assumed equivalent attached Sample Multiple-Block Erase Routine, erase times entire 128-kbyte area shown table processing times sample multipleblock erase routine. Sample Multiple-Block Erase Routine erase times details.
Caution: programming time calculation results table guaranteed values, should only used reference values. Programming time measurement result result programming time measurement shown table Measurement Conditions H8/3048F: MHz, 25°C Size transferred application program (write data): kbytes Erase block: Entire 128-kbyte area transfer rate: Programming control program transfer: 9600 bits/s Application program transfer: 62500 bits/s Table
Item Programming time measurement result
Programming Time Measurement Result
Measured Value 56.3 Unit:
Caution: programming time measurement result table guaranteed value, should only used reference value. Equations Programming control program transmission time (transfer source H8/3048F) Size transferred programming control program bytes Total number transfer bits byte bits) 4860 bits Programming control program transmission time 4860 bits 9600 bits/s Programming control program echo-back time (H8/3048F transfer source) programming control program transmission time Application program transmission time (transfer source H8/3048F) Size transferred application program 131072 bytes Total number transfer bits byte bits) 1310720 bits Application program transmission time 1310720 bits 62500 bits/s Application program echo-back time (H8/3048F transfer source) application program transmission time
Programming time entire 128-kbyte area 128-kbyte programming times (min., typ., max. values) shown table programming times shown table processing times _Fwrite routine programming control program. min., typ., max. values times completion programming processing operations byte, where respectively. Table
Item Programming processing operations VPPE setup time (µs) setting total time (µs) Program-verify setup total time (µs) Software processing total time (µs) Software processing total time (µs) 1-byte programming time (µs) 128-kbyte programming time
128-Kbyte Programming Times
10.8 39.1 12.9 10.8 145.7 19.1 25.8 10.8 1010.6 132.5
Software processing Watchdog timer setting, program-verify processing, etc. Software processing Write destination address, write data setting, etc. Equations Number programming processing operations VPPE setup time setting total time 2m-1
Program-verify setup total time Software processing total time Software processing total time 10.8 128-kbyte programming time kbytes
1-byte programming time
F-ZTATMicrocomputer On-Board Programming Application Note User Program Mode Volume
H8/3437F Example On-Board Programming Using
guarantee given on-board programming algorithms used this manual, programming times other data. This example intended only reference material that help user's system design process.
Contents
On-Board Programming Specifications Overview Operation Operation Software. Flowcharts Program List Hardware Programming Time
MCU: H8/3437F
On-Board Programming Mode: User Program Mode
Programming Method: On-Board Programming Using Interface
Specifications
On-board programming mode User program mode Programming method Write data received from transfer source written flash memory. interface used communication with transfer source. transfer format shown below. transfer source designated master, H8/3437F slave (slave address H'70). Transfer format: Acknowledgment mode, addressing format, transfer rate kbits/s FVPP voltage application/disconnection control this example, generation application/disconnection circuitry provided user, Hitachi on-board programming tools used this purpose. application/disconnection FVPP controlled H8/3437F using port (P90). Reset input used application/disconnection.
Transfer source (master) Flash memory
H8/3437F (slave)
power supply Application/ disconnection circuit
FVPP Operating mode mode
Figure Configuration On-Board Programming Using Interface
H8/3437F on-board programming procedure
Start H8/3437F on-board programming
Programming start command received from transfer source? Transfer program/erase control program on-chip flash memory on-chip
Start program/erase control program
Apply FVPP
Erase flash memory erase block
Receive write data (new application program) from transfer source, write flash memory
Disconnect from FVPP
Start application program flash memory
Figure On-Board Programming Procedure Using Interface
Overview Operation
operation on-board programming using interface outlined below. Normal operation Write program/erase control program part application program area flash memory. supply stage application transfer stage beforehand.
H8/3437F (slave) Flash memory Start-up Application program
Transfer source (master) application program
Application/ disconnection circuit FVPP
transfer program Program/ erase control program
Figure Normal Operation Start on-board programming Receive programming start command from transfer source. application program starts transfer program transfers program/erase control program flash memory on-chip RAM.
"Program start" command
Transfer source (master) application program
H8/3437F (slave)
Flash memory Application program transfer program Program/ erase control program Start-up Program/ erase control program Transfer
Application/ disconnection circuit FVPP
Figure Start On-Board Programming
Program/erase control program start-up After transfer ends, transfer program branches program/erase control program.
H8/3437F (slave) Flash memory Start-up Program/ erase control program transfer Branch program Application program Program/ erase control program
Transfer source (master) application program
power supply Application/ disconnection circuit FVPP
Figure Program/Erase Control Program Start-Up application Receive application command from transfer source. program/erase control program controls applies FVPP pin.
application" command
Transfer source (master) application program
H8/3437F (slave) Flash memory Application program Executing Program/ erase control program
Application signal power supply Application/ disconnection circuit FVPP
transfer program Program/ erase control program
Figure Application
Flash memory erasing Receive erase command from transfer source. program/erase control program erases flash memory erase block.
"Erase" command
application program Flash memory Erase Executing transfer program Program/ erase control program power supply FVPP Application/ disconnection circuit Program/ erase control program
Transfer source (master)
H8/3437F (slave)
Figure Flash Memory Erasing
Flash memory programming Receive write command from transfer source. (10) program/erase control program receives application program from transfer source writes flash memory.
Transfer source (master) "Write" command
H8/3437F (slave)
Flash memory (10) application program
Executing Program/ erase control program
power supply Application/ disconnection circuit FVPP
transfer program Program/ erase control program
Figure Flash Memory Programming
disconnection (11) Receive disconnection command from transfer source. (12) program/erase control program controls disconnects supply FVPP pin.
(11) disconnection" command
Transfer source (master)
H8/3437F (slave) Flash memory application program Executing Program/ erase control program
(12) Disconnection signal
FVPP
transfer program Program/ erase control program
power supply Application/ disconnection circuit
Figure Disconnection application program start-up (13) program/erase control program branches application program flash memory.
H8/3437F (slave) Flash memory Start-up application Branch program (13) Program/ erase control transfer program program Program/ erase control program
Transfer source (master)
power supply Application/ disconnection circuit FVPP
Figure Application Program Start-Up
Operation
Communication between H8/3437F transfer source on-board programming Communication interface on-board programming shown below. slave address transmitted transfer source acknowledge transmission receiving station have been omitted.
Item
Transfer Source Processing
Communication
H8/3437F Processing
Application program start-up
Communication operations
Programming start command transmission
W_E_go ("H'55")
Programming start command received? Start transfer program Transfer program/erase control program flash memory on-chip Branch program/erase control program on-chip Program/erase control program start-up
Start onboard programming
code reception application command transmission
("H'00") FVPP_on ("H'88")
code transmission Command reception Received command application command?
Program /erase control program start-up, application
error processing application signal output from (low level) FVPP (FLMCR H'80?)
satisfies spec
Wait until ("H'00")
code reception erase processing
code transmission erase processing
Note: flash memory control register (FLMCR) flag decision level (threshold voltage) 11.4 actually execute programming/erasing until FVPP settled within program voltage range (12.0 ±0.6 this programming example, wait provided software timer before programming/erasing executed after application (after flag settles
Figure Communication On-Board Programming
Item
Transfer Source Processing
Communication
Erase block specificati Erase EBR2 EBR1 "H'77"
H8/3437F Processing
Erase command, erase block specification transmission
Command reception Received command erase command? error processing Prewrite erase block Normal prewrite? error processing Erase erase block
Flash memory erasing
Normal erase? error processing
code reception
("H'00")
code transmission
flash memory programming processing
flash memory programming processing
Note: transfer source transmits H8/3437F erase block register (EBR1, EBR2) values, specifying erase block.
Figure Communication On-Board Programming (cont)
Item
Transfer Source Processing
Communication
Lower byte "H'XX" Upper byte "H'XX"
H8/3437F Processing
Program command, application program byte count (upper byte, lower byte) transmission
Write "H'77"
Command, application program byte count reception Received command write command? error processing Start flash memory programming
Flash memory programming
Application Checksum program Transmission application "H'XX" bytes (binary)
program bytes checksum byte (total bytes)
Transmit request code reception
Request ("H'11")
Application program transmit request code transmission bytes received normally? (Confirmed with checksum) error processing Write application program bytes flash memory Normal write? error processing Application program byte count code reception disconnection processing
code reception
("H'00")
disconnection processing
Notes: application program byte count transmitted transfer source sent upper lower byte, that order. checksum result summing application program bytes, byte byte.
Figure Communication On-Board Programming (cont)
Item
Transfer Source Processing
disconnection command transmission
Communication
FVPP_off ("H'99")
H8/3437F Processing
Command reception Received command disconnection command? error processing disconnection signal output from (high level)
disconnection
FVPP (FLMCR H'FF) code reception programming processing ("H'00") code transmission
Wait (flash memory read setup time) :100 Branch application program flash memory disconnection signal output from
Error
code reception Halt programming processing
("H'01")
code reception
Figure Communication On-Board Programming (cont)
Software
Hierarchical structure user program mode activation program Figure shows hierarchical structure program activation user program mode, executed flash memory (programming start command reception processing that transfers program/erase control program flash memory on-chip RAM).
_MAIN
_IO_INT
_CMD_INPUT
_Trans_to_RAM
_IIC_IRIC
interface interrupt)
Figure Hierarchical Structure User Program Mode Activation Program User program mode activation program modules Table User Program Mode Activation Program Modules
Arguments Register (Data Length) Return Value Register (Data Length) (byte) Function Assignment Main routine Initializes registers Receives data from transfer source Waits reception programming start command Transfers program/ erase control program on-chip
Module Name _MAIN _IO_INT _IIC_IRIC
Description
Description Receive data
_CMD_INPUT
Receive data
(byte)
_Trans_to_RAM
Hierarchical structure user program/erase control program Figure shows hierarchical structure program/erase control program, executed on-chip RAM.
_Flash_W_E
_FVPP_12 _Output_OK _GO_Erase
_IIC_Input _IIC_Output _IIC_Input _Ferase _Prewrite _Everify _Bsearch _Bsearch
_GO_Write
_IIC_Input _Fwrite _Output_Request _IIC_Output
_FVPP_end
_IIC_Input
_Output_NG
_IIC_Output
details these modules, sample H8/3437F one-byte programming/ multiple-block erase routine.
Figure Hierarchical Structure Program/Erase Control Program
Program/erase control program modules Table Program/Erase Control Program Modules
Arguments Register (Data Length) Return Value Register (Data Length) Function Assignment Main routine program/erase control program Applies FVPP Controls flash memory erasing Controls flash memory programming Disconnects from FVPP Transmits data transfer source Receives data from transfer source Transmits transmit request code transfer source Transmits error (NG) code transfer source Transmits normal (OK) code transfer source Writes byte data flash memory
Module Name _Flash_W_E
Description
Description
_FVpp_12V _GO_Erase _GO_Write _FVpp_end _IIC_Input
Receive data byte count Transmit data byte count
(byte) (byte)
Normal: Error: Normal: Error: Normal: Error: Normal: Error:
(byte) (byte) (byte) (byte)
_IIC_Output
_Output_Request
_Output_NG
_Output_OK
_Fwrite
Write destination address Write data
_WAddress (byte) _Wdata (word) _Eblockinf (word)
Normal: Error:
_Wcode (byte)
_Ferase
Erase block specification
Normal: _Ecode Prewrite error: (byte) Erase error:
Erases flash memory
Note: On-chip used storage area _Fwrite _Ferase arguments return values.
used Table shows on-chip used program/erase control program storage areas arguments return values, work areas. Table
Label _Waddress _Wdata _Wcode _Eblockinf _Ecode
Used
Function Stores write destination address (argument) Stores write data (argument) Stores normal write, write error (return value) Specifies erase block (argument) Stores normal erase, prewrite error, erase error (return value) interface transmit/receive data buffer Data Length Word Byte Byte Word Byte Relevant Modules _GO_Write _Fwrite _GO_Write _Fwrite _GO_Write _Fwrite _GO_Erase _Ferase _GO_Erase _Ferase _FVpp_12V _GO_Erase _GO_Write _Output_Request _Output_NG _Output_OK _FVpp_end _IIC_Input _IIC_Output
_DATA_buf
Byte*
Note: program/erase control program reserves 17-byte area on-chip transmit/receive data buffer.
User Program Mode Activation Program Flowcharts
_MAIN
Initialize stack pointer
Clear on-chip
_IO_INT
_CMD_INPUT
_IO_INT
Initialize controlling application/disconnection High-level output normal operation
Initialize Addressing format Transfer rate kbits/s Slave address H'70 Acknowledgment mode
Enable interrupts transmit/receive operations
Clear interrupt mask
_CMD_INPUT
Programming start command (H'55) received means interrupt?
Jump _Trans_to_RAM
_IIC_IRIC interrupt
Slave address recognized?
Data reception Start receiving next data (ICDR dummy read)
_Trans_to_RAM
Disable interrupts
Mask interrupts except
Transfer program/erase control program flash memory (starting address KAKUNOU) on-chip (starting address RAMSTART) Branch program/erase control program
_Flash_W_E Initialize stack pointer _Output_OK _FVPP_12
Error when applied? _Output_OK _Go_Erase
Error during erasing? _Output_OK _Go_Write
Error during programming? _Output_OK _FVPP_end
Error when disconnected? _Output_OK Wait (flash memory read setup time) Read reset vector Branch application program (branch address indicated reset vector)
_Output_NG Abort application (high-level output from P90)
_Output_OK
_Output_NG
code (H'00) transmit data
code (H'01) transmit data
Transmit data byte transfer source (1R0L)
Transmit data byte transfer source (1R0L)
_IIC_Output
_IIC_Output
_Output_Request
request code (H'11) transmit data
Transmit data byte transfer source (1R0L)
_IIC_Output
_FVPP_12 Receive byte data from transfer source (1R0L)
_IIC_Input
Receive data application command? Apply FVPP
Error (1R0L)
FLMCR H'80?
Wait until FVPP spec satisfied wait)
_FVPP_end
Disconnect from FVPP High-level output from
FLMCR H'FF?
_GO_Erase
Receive bytes data from transfer source (3R0L)
_IIC_Input
byte receive data erase command? Specify erase block from bytes receive data (Set Eblockinf)
_Ferase
Error (1R0L)
Normal erase? (Ecode
details this module, sample H8/3437F one-byte programming/multiple-block erase routine.
_GO_Write Receive bytes data from transfer source (3R0L) _llC_Input byte receive data programming command? bytes receive data write data transfer byte count write destination address address (initial value) _Output_Request Receive bytes data from transfer source (17R0L) _llC_Input bytes received write data, byte byte
Result addition =checksum (17th byte)?
Transfer byte count
Transfer byte count
Writing 16-byte write completed?
Write destination address
Read byte write data stored DATA_buf Write data _Wdata Write destination address _Waddress _Fwrite
Normal writing? (_Wcode
Error ("1"R0L) details this module, sample H8/3437F one-byte programming/multiple-block erase routine.
_llC_Input
Slave address recognized? Start reception (ICDR dummy read)
Receive byte count (R0L=0?)
DATA_buf+1DATA_buf
Data received? Store receive data DATA_buf
_llC_Output
Slave address recognized? Transmit byte count (R0L=0?)
DATA_buf+1DATA_buf
Transmit data stored DATA_buf slave receive mode data transmission? Release (ICDR dummy read)
Program List
;On-board programming using interface ;On-board programming mode: user program mode ;Sample programming program .CPU ;FLASH FLMCR .EQU H'FF80 EBR1 .EQU H'FF82 EBR2 .EQU H'FF83 TCSR .EQU H'FFA8 ;IIC ICCR .EQU H'FFD8 ICSR .EQU H'FFD9 ICDR .EQU H'FFDE ICMR .EQU H'FFDF .EQU H'FFDF STCR .EQU H'FFC3 ;I/O P9DDR .EQU H'FFC0 P9DR .EQU H'FFC1 P8DDR .EQU H'FFBD P8DR .EQU H'FFBF ;Symbol definition operating frequency "MHz" .EQU D'16 ;16MHz ;MHz .EQU D'10 ;10MHz ;MHz .EQU ;8MHz ;MHz .EQU ;6MHz ;MHz .EQU ;4MHz ;MHz .EQU ;2MHz ;Watchdog timer setting flash memory erase .EQU H'A57F ;(10 less) ;WDT .EQU H'A57E less than MHz) ;Symbol definitions programming control commands received from transfer source (master) W_E_go .EQU H'55 ;Programming start command Write .EQU H'66 ;Write command Erase .EQU H'77 ;Erase command FVpp_on .EQU H'88 application command FVpp_off .EQU H'99 disconnection command ;Symbol definitions programming control codes transmitted from H8/3437F (slave) .EQU H'01 ;Error occurrence .EQU H'00 ;Normal Request .EQU H'11 ;Transmit request master
0000FF80 0000FF82 0000FF83 0000FFA8 0000FFD8 0000FFD9 0000FFDE 0000FFDF 0000FFDF 0000FFC3 0000FFC0 0000FFC1 0000FFBD 0000FFBF
00000010
0000A57F
00000055 00000066 00000077 00000088 00000099
00000001 00000000 00000011
0000F7E0 00001000
0000001E
00001869
00000009
00000006
F780 F780 F782 F783 F784 F786 F787
0002 0001 0001 0002 0001 0011
0000 0000 004C 004A 004A 009C
004C 004C 0050 0054 0058 005A 005C 005E 0060 0062 0064 0066 0068 0000004C 7907FF80 7901F780 7906FF80 1900 0000005A 6990 0B81 1D61 46F8 5516 1888 00000066 5502 40FC
;Start address on-chip which program/erase control program transferred RAMSTART .EQU H'F7E0 ;Start address flash memory storing program/erase control program KAKUNOU .EQU H'1000 ;***************Software timer counter values**************** ;Calculate loop counter values program, program-verify, ;erase, erase-verify, dummy write from symbol "MHz" ;Program time (initial value: _Program_cnt .EQU ((MHz*19)/10) ;Erase time (initial value: 6.25 _Erase_cnt .EQU ((MHz*D'3906)/D'10) ;Program, erase, prewrite verify time _Verify_cnt .EQU ((MHz*D'5)/D'10+1) ;Dummy write time _Dummy_cnt .EQU ((MHz*D'3)/D'10+2) ;Work used program/erase control program .SECTION RAM,CODE,LOCATE=H'F780 _Waddress .RES.W ;Write destination address _Wdata .RES.B ;Write data _Wcode .RES.B write normal end, write error _Eblockinf .RES.W ;Set erase block _Ecode .RES.B erase normal end, prewrite error, erase error _DATA_buf .RES.B ;Transmit/receive buffer ;Vector table .SECTION VECT,CODE,LOCATE=H'0000 .DATA.W _MAIN ;Reset vector .ORG H'4A .DATA.W _IIC_IRIC ;IIC interrupt vector ;Main routine .SECTION PROG,CODE,LOCATE=H'4C _MAIN .EQU MOV.W #H'FF80,R7 ;Set stack pointer MOV.W #H'F780,R1 ;On-chip start address MOV.W #H'FF80,R6 ;On-chip address SUB.W R0,R0 ;Clear _RAMCLR .EQU ;Initialize on-chip MOV.W R0,@R1 ADDS.W #2,R1 CMP.W R6,R1 _RAMCLR _IO_INT SUB.B R0L,R0L _LOOP .EQU _CMD_INPUT _LOOP
0000006A A855 460A 0480 7FD87260 5A0000B0 00000078 0078 5470 006A 006C 006E 0070 0074
0000007A 007A F801 007C 38C1 007E 38C0 0080 7FC37040 0084 F838 0086 38DF 0088 1888 008A 38DE 008C F870 008E 38DF 0090 7FC37250 0094 F8C1 0096 38D8 0098 067F 009A 5470
0000009C 7FD97260 7ED97320 4706 28DE 1888 4002 000000AC 00AC 28DE 000000AE 00AE 5670 009C 00A0 00A4 00A6 00A8 00AA
;Wait reception programming command _CMD_INPUT .EQU CMP.B #W_E_go,R0L ;Programming command received from transfer source? _CMD_E #H'80,CCR ;Mask interrupt handling used application program BCLR.B #6,@ICCR ;Disable interrupt handling @_Trans_to_RAM _CMD_E .EQU ;Initialize registers _IO_INT .EQU MOV.B #H'01,R0L ;Control application/disconnection MOV.B R0L,@P9DR ;Initialize (P90 high-level output) MOV.B R0L,@P9DDR disconnected normal operation BSET.B #4,@STCR ;Enable register access MOV.B #H'38,R0L MOV.B R0L,@ICMR ;Set mode SUB.B R0L,R0L MOV.B R0L,@ICDR MOV.B #H'70,R0L ;Set addressing format MOV.B R0L,@SAR ;Set slave address H'70 BCLR.B #5,@STCR ;Transfer rate kbits/s MOV.B #H'C1,R0L ;Enable interrupts MOV.B R0L,@ICCR ;Enable operation ANDC #H'7F,CCR ;Clear interrupt mask ;IIC interface interrupt ;Reception processing programming start command from master ;Store data received from transfer source _IIC_IRIC .EQU BCLR.B #6,@ICSR ;Clear interrupt request flag BTST.B #2,@ICSR slave address recognized _DATA_Read ;ICDR dummy read MOV.B @ICDR,R0L ;Dummy read SUB.B R0L,R0L _IIC_IRICE _DATA_Read .EQU MOV.B @ICDR,R0L ;Read data _IIC_IRICE .EQU
000000B0 00B0 79001000 start address 00B4 7901F7E0 transferred 00B8 790213C0 address 000000BC 00BC 1D20 00BE 4C08 00C0 6D03 00C2 6993 00C4 0B81 00C6 40F4 000000C8 00C8 5A00F7E0 1000 00001000 1000 7907F7E0 1004 5E00F8F0 transfer source 1008 5E00F90C 100C 0C99 100E 4632 1010 5E00F8F0 transfer source 1014 5558 1016 0C99 1018 4628 101A 5E00F8F0 transfer source 101E 5578 1020 0C99 1022 461E 1024 5E00F8F0 transfer source 1028 5522 102A 0C99 102C 4614 102E 5E00F8F0 transfer source 1032 79000110 00001036 1036 1B00 1038 0D00 103A 46FA
;Transfer program/erase control program on-chip flash memory (starting H'1000) on-chip (starting H'7E0), branch this program _Trans_to_RAM .EQU MOV.W #KAKUNOU,R0 ;Set program/erase control program storage destination MOV.W MOV.W #RAMSTART,R1;Set start address on-chip which program will #_EAddress,R2;Set program/erase control program storage destination
_Trans_start .EQU ;Start transfer CMP.W R2,R0 _Trans_end MOV.W @R0+,R3 MOV.W R3,@R1 ADDS.W #2,R1 _Trans_start _Trans_end .EQU @RAMSTART ;Branch program/erase control program on-chip ;program/erase control program ;The following program transferred on-chip (starting H'FE70) after programming ;command received, executes on-chip flash memory programming/erasing .SECTION W_E,CODE,LOCATE=KAKUNOU _Flash_W_E .EQU MOV.W #RAMSTART,R7 ;Initialize stack pointer ;Start flash memory programming/erasing @(RAMSTART (_Output_OK KAKUNOU));Transmit code MOV.B MOV.B MOV.B MOV.B MOV.W _Fl_setup SUBS.W MOV.W #H'110,R0 .EQU #1,R0 R0,R0 _Fl_setup ;Flash memory read setup time ;Vcc more ;Vcc more _FVpp_end ;Disconnect from FVPP R1L,R1L generate error when disconnected _Error ;Branch error routine @(RAMSTART +(_Output_OK KAKUNOU));Transmit code _GO_Write ;Start flash memory programming R1L,R1L generate error when programming performed _Error ;Branch error routine @(RAMSTART +(_Output_OK KAKUNOU));Transmit code _GO_Erase R1L,R1L _Error @(RAMSTART ;Start flash memory erasing generate error when erase performed ;Branch error routine (_Output_OK KAKUNOU));Transmit code @(RAMSTART (_FVpp_12V KAKUNOU)) ;Apply FVPP R1L,R1L generate error when applied _Error ;Branch error routine @(RAMSTART (_Output_OK KAKUNOU));Transmit code
103C 1911 103E 6912 1040 5920 00001042 1042 7FC17000 1046 5E00F8FE transfer source 104A 40FE 0000104C 104C 1899 104E F801 1050 5E00F93E 1054 7902F787 1058 6828 105A A899 105C 4704 105E F901 1060 400A 1062 1062 7FC17000 1066 1066 2080 1068 A0FF 106A 46FA 0000106C 106C 5470 0000106E 106E F803 1070 5E00F93E 1074 7902F787 1078 6C28 107A A877 107C 4616 107E 6C20 1080 6828 1082 6B80F784 1086 5E00FA1C 108A 6A08F786 108E 4604 1090 1899 1092 4002 1094 1094 F901 00001096
SUB.W MOV.W _Error R1,R1 @R1,R2 ;Read reset vector contents ;Start application program flash memory ;(Jump address indicated reset vector contents)
.EQU BSET.B
#0,@P9DR ;Abort application @(RAMSTART (_Output_NG KAKUNOU));Transmit code
_Error0 _Error0 ;Halt program/erase processing ;Receive disconnection command from transfer source, disconnect from FVPP ;Argument: none ;Return value: disconnection command receive error) normal disconnection) _FVpp_end .EQU SUB.B R1L,R1L MOV.B #1,R0L ;Set receive data byte count @(RAMSTART +(_IIC_Input KAKUNOU)) ;Receive data MOV.W #_DATA_buf,R2 MOV.B @R2,R0L CMP.B #FVpp_off,R0L ;Receive data disconnection command? _FVpp_end0 disconnection command, error MOV.B #NG,R1L _FVpp_ende _FVpp_end0 BSET.B #0,@P9DR ;Output disconnection signal _FVpp_end1 MOV.B @FLMCR,R0H ;Vpp flag CMP.B #H'FF,R0H _FVpp_end1 _FVpp_ende .EQU ;Receive erase command from transfer source, start flash memory erasing ;Argument: none ;Return value: erase command receive error, erase error) normal erase processing) _GO_Erase .EQU MOV.B #3,R0L ;Set receive data byte count @(RAMSTART (_IIC_Input KAKUNOU));Receive data MOV.W #_DATA_buf,R2 MOV.B @R2+,R0L CMP.B #Erase,R0L ;1st byte receive data erase command? _GO_Era_err erase command, error MOV.B @R2+,R0H ;2nd bytes receive data erase block specification MOV.B @R2,R0L ;R0H->EBR1,R0L->EBR2 MOV.W R0,@_Eblockinf ;Set erase block @(RAMSTART (_Ferase KAKUNOU));Call erase routine MOV.B @_Ecode,R0L erase error? _GO_Era_err _Ecode erase error SUB.B R1L,R1L _GO_EraseE _GO_Era_err MOV.B #NG,R1L ;Set error return value _GO_EraseE .EQU
1096 5470 checksum error) 00001098 1098 F803 109A 5E00F93E 109E 7902F787 10A2 6C28 10A4 A866 10A6 4656 10A8 6C23 10AA 682B 10AC 1944 000010AE 10AE 0D33 10B0 4748 10B2 554E 10B4 F811 from transfer source, store _DATA_buf 10B6 5E00F93E 10BA 18DD 10BC FE10 10BE 7902F787 000010C2 10C2 0CEE 10C4 4708 10C6 6C25 10C8 085D 10CA 1A0E 10CC 40F4 000010CE 10CE 6825 10D0 1CD5 10D2 462A 10D4 FE10 10D6 7902F787 000010DA 10DA 0CEE 10DC 47D0 10DE 6B84F780 10E2 6C2D 10E4 6A8DF782 10E8 5E00F996 write routine 10EC 6A05F783 10F0 460C 10F2 0B04 10F4 1A0E 10F6 1B03 10F8 40E0 000010FA 10FA 1899
;Receive programming command from transfer source, start flash memory programming ;Argument: ;Return value: programming command receive error, programming error, normal programming) _GO_Write .EQU MOV.B #3,R0L ;Set receive data byte count @(RAMSTART +(_IIC_Input KAKUNOU)) ;Receive data MOV.W #_DATA_buf,R2 MOV.B @R2+,R0L CMP.B #Write,R0L ;1st byte receive data programming command? _W_NG programming command, error MOV.B @R2+,R3H;2nd bytes receive data write data transfer byte count MOV.B @R2,R3L ;Upper byte R0H, lower byte SUB.W R4,R4 ;Set address write destination address initial value _Check_sum .EQU MOV.W R3,R3 ;Write data transfer byte count _W_OK _Output_Request ;Write data transmission request transfer source MOV.B #D'17,R0L ;Receive bytes (16-byte write data ;1-byte checksum) SUB.B MOV.B MOV.W _Check_sum0 MOV.B MOV.B ADD.B DEC.B _Check_sum1 MOV.B CMP.B MOV.B MOV.W _Wrt_start MOV.B MOV.W MOV.B MOV.B MOV.B ADDS.W DEC.B SUBS.W .EQU SUB.B @(RAMSTART (_IIC_Input KAKUNOU)) R5L,R5L ;Clear checksum calculation #D'16,R6L #_DATA_buf,R2 .EQU R6L,R6L _Check_sum1 @R2+,R5H R5H,R5L _Check_sum0 .EQU @R2,R5H R5L,R5H _W_NG ;Sum write data bytes, ;compare with checksum 17th byte
;Checksum write data bytes? checksum sum, write data receive error
#D'16,R6L ;Start writing 16-byte write data flash memory #_DATA_buf,R2 .EQU R6L,R6L _Check_sum R4,@_Waddress ;Set write address @R2+,R5L R5L,@_Wdata ;Set write data @(RAMSTART (_Fwrite KAKUNOU));Call flash memory 1-byte @_Wcode,R5H _W_NG #1,R4 #1,R3 _Wrt_start R1L,R1L _Wcode write error ;Increment write address ;Decrement write data byte count
_W_OK
;Normal programming
10FC 4002 000010FE 10FE F901 00001100 1100 5470
1102 1106 1108 110A 110C 110E
00001102 7902F787 F811 68A8 F801 557A 5470
1110 1114 1116 1118 111A 111C
00001110 7902F787 F800 68A8 F801 556C 5470
111E 1122 1124 1126 1128 112A
0000111E 7902F787 F801 68A8 F801 555E 5470
112C 112E 1130 1132 1136 1138 113A 113C
0000112C 1899 F801 552C 6A0BF787 AB88 4704 F901 401E
0000113E 113E 7FC17200 00001142 1142 2080 1144 A080 1146 46FA 1148 790004E1 0000114C 114C 0000
_GO_WriteE .EQU MOV.B #NG,R1L ;Set write error return value code _GO_WriteE .EQU ;Transmit request code transfer source _Output_Request .EQU MOV.W #_DATA_buf,R2 MOV.B #Request,R0L MOV.B R0L,@R2 MOV.B #1,R0L _IIC_Output ;Transmit code transfer source _Output_OK .EQU MOV.W #_DATA_buf,R2 MOV.B #OK,R0L MOV.B R0L,@R2 MOV.B #1,R0L _IIC_Output ;Transmit code transfer source _Output_NG .EQU MOV.W #_DATA_buf,R2 MOV.B #NG,R0L MOV.B R0L,@R2 MOV.B #1,R0L _IIC_Output ;Receive application command from transfer source, apply FVPP ;Argument: none ;Return value: application command receive error) normal application) _FVpp_12V .EQU SUB.B R1L,R1L MOV.B #1,R0L ;Set receive data byte count _IIC_Input ;Receive data from transfer source MOV.B @_DATA_buf,R3L CMP.B #FVpp_on,R3L ;Receive data application command? _Wait_FVpp MOV.B #NG,R1L _FVpp_E ;Error _Wait_FVpp .EQU BCLR.B #0,@P9DR ;Apply (P90 low-level output) _Wait_FVpp0 .EQU MOV.B @FLMCR,R0H ;Vpp flag CMP.B #H'80,R0H _Wait_FVpp0 MOV.W #H'4E1,R0 _Wait_FVpp1 .EQU ;Wait until FVPP satisfies spec ;10ms _W_NG
114E 1150 1152 1154 1156 1158 115A
0000 0000 0000 0000 1B00 0D00 46F0 0000115C 115C 5470
0000115E 115E 7ED97360 1162 47FA 1164 7FD97260 1168 20DE 116A 7902F787 0000116E 116E 0C88 1170 4714 00001172 1172 7ED97360 1176 47FA 1178 7FD97260 20DE 68A0 0B02 1A08 40E8 00001186 1186 5470 117C 117E 1180 1182 1184
00001188 1188 118C 118E 1192 7ED97360 47FA 7FD97260 7902F787
00001196 1196 0C88 1198 4714 119A 6820 119C 30DE 0000119E 119E 7ED97360 11A2 47FA 11A4 7FD97260
SUBS.W #1,R0 MOV.W R0,R0 _Wait_FVpp1 _FVpp_E .EQU ;Receive data from transfer source ;Store data received from transfer source _DATA_buf ;Argument: (receive data byte count) ;Return value: None _IIC_Input .EQU BTST.B #6,@ICSR ;Identify slave address _IIC_Input BCLR.B #6,@ICSR MOV.B @ICDR,R0H ;Dummy read (start reception) MOV.W #_DATA_buf,R2 _IIC_i0 .EQU MOV.B R0L,R0L ;Receive byte count _IIC_ie receive operation _IIC_i1 .EQU BTST.B #6,@ICSR ;Data reception? _IIC_i1 BCLR.B #6,@ICSR MOV.B @ICDR,R0H ;Store received data _DATA_buf MOV.B R0H,@R2 ADDS.W #1,R2 DEC.B _IIC_i0 _IIC_ie .EQU ;Transmit data transfer source ;Transmit _DATA_buf contents transfer source ;Argument: transmit data byte count ;Return value: None _IIC_Output .EQU BTST.B #6,@ICSR ;Identify slave address _IIC_Output BCLR.B #6,@ICSR MOV.W #_DATA_buf,R2 _IIC_o0 .EQU MOV.B R0L,R0L ;Transmit byte count _IIC_o2 receive operation MOV.B @R2,R0H MOV.B R0H,@ICDR _IIC_o1 .EQU BTST.B #6,@ICSR ;Data transmission? _IIC_o1 BCLR.B #6,@ICSR
11A8 0B02 11AA 1A08 11AC 40E8 000011AE 11AE 7FD87240 11B2 20DE 000011B4 11B4 5470
11B6 11B8 11BA 11BC 11BE 11C0
000011B6 6DF0 6DF1 6DF2 6DF3 6DF4 6DF5
11C2 1888 11C4 6A88F783 11C8 79040100 11CC 6B02F780 11D0 6A0BF782 11D4 7901FFFF 11D8 6B81FF82 11DC F801 11DE 68AB 11E0 7905001E 000011E4 11E4 7901A579 11E8 6B81FFA8 11EC 0D51 11EE 3480 000011F0 11F0 1B01 11F2 0D11 11F4 46FA 11F6 3C80 11F8 7901A500 11FC 6B81FFA8 1200 79010009 1204 F004 1206 3080
00001208 1208 1B01 120A 0D11 120C 46FA
ADDS.W DEC.B #1,R2 _IIC_o0
_IIC_o2 .EQU BCLR.B #4,@ICCR ;Clear TRST MOV.B @ICDR,R0H ;Dummy read (release bus) _IIC_oe .EQU ;H8/3437F on-chip flash memory 1-byte write routine ;Routine name: _Fwrite ;Arguments: _Waddress (write destination address) _Wdata (write data) ;Return value: _Wcode write normal end, write error) _Fwrite .EQU PUSH.W ;Save general registers PUSH.W PUSH.W PUSH.W PUSH.W PUSH.W SUB.B MOV.B MOV.W MOV.W MOV.B MOV.W MOV.W MOV.B MOV.B MOV.W _PRetry .EQU MOV.W MOV.W MOV.W MOV.B _Program SUBS.W MOV.W MOV.B MOV.W MOV.W MOV.W MOV.B MOV.B R0L,R0L R0L,@_Wcode #H'0100,R4 @_Waddress,R2 @_Wdata,R3L #H'FFFF,R1 R1,@EBR1 ;Clear ;Clear _Wcode ;R4H setting, clearing ;Set write destination address ;Set write data
;Set EBR1/EBR2
#1,R0L ;Set program-verify file counter R3L,@R2 ;Write data flash memory (dummy write) #_Program_cnt,R5 ;Set program loop counter initial value #H'A579,R1 ;Start watchdog timer R1,@TCSR R5,R1 ;Set program loop counter R4H,@FLMCR ;Set bits .EQU ;Wait: 120, 240, #1,R1 R1,R1 _Program R4L,@FLMCR #H'A500,R1 R1,@TCSR ;Clear ;Stop watchdog timer
#_Verify_cnt,R1 ;Set program-verify loop count #H'04,R0H R0H,@FLMCR ;Set
_Pverify SUBS.W MOV.W
.EQU #1,R1 R1,R1 _Pverify
;Wait:
120E 1210 1212 1214 1216 1218 121A 121C 121E
6823 1C3B 4712 3C80 A806 4706 0A08 0955 40C4
00001220 1220 F001 1222 6A80F783 00001226 1226 3C80 1228 1911 122A 6B81FF82 122E 1230 1232 1234 1236 1238 123A 6D75 6D74 6D73 6D72 6D71 6D70 5470
123C 123E 1240 1242 1244 1246 1248
0000123C 6DF0 6DF1 6DF2 6DF3 6DF4 6DF5 6DF6
124A 18EE 124C 6A8EF786 1250 6B04F784 1254 4764 1256 6B84FF82 125A 5574 125C 6A0CF786 1260 AC01 1262 4756 1264 79051869 1268 79060001 0000126C 126C 7901A57F 1270 6B81FFA8
MOV.B CMP.B MOV.B CMP.B INC.B ADD.W _Write_NG MOV.B MOV.B _Write_OK MOV.B SUB.W MOV.W
@R2,R3H R3H,R3L _Write_OK R4L,@FLMCR #06,R0L _Write_NG R5,R5 _PRetry .EQU #1,R0H R0H,@_Wcode .EQU R4L,@FLMCR R1,R1 R1,@EBR1
;Read write address ;Read data write data? ;Program-verify determination clear ;Program-verify executed times? executed times, branch _Write_NG ;Double program loop counter ;Re-programming processing ;Write/erase determination ;Set _Wcode ;Clear ;Clear EBR1/EBR2
POP.W ;Restore general registers POP.W POP.W POP.W POP.W POP.W ;H8/3437F on-chip flash memory multiple-block erase routine ;Routine name: _Ferase ;Argument: _Eblockinf (erase block setting) ;Output value: _Ecode erase normal end, prewrite error, erase error) _Ferase .EQU PUSH.W ;Save general registers PUSH.W PUSH.W PUSH.W PUSH.W PUSH.W PUSH.W SUB.B MOV.B MOV.W MOV.W MOV.B CMP.B MOV.W MOV.W _ERetry .EQU MOV.W MOV.W R6L,R6L R6L,@_Ecode @_Eblockinf,R4 _Erend R4,@EBR1 _Prewrite @_Ecode,R4L #1,R4L _Erend #_Erase_cnt,R5 #1,R6 #WDT,R1 R1,@TCSR ;Clear ;Clear _Ecode ;R4H EBR1, EBR2 erase routine ;Set EBR1/EBR2 ;Call prewrite routine
_Ecode prewrite error _Ecode execute erase ;Set erase loop counter initial value ;Set erase-verify file counter
;Start watchdog timer
1274 0D51 1276 79040002 127A 3C80 0000127C 127C 0000 127E 0000 1280 0000 1282 0000 1284 1B01 1286 0D11 1288 46F2 128A 3480 128C 7901A500 1290 6B81FFA8 1294 5E00FB34 1298 129C 129E 12A2 12A4 12A6 12A8 12AC 12AE 12B0 12B2 6B01FF82 471C 79010004 1D16 4C02 0955 000012A8 7901025A 1D16 4704 0B06 40B8
000012B4 12B4 F002 12B6 6A80F786 000012BA 12BA 1900 12BC 6B80FF82 12C0 6D76 12C2 6D75 12C4 6D74 12C6 6D73 12C8 6D72 12CA 6D71 12CC 6D70 12CE 5470
000012D0 12D0 1888 12D2 7902FB7E
000012D6 12D6 555A 12D8 A810 12DA 4754 000012DC 12DC F001 12DE 79060100 12E2 F900
MOV.W MOV.W MOV.B .EQU SUBS.W MOV.W MOV.B MOV.W MOV.W MOV.W MOV.W CMP.W ADD.W _Cnt_Keep MOV.W CMP.W ADDS.W _E_ERROR
R5,R1 #H'0002,R4 R4L,@FLMCR
;Set erase loop counter ;RH4 clearing, setting ;Set ;Wait: 6.25, 12.5,
_Erase
#1,R1 R1,R1 _Erase R4H,@FLMCR #H'A500,R1 R1,@TCSR
;Clear ;Stop watchdog timer
@(RAMSTART (_Everify KAKUNOU)) ;Call erase-verify routine @EBR1,R1 ;EBR1/EBR2=0? _Erend EBR1/EBR2 erase #4,R1 R1,R6 ;4th erase? _Cnt_Keep R5,R5 ;Double erase loop counter .EQU #D'602,R1 R1,R6 ;602nd erase? _E_ERROR 602nd erase, erase error #1,R6 _ERetry
.EQU MOV.B #2,R0H ;Erase error determination MOV.B R0H,@_Ecode _Ecode _Erend .EQU SUB.W R0,R0 MOV.W R0,@EBR1 ;Clear EBR1/EBR2 POP.W POP.W ;Restore general registers POP.W POP.W POP.W POP.W POP.W ;Write erase block (prewrite processing) _Prewrite .EQU SUB.B R0L,R0L ;Clear used _Bsearch routine MOV.W #(RAMSTART (_Eblockadr KAKUNOU)),R2 ;Erase block address table start address _Prego .EQU CMP.B _Bsearch #H'10,R0L _Preend .EQU #1,R0H #H'0100,R6 #H'00,R1L
;Call _Bsearch routine ;End prewrite processing erase blocks
_Nextadr MOV.B MOV.W MOV.B
;Set prewrite-verify file counter ;R6H setting, clearing
12E4 68B9 12E6 7905001E 000012EA 12EA 7901A579 12EE 6B81FFA8 12F2 0D51 12F4 3680 000012F6 12F6 1B01 12F8 0D11 12FA 46FA 12FC 3E80 12FE 7901A500 1302 6B81FFA8 1306 79010009 0000130A 130A 1B01 130C 0D11 130E 46FA 1310 1312 1314 1316 1318 131A 131C 6839 4712 A006 4706 0A00 0955 40CC
0000131E 131E F101 1320 6A81F786 1324 400A 00001326 0B03 1D34 46B0 0A08 40A6
1326 1328 132A 132C 132E
00001330 1330 5470
00001332 1332 A810 1334 471C 1336 A808 1338 4C08 133A 7E836380 133E 460E 1340 4006
MOV.B MOV.W _Pretry .EQU MOV.W MOV.W MOV.W MOV.B _PProgram SUBS.W MOV.W MOV.B MOV.W MOV.W MOV.W _Prevfy .EQU SUBS.W MOV.W MOV.B CMP.B INC.B ADD.W _Pre_NG .EQU MOV.B MOV.B _Pre_OK .EQU ADDS.W CMP.W INC.B
R1L,@R3 ;H'00 flash memory (dummy write) #_Program_cnt,R5 ;Set prewrite loop counter initial value #H'A579,R1 R1,@TCSR R5,R1 R6H,@FLMCR .EQU #1,R1 R1,R1 _PProgram R6L,@FLMCR #H'A500,R1 R1,@TCSR
;Start watchdog timer ;Set program loop counter ;Set ;Wait: 120, 240,
;Clear
;Stop watchdog timer
#_Verify_cnt,R1 ;Set prewrite-verify loop count #1,R1 R1,R1 _Prevfy @R3,R1L _Pre_OK #6,R0H _Pre_NG R5,R5 _Pretry #1,R1H R1H,@_Ecode _Preend #1,R3 R3,R4 _Nextadr _Prego ;Wait:
;Read data ;Prewrite-verify executed times? executed times, branch _Pre_NG ;Double program loop counter ;Reprogramming processing ;Prewrite error determination ;Set _Ecode
;Address address ;End address? ;EBR1/EBR2 test counter ;Prewrite next block
_Preend .EQU ;Search erase block from EBR1/EBR2 _Bsearch .EQU ;Start erase block search CMP.B #H'10,R0L ;End search blocks? _Bsahe CMP.B BTST.B #8,R0L _Block_EBR1 R0L,@EBR2 _Erase_Block _Next_Block ;R0L search EBR2 ;EBR2 test
00001342 1342 7E826380 1346 4606 00001348 1348 0A08 134A 6D23 134C 40E4 0000134E 134E 6D23 1350 6924 00001352 1352 5470
00001354 1354 F008 1356 3080 1358 79010009 0000135C 135C 1B01 135E 0D11 1360 46FA 1362 1888 1364 7902FB7E
00001368 1368 55C8 136A A810 136C 472A 0000136E 136E F1FF 1370 68B1 1372 79010006 00001376 1376 1B01 1378 0D11 137A 46FA 137C 6C31 137E A1FF 1380 4612 1382 1D34 1384 46E8 1386 A808 1388 4C06 138A 7F836280 138E 4004
_Block_EBR1 BTST.B _Next_Block INC.B MOV.W
.EQU R0L,@EBR1 _Erase_Block .EQU @R2+,R3 _Bsearch
;EBR1 test
;Increment ;Dummy increment ;Next block search
_Erase_Block .EQU MOV.W @R2+,R3 MOV.W @R2,R4 _Bsahe .EQU
;Erase block start address ;Erase block address
;Erase block erase-verify processing _Everify MOV.B MOV.B MOV.W _Evwait .EQU SUBS.W MOV.W SUB.B MOV.W .EQU #H'08,R0H R0H,@FLMCR
;Set
#_Verify_cnt,R1 ;Set erase-verify loop count ;Wait: #1,R1 R1,R1 _Evwait R0L,R0L ;Clear used _Bsearch routine #(RAMSTART (_Eblockadr KAKUNOU)),R2 ;Erase block address table start address _Bsearch #H'10,R0L _Evend #H'FF,R1H R1H,@R3 #_Dummy_cnt,R1 #1,R1 R1,R1 _Dwait @R3+,R1H #H'FF,R1H _Next_Vb R3,R4 _Evtry #H'08,R0L _Clr_EBR1 R0L,@EBR2 _Next_Vb
_Evergo .EQU CMP.B _Evtry .EQU MOV.B MOV.B MOV.W .EQU SUBS.W MOV.W MOV.B CMP.B CMP.W CMP.B BCLR.B
;Call _Bsearch routine ;End verify processing erase blocks?
;H'FF dummy write
_Dwait
;Wait:
;Read ;Read data H'FF?
;Block address
;R0L clear EBR2 ;Clear EBR2
00001390 1390 7F826280 00001394 1394 0A08 1396 40D0 00001398 1398 F000 139A 3080 139C 5470
139E 139E 13A0 13A2 13A4 13A6 13A8 13AA 13AC 13AE 13B0 13B2 13B4 13B6 13B8 13BA 13BC 13BE 0000139E 0000 0080 0100 0180 0200 0400 0800 0C00 1000 2000 4000 6000 8000 A000 C000 EF80 F780 000013C0
_Clr_EBR1 BCLR.B _Next_Vb INC.B _Evend .EQU MOV.B MOV.B
.EQU R0L,@EBR1 .EQU _Evergo #H'00,R0H R0H,@FLMCR
;Clear EBR1
;Increment ;Verify next erase block
;Clear
;Erase block address table .ALIGN _Eblockadr .EQU .DATA.W H'0000 ;SB0 .DATA.W H'0080 ;SB1 .DATA.W H'0100 ;SB2 .DATA.W H'0180 ;SB3 .DATA.W H'0200 ;SB4 .DATA.W H'0400 ;SB5 .DATA.W H'0800 ;SB6 .DATA.W H'0C00 ;SB7 .DATA.W H'1000 ;LB0 .DATA.W H'2000 ;LB1 .DATA.W H'4000 ;LB2 .DATA.W H'6000 ;LB3 .DATA.W H'8000 ;LB4 .DATA.W H'A000 ;LB5 .DATA.W H'C000 ;LB6 .DATA.W H'EF80 ;LB7 .DATA.W H'F780 ;Dummy _EAddress .EQU .END
Hardware
transfer format transfer format used this programming example shown figure
Transfer bits
DATA
Transfer frame(1~)
Transfer frame(1) Start condition Slave address Indicates transmit/receive direction. H8/3437F (slave)transfer source (master) Transfer source H8/3437F Acknowledge ("0") Stop condition
Figure Transfer Format
Memory Figure shows H8/3437F memory maps normal operation (mode programming operation.
Normal operation H'0000 Vector table H'4C Application program Programming start command transfer program H'1000 Program/erase control program storage Programming area Programming operation
On-chip flash memory
Application program Transfer H'F77F H'F780 Work area H'F7E0 On-chip Work area Program/erase control program execution
H'FF80
Figure Memory Maps Note: program/erase control program storage execution areas shown figure only examples.
application/disconnection timing used program/erase control program control application disconnection FVPP shown figure
V±0.6 FVPP VCCV
On-chip flash memory programming possible
Disconnection signal output Application signal output "High" application/ disconnection signal) "Low"
Program/erase control program execution
Application program execution on-chip flash memory
Application program execution on-chip flash memory
Figure Application/Disconnection Timing
Circuit Diagram
4,9,59 15,70,71,92 Boot mode HA178M12
INPUT OUTPUT COMMON
H8/3437F
Transfer source Application program
HRP22 FVPP/STBY AVCC AVref AVSS
User program mode 2SJ333
0.33
0.01 LS07
HRP22
Crystal oscillator MHz) EXTAL
HRP22 0.01 TxD1 RxD1
1S2076 HC14
Notes: pins required boot mode provided board enable programming performed again boot mode chip which program/erase error, etc., occurs. Bypass capacitors (0.01 must connected close pins prevent overshoot when applied.
Figure Circuit Diagram On-Board Programming Using Interface
Programming Time
programming time on-board programming using interface explained below. programming times shown below indicate time from reception programming start command until flash memory program/erase processing. Programming time calculation results results programming time calculations (min., typ., max. values) shown table various processing times shown table calculated basis conditions listed below. equations used calculations shown following page. Operating Conditions H8/3437F: Size transferred application program (write data): kbytes Erase block: Entire 60-kbyte area rate: kbits/s FVPP ±0.6 Table
Item 60-kbyte erase time*
Programming Time Calculation Results
1.62 0.18 0.24 0.24 18.9 1.62 0.18 0.24 0.24 29.5 357.7 63.6 1.62 0.18 0.24 0.24 423.1
60-kbyte programming time*
Application program checksum transfer time (transfer source H8/3437F) Request code transfer time (H8/3437F transfer source) Command transfer time (transfer source H8/3437F) code transfer time (H8/3437F transfer source) Total
Unit: Note: 60-kbyte erase time 60-kbyte programming time, refer program/erase times sample one-byte programming/multiple-block erase routine.
Caution: programming time calculation results table guaranteed values, should only used reference values.
Programming time measurement result result programming time measurement shown table Measurement Conditions H8/3437F: MHz, 25°C H8/3437F (WS) Size transferred application program (write data): kbytes Erase block: Entire 60-kbyte area rate: kbits/s FVPP 12.0 Table
Item Programming time measurement result
Programming Time Measurement Result
Measured Value Unit:
Caution: programming time measurement result table guaranteed value, should only used reference value. Equations Application program checksum transfer time calculation transfer source (master) uses format shown figure transfer application program bytes checksum byte.
application program bytes Transfer bits Slave address Write data Transfer frame(17) Transfer bits bits Checksum
Transfer frame(1)
Figure Transfer Format Bytes Application Program Thus, transfer time 60-kbyte (63,360-byte) application program checksums follows: Number 16-byte application program transfers 63,360 bytes bytes 3,960 Total number transfer bits bits 3,960 649,440 Application program checksum transfer time 649,440 bits kbits/s 1.62
Request code transfer time calculation H8/3437F transfers request code transfer source each request bytes application program. Transfer bits request code (including slave address) Number request code transfers 63,488 bytes bytes 3,960 Total number transfer bits bits 3,960 75,240 Request code transfer time 75,240 bits kbits/s 0.18 Command transfer time calculation transfer source transfers five kinds programming control command H8/3437F. Number command transfers Total number transfer bits bits Command transfer time bits kbits/s 0.24 addition, H8/3437F transfers code transfer source after reception each command. Thus, command transfer time code transfer time
F-ZTATMicrocomputer On-Board Programming Application Note User Program Mode Volume
H8/3048F Example 1-to-N On-Board Programming
guarantee given on-board programming algorithms used this manual, programming times other data. This example intended only reference material that help user's system design process.
Contents
On-Board Programming Specifications Overview Operation Operation Software. Flowcharts Program List Hardware Programming Time
MCU: H8/3048F
On-Board Programming Mode: User Program Mode
Programming Method: 1-to-N On-Board Programming
Specifications
On-board programming mode User program mode Programming method H8/3048Fs connected single transfer source, programmed together (referred below "1-to-N" programming). programming example shown here, H8/3048Fs connected single transfer source. Write data received from transfer source written flash memory. serial communication interface (SCI) used communication with transfer source. transfer format shown below. Transfer format: Asynchronous mode, 8-bit data, stop bit, parity, transfer rate 62500 bits/s Separate LEDs provided write, prewrite, erase errors (connected P20, P21, H8/3048Fs), relevant lighting when error occurs. voltage application/disconnection control this example, generation application/disconnection circuitry provided user, Hitachi on-board programming tools used this purpose. application/disconnection controlled H8/3048Fs using port (P90). Reset input used application/disconnection. On-board programming configuration
Transfer source H8/3048F Flash memory H8/3048F Flash memory
Indicator LEDs
Application/ disconnection circuit
Operating conditions: Operating mode mode
Figure Configuration 1-to-N On-Board Programming
H8/3048F on-board programming procedure
Start H8/3048F on-board programming
Programming start command received from transfer source? Transfer program/erase control program on-chip flash memory on-chip
Start program/erase control program Apply FVPP Erase flash memory erase block Receive write data (new application program) from transfer source, write flash memory Disconnect from FVPP Start application program flash memory Processing executed flash memory Processing executed on-chip
Figure 1-to-N On-Board Programming Procedure
Overview Operation
operation 1-to-N on-board programming outlined below. Normal operation Write program/erase control program part application program area flash memory. supply stage application transfer stage beforehand.
Transfer source application program H8/3048F Flash memory Start-up Application program transfer program Program/ erase control program
Error indicator LEDs Write error Prewrite error Erase error
Application/ disconnection circuit
Figure Initial State
Start on-board programming Receive programming start command from transfer source. application program starts transfer program transfers program/erase control program flash memory on-chip RAM.
"Programming start" command application program H8/3048F Flash memory Application program Start-up Program/ erase control program Error indicator LEDs
Transfer source
Application/ disconnection circuit
transfer program Program/ erase control program
Transfer
Figure Start On-Board Programming Program/erase control program start-up After transfer ends, transfer program branches program/erase control program.
Transfer source application program H8/3048F Flash memory Application program Application signal output Start-up Program/ erase control program Error indicator LEDs
transfer program Branch Program/ erase control program
Application/ disconnection circuit
Figure Application
Flash memory erasing Receive erase command from transfer source. program/erase control program controls applies pin. program/erase control program erases flash memory.
"Erase" command
Transfer source application program H8/3048F Error indicator LEDs Flash memory Erase Application signal output Executing Program/ erase control program transfer program Program/ erase control program Application/ disconnection circuit
Figure Flash Memory Erasing
Flash memory programming Receive write command from transfer source. program/erase control program receives application program from transfer source writes flash memory.
"Write" command
Transfer source
H8/3048F Flash memory application program transfer program Program/ erase control program Executing Program/ erase control program
Error indicator LEDs
Application/ disconnection circuit
Figure Flash Memory Programming
application program start-up (10) program/erase control program controls disconnects supply pin. (11) program/erase control program branches application program flash memory.
Transfer source H8/3048F application Branch (11) program Program/ erase control program transfer program Program/ erase control program Flash memory Start-up Error indicator LEDs
(10) Disconnection signal
Application/ disconnection circuit
Figure Application Program Start-Up
Operation
Communication between H8/3048Fs transfer source on-board programming communication on-board programming shown below.
Item Transfer Source Processing
Normal operation
Communication
H8/3048F Processing
Application program start-up
Programming start command transmission
W_E_go ("H'55")
Programming start command received? Start transfer program
Start onboard programming
Wait while each H8/3048F transfers program/erase control program on-chip (TXD idle state)
Transfer program/erase control program flash memory on-chip Branch program/erase control program on-chip Program/erase control program start-up Command reception Received command erase command? error processing
Erase command, erase block specification transmission
Erase block specificati Erase EBR2 EBR1 "H'77"
Program/erase control program startup, application
Wait while each H8/3048F executes erase processing (TXD idle state)
application signal output from (low level) (VPP flag Wait until satisfies spec
erase processing
Notes: flash memory control register (FLMCR) flag decision level (threshold voltage) 11.4 actually execute programming/erasing until settled within program voltage range (12.0 ±0.6 this programming example, wait provided software timer before programming/erasing executed after application (after flag settles transfer source transmits H8/3048F erase block register (EBR1, EBR2) values, specifying erase block. wait time, Transfer source wait times.
Figure Communication On-Board Programming
Item
Transfer Source Processing
Communication
H8/3048F Processing
Prewrite erase block
Flash memory erasing
Normal prewrite? error processing Wait while each H8/3048F executes erase processing Erase erase block Normal erase? error processing flash memory programming processing
wait time, Transfer source wait times.
Figure Communication On-Board Programming (cont)
Item
Transfer Source Processing
Write command transmission
Communication
Write ("H'77")
H8/3048F Processing
Command reception Received command write command? error processing
Application program byte count transmission Lower
Byte count Upper Most significant
Application program byte count reception Start flash memory programming bytes received normally?
(Confirmed with checksum)
Flash memory programming
Transmission application program bytes checksum byte (total bytes)
Application Checksum program Lower bytes (binary)
error processing
Wait while each H8/3048F executes 16-byte write processing (TXD idle state)
Write application program bytes flash memory
application program transfer? disconnection processing
Normal write? error processing application program reception? disconnection processing
Notes: application program byte count transmitted transfer source sent upper lower byte, that order. checksum result summing application program bytes, byte byte. wait time, Transfer source wait times.
Figure Communication On-Board Programming (cont)
Item
Transfer Source Processing
Communication
H8/3437F Processing
disconnection signal output from (VPP
disconnection
Wait (flash memory read setup time) :100 Branch application program flash memory disconnection signal output from Write error? Light
Error
Prewrite error? Light Erase error? Light
Figure Communication On-Board Programming (cont)
Transfer source wait times transfer source inserts waits sequence shown figure (holding idle state). wait times used this programming example shown table
Wait Transfer source Erase EBR1 Programming command value start command Wait
EBR2 value
Erase command EBR1 value EBR2 value Wait
Write command
Application program byte count
Checksum Application program bytes Repeated until transfer ofapplication program completed idle state
Figure Transfer Source Wait Insertion Sequence
Table
Item Wait
Transfer Source Wait Times
Description Transfer source wait time while each H8/3048F transferring program/erase control program on-chip Transfer source wait time while each H8/3048F executing erase processing Transfer source wait time while each H8/3048F executing 16-byte write processing Wait Times This Programming Example msec
Wait Wait
msec
Notes: this programming example, wait msec. Waits satisfy following conditions. Wait max. time (worst time) erase processing entire 128-kbyte area Wait max. time (worst time) 1-byte write bytes Thus: Wait 575.3 Wait 101.6 µsec bytes (For max. time erase processing entire 128-kbyte area, max. time 1-byte write processing, programming/erase times H8/3048F one-byte programming/multiple-block erase routine.) this program example, following settings used satisfy above conditions: wait sec, wait msec.
Software
Hierarchical structure user program mode activation program Figure shows hierarchical structure program activation user program mode, executed flash memory (programming start command reception processing that transfers program/erase control program flash memory on-chip RAM).
_MAIN
_IO_INT
_Trans_to_RAM
_RXI1
(SCI reception completed interrupt)
Figure Hierarchical Structure User Program Mode Activation Program User program mode activation program modules Table User Program Mode Activation Program Modules
Arguments Register (Data Length) Return Value Register (Data Length) (byte) Function Assignment Main routine Initializes registers Receives data from transfer source Transfers program/ erase control program on-chip
Module Name _MAIN _IO_INT _RXI1
Description
Description Receive data
_Trans_to_RAM
Receive data
(byte)
Hierarchical structure program/erase control program Figure shows hierarchical structure program/erase control program, executed on-chip RAM.
_Flash_W_E
_GO_Erase
_VPP_12 _Input_Data _Ferase _Prewrite _Everify _Bsearch _Bsearch
_GO_Write
_Input_Data _Fwrite
_VPP_end
details these modules, sample H8/3048F one-byte programming/ multiple-block erase routine.
Figure Hierarchical Structure Program/Erase Control Program
Program/erase control program modules Table Program/Erase Control Program Modules
Arguments Register (Data Length) Return Value Register (Data Length) Function Assignment Main routine program/erase control program Applies Controls flash memory erasing Controls flash memory programming Disconnects from Transmits data transfer source Writes byte data flash memory
Module Name _Flash_W_E
Description
Description
_FVpp_12V _GO_Erase -GO_Write _Vpp_end _Input_Data
Normal: Error: Normal: Error:
(byte) (byte)
Receive data byte count (byte) Write destination address Write data _WAddress (longword) _Wdata (byte) _Eblockinf (word)
_Fwrite
Normal: Error:
_Wcode (byte)
_Ferase
Erase block specification
Normal: Prewrite error: Erase error:
_Ecode (byte)
Erases flash memory
Note: On-chip used storage area _Fwrite _Ferase arguments return values.
used Table shows on-chip used program/erase control program storage areas arguments return values, work areas. Table
Label _Waddress _Wdata _Wcode _Eblockinf _Ecode
Used
Function Stores write destination address (argument) Stores write data (argument) Stores normal write, write error (return value) Specifies erase block (argument) Stores normal erase, prewrite error, erase error (return value) receive data buffer Data Length Word Byte Byte Word Byte Relevant Modules _GO_Write _Fwrite _GO_Write _Fwrite _GO_Write _Fwrite _GO_Erase _Ferase _GO_Erase _Ferase _GO_Erase _GO_Write _Input_Data
_DATA_buf
Byte*
Note: program/erase control program reserves 17-byte area on-chip receive data buffer.
User Program Mode Activation Program Flowcharts
_MAIN
Initialize stack pointer
Clear on-chip
_IO_INT
_Trans_to_RAM
_IO_INT
Initialize controlling application/disconnection High-level output normal operation
Initialize Asynchronous mode Transfer rate 62500 bits/s
Enable reception completed interrupts receive operation
Clear interrupt mask
_Trans_to_RAM
Disable interrupts
Mask interrupts except
Transfer program/erase control program flash memory (starting address KAKUNOU) on-chip (starting address RAMSTART)
Branch program/erase control program
_RXI1 Reception completed interrupt
Data reception (receive data R0L)
_Trans_to_RAM
Receive data programming start command? Disable reception completed interrupts
Mask interrupts except
Transfer program/erase control program flash memory (starting address KAKUNOU) on-chip (starting address RAMSTART)
Branch program/ erase control program
_Flash_W_E Initialize stack pointer
_GO_Erase
Error during erasing?
_GO_Write
Error during programming?
Abort application (high-level output from P90)
_VPP_end
Light according error type
Wait (flash memory read setup time)
Read reset vector
Branch application program (branch address indicated reset vector)
_VPP_12
Apply Low-level output from
Flag Wait until spec satisfied wait)
_VPP_end
Disconnect from High-level output from
Flag
_GO_Erase
_VPP_12
Receive bytes data from transfer source R1L)
Input_Data
byte receive data erase command? Specify erase block from bytes receive data (Set Eblockinf)
_Ferase
Normal erase? (Ecode
EcodeR1L
details this module, sample H8/3048F one-byte programming/ multiple-block erase routine.
_GO_Write
Receive bytes data from transfer source (3R1L)
_Input_Data
byte receive data programming command?
bytes receive data write data transfer byte count write destination address address (initial value)
Transfer byte count
Receive bytes data from transfer source (17R1L) _Input_Data bytes received write data, byte byte
Transfer byte count
Result addition checksum (17th byte)?
Writing 16-byte write data completed?
Write destination address
Read byte write data stored DATA_buf Write data _Wdata Write destination address_Waddress _Fwrite
Normal writing? (_Wcode
Error ("1"R0L)
details this module, sample H8/3048F one-byte programming/ multiple-block erase routine.
VPP_12
DATA_buf+1DATA_buf
Receive byte count (R1L
Data received?
Store receive data DATA_buf
Program List
;On-board programming using 1-to-N method ;On-board programming mode: user program mode ;Sample programming program ;MCU:H8/3048F(Vcc=5V, .CPU 300HA FLMCR .EQU H'FFFF40 EBR1 .EQU H'FFFF42 EBR2 .EQU H'FFFF43 TCSR .EQU H'FFFFA8 P1DDR .EQU H'FFFFC0 P1DR .EQU H'FFFFC2 P2DDR .EQU H'FFFFC1 P2DR .EQU H'FFFFC3 P9DDR .EQU H'FFFFD0 P9DR .EQU H'FFFFD2 ;SCI SMR1 .EQU H'FFFFB8 BRR1 .EQU H'FFFFB9 SCR1 .EQU H'FFFFBA TDR1 .EQU H'FFFFBB SSR1 .EQU H'FFFFBC RDR1 .EQU H'FFFFBD .EQU .EQU ;Watchdog timer setting flash memory erase .EQU H'A57F ;(10 less) ;WDT .EQU H'A57E less than MHz) ;Symbol definition operating frequency "MHz" .EQU D'16 ;16MHz ;MHz .EQU D'10 ;10MHz ;MHz .EQU ;8MHz ;MHz .EQU ;6MHz ;MHz .EQU ;4MHz ;MHz .EQU ;2MHz ;Start address on-chip which program/erase control program transferred RAMSTART .EQU H'FFF300 ;Start address flash memory storing program/erase control program KAKUNOU .EQU H'10000 ;*****************Software timer counter values**************** ;Calculate VPPE bit, program-verify, erase, erase-verify, dummy write ;loop counter values from symbol "MHz" ;VPPE setup time _VPPE_cnt .EQU ((MHz*D'6)/D'10+1)
00FFFF40 00FFFF42 00FFFF43 00FFFFA8 00FFFFC0 00FFFFC2 00FFFFC1 00FFFFC3 00FFFFD0 00FFFFD2
00FFFFB8 00FFFFB9 00FFFFBA 00FFFFBB 00FFFFBC 00FFFFBD 00000000 00000001
0000A57F
00000010
00FFF300 00010000
0000000A
0000001E
;Program time (initial value: _Program_cnt
.EQU
((MHz*19)/10)
00001869
00000009
00000006
FFEF10 FFEF10 FFEF14 FFEF15 FFEF16 FFEF18 FFEF29
00000004 00000001 00000001 00000002 00000011 00000001
00000055 00000066 00000077
000000 000000 00000100 0000E4 0000E4 00000186
000100 000100 000106 000108 00010E 000114 000118 00011A 00011C 00011E 00000100 7A0700FFFF10 1A80 7A0100FFEF10 7A0600FFFF10 00000114 01006990 0B91 1FE1 46F6 5C000008
000122 1888 00000124 000124 5C000028 000128 40FA
;Erase time (initial value: 6.25 _Erase_cnt .EQU ((MHz*D'3906)/D'10) ;Program-verify, prewrite, erase-verify time _Verify_cnt .EQU ((MHz*D'5)/D'10+1) ;Dummy write time _Dummy_cnt .EQU ((MHz*D'3)/D'10+2) ;Work used program/erase control program .SECTION RAM,CODE,LOCATE=H'FFEF10 _Waddress .RES.L ;Write destination address storage _Wdata .RES.B ;Write data storage _Wcode .RES.B write normal end, write error _Eblockinf .RES.W ;Set erase block _DATA_buf .RES.B ;Data input buffer _Ecode .RES.B erase normal end, prewrite error, erase error ;Symbol definitions programming control commands received from transfer source W_E_go .EQU H'55 ;Programming start command Write .EQU H'66 ;Write command Erase .EQU H'77 ;Erase command ;Vector table .SECTION VECT,CODE,LOCATE=H'0000 .DATA.L _MAIN ;Reset vector .ORG H'E4 .DATA.L _RXI1 ;NMI interrupt vector ;Main routine .SECTION PROG,CODE,LOCATE=H'0100 _MAIN .EQU MOV.L #H'FFFF10,ER7 SUB.L ER0,ER0 ;Clear MOV.L #H'FFEF10,ER1 MOV.L #H'FFFF10,ER6 _RAMCLR .EQU ;Initialize on-chip MOV.L ER0,@ER1 ADDS.L #4,ER1 CMP.L ER6,ER1 _RAMCLR _IO_INT SUB.B R0L,R0L _LOOP .EQU _Trans_to_RAM _LOOP
00012A 00012C 00012E 000130 000134 000136 000138 00013A 00013C 00013E 000140 000144 000146 000148 00014A 00014C 00014E 000150 000152 000156 000158 00015A 00015C start address 000162 transferred 000168 address 00016E 000170 000174 000178 00017C 00017E 000180 000184
0000012A F801 38D2 38D0 79000700 30C3 38C1
1888 38BA F907 39B9 79000115 00000144 1B50 46FC F850 38BA 067F 5470
00000150 A855 5860002E
0480 F810 38BA 7A0000010000 7A0100FFF300 7A02000103CA
;Initialize registers _IO_INT .EQU MOV.B #H'01,R0L ;Control application/disconnection MOV.B R0L,@P9DR ;Initialize MOV.B R0L,@P9DDR disconnected normal operation (high output) MOV.W #H'0700,R0 ;Indicate type error generated during programming MOV.B R0H,@P2DR ;Light MOV.B R0L,@P2DDR ;P20 write error, erase error ;SCI1ch SUB.B R0L,R0L ;Clear MOV.B R0L,@SCR1 MOV.B #7,R1L MOV.B R1L,@BRR1 ;Set rate (62500 bits/s) MOV.W #H'115,R0 ;SCI1: wait cycle _Sci1_wait .EQU DEC.W #1,R0 _Sci1_wait MOV.B #H'50,R0L ;Enable receive operation reception completed interrupts MOV.B R0L,@SCR1 ANDC #H'7F,CCR ;Clear interrupt mask ;Transfer program/erase control program on-chip flash memory (starting H'1000) on-chip (starting H'FFF300), branch this program _Trans_to_RAM .EQU CMP.B #W_E_go,R0L ;Receive command programming start command? _Trans_end #H'80,CCR ;Mask interrupts MOV.B #H'10,R0L ;Disable reception completed interrupts MOV.B R0L,@SCR1 MOV.L #KAKUNOU,ER0;Set program/erase control program storage destination MOV.L MOV.L #RAMSTART,ER1;Set start address on-chip which program will #_EAddress,ER2;Set program/erase control program storage destination
0000016E 1FA0 58C0000C 01006D03 01006993 0B91 40EE 00000180 5AFFF300 00000184 5470
00000186
_Trans_start .EQU ;Start transfer CMP.L ER2,ER0 _Jump_to_RAM MOV.L @ER0+,ER3 MOV.L ER3,@ER1 ADDS.L #4,ER1 _Trans_start _Jump_to_RAM .EQU @RAMSTART ;Branch program/erase control program on-chip _Trans_end .EQU ;SCI reception completed interrupt _RXI1 .EQU
000186 28BD 000188 7FBC7260 00018C 5670
MOV.B BCLR.B
@RDR1,R0L #6,@SSR1
;Enable user program mode
010000 010000 010006 01000A 01000C 00010000 7A0700FFF300 5C000082 0C99 58600020
00010010 010010 5C0000AA 010014 0C99 010016 58700006 01001A F900 01001C 58000010 00010020 010020 5C00003A 010024 79000110 00010028 010028 1B50 01002A 0D00 01002C 46FA 01002E 5B00 00010030 010030 1888 010032 38BA 010034 7FD27000 010038 7FC36290
01003C 40FE
0001003E 01003E 7FD27200 00010042 010042 7E407370 010046 47FA 010048 790004E1 0001004C 01004C 0000
;Program/erase control program ;The following program transferred on-chip (starting H'FFF300) ;and executes on-chip flash memory programming/erasing .SECTION W,CODE,LOCATE=KAKUNOU _Flash_W_E .EQU MOV.L #H'FFF300,ER7 _GO_Erase MOV.B R1L,R1L erase error _ERROR _Flash_W .EQU _GO_Write MOV.B R1L,R1L write error _Flash_end MOV.B #0,R1L _ERROR _Flash_end .EQU _Vpp_end MOV.W #H'110,R0 ;Flash memory read setup time _Fl_setup .EQU ;Vcc more DEC.W #1,R0 ;Vcc more MOV.W R0,R0 _Fl_setup @@H'00 ;Branch application program flash memory _ERROR .EQU SUB.B R0L,R0L ;Halt receive operation MOV.B R0L,@SCR1 BSET.B #0,@P9DR ;Abort application BCLR.B R1L,@P2DR ;Error illumination ;Light write error, prewrite error, ;P22 erase error _Eloop _Eloop ;Apply ;Argument: none ;Return value: None _Vpp_12V .EQU BCLR.B #0,@P9DR ;Apply _Vpp_ok .EQU BTST.B #7,@FLMCR ;Vpp flag _Vpp_ok MOV.W #H'4E1,R0 _Wait_Vpp .EQU ;Wait until satisfies spec
01004E 010050 010052 010054 010056 010058 01005A 01005C
0000 0000 0000 0000 1B50 0D00 46F0 5470
0001005E 01005E 7FD27000 00010062 010062 7E407370 010066 46FA 010068 5470
0001006A 01006A 7A0200FFEF18 00010070 010070 0C99 010072 58700014 00010076 010076 7EBC7360 01007A 47FA 01007C 28BD 01007E 7FBC7260 010082 010084 010086 010088 68A8 0B72 1A09 40E6
0001008A 01008A 5470
01008C 01008E 010090 010096 010098
0001008C F903 55DA 7A0200FFEF18 6C28 A877
DEC.W #1,R0 MOV.W R0,R0 _Wait_Vpp ;Disconnect from ;Argument: none ;Return value: None _Vpp_end .EQU BSET.B #0,@P9DR ;Disconnect _Vpp_end0 .EQU BTST.B #7,@FLMCR ;Vpp flag _Vpp_end0 ;Receive data from transfer source ;Argument: (input data byte count) ;Return value: None _Input_Data .EQU MOV.L #_DATA_buf,ER2 _Input_start .EQU MOV.B R1L,R1L _Input_end _Input0 .EQU BTST.B #6,@SSR1 _Input0 MOV.B @RDR1,R0L ;Data reception BCLR.B #6,@SSR1 MOV.B R0L,@ER2 ;Store input data INC.L #1,ER2 DEC.B _Input_start _Input_end .EQU ;Start flash memory erasing ;Argument: none ;Return value: prewrite error command receive error, erase error) normal erase processing) _GO_Erase .EQU MOV.B #3,R1L _Input_Data MOV.L #_DATA_buf,ER2 MOV.B @ER2+,R0L CMP.B #Erase,R0L ;Receive command erase command?
01009A 5860001C 01009E 6C21 0100A0 6829 0100A2 6B81EF16 0100A6 5596 0100A8 0100AC 0100B0 0100B4 0100B6 5C00012E 6A09EF29 58600008 F900 58000002
000100BA 0100BA F901 000100BC 0100BC 5470
000100BE 0100BE F904 0100C0 55A8 0100C2 7A0200FFEF18 0100C8 6C2C 0100CA AC66 0100CC 58600068 0100D0 0100D2 0100D4 0100D6 0100D8 1844 6C2C 0D4B 6C23 682B
0100DA 1AC4 000100DC 0FB3 58700050 F911 5584 18DD FE10 7A0200FFEF18 000100F0 0CEE 58700008 6C25 085D 1A0E
0100DC 0100DE 0100E2 0100E4 0100E6 0100E8 0100EA
0100F0 0100F2 0100F6 0100F8 0100FA
MOV.B MOV.B MOV.W MOV.B MOV.B _Er_NG
_Er_NG @ER2+,R1H @ER2,R1L R1,@_Eblockinf _Vpp_12V _Ferase @_Ecode,R1L _Erase_end #OK,R1L _Erase_end
;Set erase block ;Apply ;Call erase routine erase error? Ecode erase error?
.EQU MOV.B #NG,R1L _Erase_end .EQU ;Start flash memory programming ;Argument: none ;Return value: write error) normal programming) _GO_Write .EQU MOV.B #4,R1L ;Set receive data byte count _Input_Data ;Receive data MOV.L #_DATA_buf,ER2 MOV.B @ER2+,R4L CMP.B #Write,R4L ;Receive command write command? _W_NG SUB.B R4H,R4H ;Clear MOV.B @ER2+,R4L ;Set write data transfer byte count MOV.W R4,E3;Most significant byte upper byte R3H, lower byte MOV.B @ER2+,R3H MOV.B @ER2,R3L SUB.L ER4,ER4 ;Set address write destination address initial value _Check_sum .EQU MOV.L ER3,ER3 ;Write data transfer byte count _W_OK MOV.B #D'17,R1L ;Receive bytes (16-byte write data 1-byte checksum) _Input_Data ;from transfer source, store _DATA_buf SUB.B R5L,R5L ;Clear checksum calculation MOV.B #D'16,R6L MOV.L #_DATA_buf,ER2 _Check_sum0 .EQU ;Sum write data bytes, compare with checksum MOV.B R6L,R6L 17th byte _Check_sum1 MOV.B @ER2+,R5H ADD.B R5H,R5L DEC.B
0100FC 40F2 000100FE 0100FE 6825 010100 1CD5 010102 58600032 010106 FE10 010108 7A0200FFEF18 0001010E 01010E 0CEE 010110 47CA 010112 01006B84EF10 010118 6C2D 01011A 6A8DEF14 01011E 5C00001A 010122 6A05EF15 010126 5860000E 01012A 0B74 01012C 1A0E 01012E 1B73 010130 40DC 00010132 010132 F900 010134 58000002 00010138 010138 F901 0001013A 01013A 5470
01013C 01013E 010140 010144 010146 010148
0001013C 6DF0 6DF1 01006DF2 6DF3 6DF4 6DF5
01014A 1888 01014C 6A88EF15 010150 79044140 010154 7901000A 010158 3C40 0001015A 01015A 1B51 01015C 0D11 01015E 46FA 010160 01006B02EF10
_Check_sum0 _Check_sum1 .EQU MOV.B @ER2,R5H CMP.B R5L,R5H ;Checksum write data bytes? _W_NG checksum sum, write data receive error MOV.B #D'16,R6L ;Start writing 16-byte write data flash memory MOV.L #_DATA_buf,ER2 _Wrt_start .EQU MOV.B R6L,R6L _Check_sum MOV.L ER4,@_Waddress ;Set write address MOV.B @ER2+,R5L MOV.B R5L,@_Wdata ;Set write data _Fwrite ;Call flash memory 1-byte write routine MOV.B @_Wcode,R5H _Wcode write error _W_NG INC.L #1,ER4 ;Increment write destination address DEC.B DEC.L #1,ER3 ;Decrement write data byte count _Wrt_start _W_OK .EQU MOV.B #OK,R1L ;Normal programming _GO_WriteE _W_NG .EQU MOV.B #NG,R1L ;Set write error return value code _GO_WriteE .EQU ;H8/3048F on-chip flash memory 1-byte write routine ;Routine name: _Fwrite ;Arguments: _Waddress (write destination address) _Wdata (write data) ;Return value: _Wcode write normal end, write error) _Fwrite .EQU PUSH.W ;Save general registers PUSH.W PUSH.L PUSH.W PUSH.W PUSH.W SUB.B MOV.B MOV.W MOV.W MOV.B _WVPPE .EQU DEC.W MOV.W MOV.L R0L,R0L R0L,@_Wcode #H'4140,R4 #_VPPE_cnt,R1 R4L,@FLMCR #1,R1 R1,R1 _WVPPE @_Waddress,ER2 ;Clear ;Clear _Wcode ;R4H setting, clearing ;Set VPPE loop counter ;Set VPPE
;Wait: 5-10
;Set write destination address
010166 6A0BEF14 01016A 01016E 010172 010174 010176 7901FFFF 6B81FF42 F801 68AB 7905001E 0001017A 7901A579 6B81FFA8 0D51 3440
01017A 01017E 010182 010184
00010186 010186 1B51 010188 0D11 01018A 46FA 01018C 3C40 01018E 7901A500 010192 6B81FFA8 010196 79010009 01019A F044 01019C 3040 0001019E 01019E 1B51 0101A0 0D11 0101A2 46FA 0101A4 0101A6 0101A8 0101AC 0101AE 0101B0 0101B4 0101B6 0101B8 6823 1C3B 58700014 3C40 A806 58700006 0A08 1015 40C0
000101BA 0101BA F001 0101BC 6A80EF15 000101C0 3C40 1911 6B81FF42 3940 6D75 6D74 6D73 01006D72 6D71 6D70 5470
0101C0 0101C2 0101C4 0101C8 0101CA 0101CC 0101CE 0101D0 0101D4 0101D6 0101D8
MOV.B MOV.W MOV.W MOV.B MOV.B MOV.W _PRetry .EQU MOV.W MOV.W MOV.W MOV.B _Program DEC.W MOV.W MOV.B MOV.W MOV.W
@_Wdata,R3L
;Set write data
#H'FFFF,R1 R1,@EBR1 ;Set EBR1/EBR2 #1,R0L ;Set program-verify file counter R3L,@ER2 ;Write data flash memory (dummy write) #_Program_cnt,R5 ;Set program loop counter initial value #H'A579,R1 R1,@TCSR R5,R1 R4H,@FLMCR .EQU #1,R1 R1,R1 _Program R4L,@FLMCR #H'A500,R1 R1,@TCSR
;Start watchdog timer ;Set program loop counter ;Set ;Wait: 120, 240,
;Clear ;Stop watchdog timer ;Set program-verify loop count ;Set ;Wait:
MOV.W #_Verify_cnt,R1 MOV.B #H'44,R0H MOV.B R0H,@FLMCR _Pverify .EQU DEC.W #1,R1 MOV.W R1,R1 _Pverify MOV.B CMP.B MOV.B CMP.B INC.B SHLL.W _Write_NG MOV.B MOV.B _Write_OK MOV.B SUB.W MOV.W MOV.B POP.W POP.W POP.W POP.L POP.W POP.W @ER2,R3H R3H,R3L _Write_OK R4L,@FLMCR #06,R0L _Write_NG _PRetry .EQU #1,R0H R0H,@_Wcode .EQU R4L,@FLMCR R1,R1 R1,@EBR1 R1L,@FLMCR
;Read write address ;Read data write data? ;Program-verify determination clear ;Program-verify executed times? executed times, branch _Write_NG ;Double program loop counter ;Re-programming processing ;Write error determination ;Set _Wcode
;Clear ;Clear EBR1/EBR2 ;Clear VPPE ;Restore general registers
0101DA 0101DC 0101DE 0101E2 0101E6 0101EA 0101EC 0101EE 0101F0 0101F4 0101F6 0101FA
000101DA 6DF0 6DF1 01006DF2 01006DF3 01006DF4 6DF5 6DF6 18EE 6A8EEF29 FC40 7901000A 3C40
000101FC 0101FC 1B51 0101FE 0D11 010200 46FA 010202 010206 01020A 01020E 6B04EF16 5870006A 6B84FF42 5C000080
010212 010216 010218 01021C 010220
6A0CEF29 AC01 58700058 79051869 79060001
00010224 010224 7901A57F 010228 6B81FFA8 01022C 0D51 01022E 79044042 010232 3C40 00010234 010234 0000 010236 0000 010238 0000 01023A 0000 01023C 1B51 01023E 0D11 010240 46F2 010242 3440 010244 7901A500 010248 6B81FFA8
;H8/3048F on-chip flash memory multiple-block erase routine ;Routine name:_Ferase ;Argument: _Eblockinf (erase block setting) ;Return value: _Ecode erase normal end, prewrite error, erase error) _Ferase .EQU PUSH.W ;Save general registers PUSH.W PUSH.L PUSH.L PUSH.L PUSH.W PUSH.W SUB.B MOV.B MOV.B MOV.W MOV.B _EVPPE .EQU DEC.W MOV.W MOV.W MOV.W R6L,R6L R6L,@_Ecode #H'40,R4L #_VPPE_cnt,R1 R4L,@FLMCR #1,R1 R1,R1 _EVPPE @_Eblockinf,R4 _Erend R4,@EBR1 _Prewrite ;Clear ;Clear _Ecode ;Set VPPE ;Set VPPE loop counter ;Set VPPE
;Wait:
;R4H EBR1, EBR2 erase routine ;Set EBR1/EBR2 ;Call prewrite routine
MOV.B CMP.B MOV.W MOV.W _ERetry .EQU MOV.W MOV.W MOV.W MOV.W MOV.B .EQU DEC.W MOV.W MOV.B MOV.W MOV.W
@_Ecode,R4L #1,R4L _Erend #_Erase_cnt,R5 #1,R6 #WDT,R1 R1,@TCSR R5,R1 #H'4042,R4 R4L,@FLMCR
_Ecode prewrite error _Ecode execute erase ;Set erase loop counter initial value ;Set erase-verify file counter
;Start watchdog timer
;Set erase loop counter ;RH4 clearing, setting ;Set ;Wait: 6.25, 12.5, 25.50
_Erase
#1,R1 R1,R1 _Erase R4H,@FLMCR #H'A500,R1 R1,@TCSR
;Clear ;Stop watchdog timer
01024C 5C0000E2 010250 6B01FF42 010254 5870001C 010258 79260004 01025C 58C00002 010260 1015 00010262 010262 7926025A 010266 58700004 01026A 0B56 01026C 40B6 0001026E 01026E F002 010270 6A80EF29 00010274 010274 1900 010276 6B80FF42 01027A 3840 01027C 01027E 010280 010284 010288 01028C 01028E 010290 6D76 6D75 01006D74 01006D73 01006D72 6D71 6D70 5470
00010292 010292 1888 010294 7A0200FFF686
0001029A 01029A 5C000062 01029E A810 0102A0 5870005A 000102A4 F001 79064140 F900 68B9 7905001E
0102A4 0102A6 0102AA 0102AC 0102AE
000102B2 0102B2 7901A579 0102B6 6B81FFA8 0102BA 0D51
MOV.W CMP.W SHLL.W _Cnt_Keep CMP.W INC.W _E_ERROR MOV.B MOV.B _Erend .EQU SUB.W MOV.W MOV.B
_Everify @EBR1,R1 _Erend #4,R6 _Cnt_Keep .EQU #D'602,R6 _E_ERROR #1,R6 _ERetry .EQU #2,R0H R0H,@_Ecode R0,R0 R0,@EBR1 R0L,@FLMCR
;Call erase-verify routine ;EBR1/EBR2=0? EBR1/EBR2 erase ;4th erase? ;Double erase loop counter ;602nd erase? 602nd erase, erase error
;Erase error determination _Ecode
;Clear EBR1/EBR2 ;Clear VPPE
POP.W ;Restore general registers POP.W POP.L POP.L POP.L POP.W POP.W ;Write erase block (prewrite processing) _Prewrite .EQU SUB.B R0L,R0L ;Clear used _Bsearch routine MOV.L #(RAMSTART (_Eblockadr KAKUNOU)),ER2 ;Erase block address table start address (on-chip RAM) ER2) _Prego .EQU CMP.B _Bsearch #H'10,R0L _Preend .EQU #1,R0H #H'4140,R6 #H'00,R1L R1L,@ER3 #_Program_cnt #H'A579,R1 R1,@TCSR R5,R1
;Call _Bsearch routine ;End prewrite processing erase blocks
_Nextadr MOV.B MOV.W MOV.B MOV.B MOV.W _Pretry .EQU MOV.W MOV.W MOV.W
;Set prewrite-verify file counter ;R6H setting, clearing ;H'00 flash memory (dummy write) ;R5; prewrite loop counter initial value setting
;Start watchdog timer ;Set program loop counter
0102BC 3640 000102BE 0102BE 1B51 0102C0 0D11 0102C2 46FA 0102C4 3E40 0102C6 7901A500 0102CA 6B81FFA8 0102CE 79010009 000102D2 0102D2 1B51 0102D4 0D11 0102D6 46FA 0102D8 0102DA 0102DE 0102E0 0102E4 0102E6 0102E8 6839 58700016 A006 58700006 0A00 1015 40C8
000102EA 0102EA F101 0102EC 6A81EF29 0102F0 5800000A 000102F4 0B73 1FB4 46AA 0A08 409C
0102F4 0102F6 0102F8 0102FA 0102FC
000102FE 0102FE 5470
00010300 010300 A810 010302 5870002A 010306 A808 010308 01030C 010310 010314 58C0000C 7E426380 58600014 58000008
00010318 010318 7E436380 01031C 58600008
MOV.B _PProgram DEC.W MOV.W MOV.B MOV.W MOV.W MOV.W _Prevfy .EQU DEC.W MOV.W MOV.B CMP.B INC.B SHLL.W _Pre_NG .EQU MOV.B MOV.B _Pre_OK .EQU INC.L CMP.L INC.B
R6H,@FLMCR .EQU #1,R1 R1,R1 _PProgram R6L,@FLMCR #H'A500,R1 R1,@TCSR
;Set ;Wait: 120, 240,
;Clear ;Stop watchdog timer
#_Verify_cnt,R1 ;Set prewrite-verify loop count ;Wait: #1,R1 R1,R1 _Prevfy @ER3,R1L _Pre_OK #6,R0H _Pre_NG _Pretry #1,R1H R1H,@_Ecode _Preend #1,ER3 ER3,ER4 _Nextadr _Prego ;Read data ;Prewrite-verify executed times? executed times, branch _Pre_NG ;Double program loop counter ;Reprogramming processing ;Prewrite error determination ;Set _Ecode
;Address address ;End address? ;EBR1/EBR2 test counter ;Prewrite next block
_Preend .EQU ;Search erase block from EBR1/EBR2 _Bsearch .EQU ;Start erase block search CMP.B #H'10,R0L ;End search blocks? _Bsahe CMP.B #8,R0L ;R0L BTST.B _Block_EBR2 BTST.B _Block_EBR2 R0L,@EBR1 _Erase_Block _Next_Block .EQU R0L,@EBR2 _Erase_Block search EBR2 ;EBR1 test
;EBR1 test
00010320 010320 0A08 010322 01006D23 010326 40D8 00010328 010328 01006D23 01032C 01006924 00010330 010330 5470
00010332 010332 F048 010334 3040 010336 79010009 0001033A 01033A 1B51 01033C 0D11 01033E 46FA 010340 1888 010342 7A0200FFF686
00010348 010348 55B6 01034A A810 01034C 58700030 00010350 010350 F1FF 010352 68B1 010354 79010006 00010358 010358 1B51 01035A 0D11 01035C 46FA 01035E 6C31 010360 A1FF 010362 58600016 010366 1FB4 010368 46E6 01036A A808 01036C 58C00008 010370 7F426280 010374 58000004
_Next_Block INC.B MOV.L _Erase_Block MOV.L MOV.L _Bsahe .EQU
.EQU @ER2+,ER3 _Bsearch .EQU @ER2+,ER3 @ER2,ER4
;Increment ;Dummy increment ;Next block search
;Erase block start address ;Erase block address
;Erase block erase-verify processing _Everify .EQU MOV.B #H'48,R0H ;Set MOV.B R0H,@FLMCR MOV.W #_Verify_cnt,R1 ;Set erase-verify loop count _Evwait .EQU DEC.W MOV.W SUB.B MOV.L #1,R1 R1,R1 _Evwait R0L,R0L ;Wait:
;Clear used _Bsearch routine
#(RAMSTART (_Eblockadr KAKUNOU)),ER2 ;Erase block address table start address (on-chip RAM) _Bsearch #H'10,R0L _Evend #H'FF,R1H R1H,@ER3 #_Dummy_cnt,R1 #1,R1 R1,R1 _Dwait @ER3+,R1H #H'FF,R1H _Next_Vb ER3,ER4 _Evtry #H'08,R0L _Clr_EBR2 R0L,@EBR1 _Next_Vb
_Evergo .EQU CMP.B _Evtry .EQU MOV.B MOV.B MOV.W .EQU DEC.W MOV.W MOV.B CMP.B CMP.L CMP.B BCLR.B
;Call _Bsearch routine ;End verify processing erase blocks?
;H'FF dummy write
_Dwait
;Wait:
;Read ;Read data H'FF?
;Block address
;R0L clear EBR2 ;Clear EBR1
00010378 010378 7F436280 0001037C 01037C 0A08 01037E 40C8 00010380 010380 F040 010382 3040 010384 5470
010386 010386 01038A 01038E 010392 010396 01039A 01039E 0103A2 0103A6 0103AA 0103AE 0103B2 0103B6 0103BA 0103BE 0103C2 0103C6 00010386 00000000 00004000 00008000 0000C000 00010000 00014000 00018000 0001C000 0001F000 0001F200 0001F400 0001F600 0001F800 0001FA00 0001FC00 0001FE00 00020000 000103CA
_Clr_EBR2 BCLR.B _Next_Vb INC.B _Evend
.EQU R0L,@EBR2 .EQU _Evergo
;Clear EBR2
;Increment ;Verify next erase block
.EQU MOV.B #H'40,R0H MOV.B R0H,@FLMCR ;Clear ;Erase block address table .ALIGN _Eblockadr .EQU .DATA.L H'00000000 ;LB0 .DATA.L H'00004000 ;LB1 .DATA.L H'00008000 ;LB2 .DATA.L H'0000C000 ;LB3 .DATA.L H'00010000 ;LB4 .DATA.L H'00014000 ;LB5 .DATA.L H'00018000 ;LB6 .DATA.L H'0001C000 ;LB7 .DATA.L H'0001F000 ;SB0 .DATA.L H'0001F200 ;SB1 .DATA.L H'0001F400 ;SB2 .DATA.L H'0001F600 ;SB3 .DATA.L H'0001F800 ;SB4 .DATA.L H'0001FA00 ;SB5 .DATA.L H'0001FC00 ;SB6 .DATA.L H'0001FE00 ;SB7 .DATA.L H'00020000 ;Dummy _EAddress .EQU .END
Hardware
Memory Figure shows H8/3048F (mode memory maps normal operation programming operation.
Normal operation H'0000 Vector table H'FF On-chip flash memory H'10000 Program/erase control program storage Application program Programming start command transfer program Programming area Programming operation
Application program Transfer H'1FFFF H'FEF10 Work area On-chip H'FF300 Work a
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