FLASH MEMORY CMOS 8/512K MBM29LL800T-15S/MBM29LL800B-15

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FLASH MEMORY CMOS 8/512K MBM29LL800T-15S/MBM29LL800B-15

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DS05-20848-1E
FLASH MEMORY
CMOS
8/512K
MBM29LL800T-15S/MBM29LL800B-15S
FEATURES
Voltage range (2.2 read, program erase Minimizes system level power requirements power consumption maximum active read current Word Mode maximum active read current Byte Mode maximum program/erase current maximum standby current Automatic sleep mode When addresses remain stable, automatically switches themselves power mode maximum automatic sleep mode Compatible with JEDEC-standard commands Uses same software commands E2PROMs Compatible with JEDEC-standard world-wide pinouts 48-pin TSOP(I) (Package suffix: PFTN-Normal Bend Type, PFTR-Reversed Bend Type) 46-pin (Package suffix: Minimum 100,000 program/erase cycles High performance maximum access time Sector erase architecture word, words, word, fifteen words sectors word mode byte, bytes, byte, fifteen byte sectors byte mode combination sectors concurrently erased. Also supports full chip erase Boot Code Sector Architecture sector Bottom sector Embedded EraseAlgorithms Automatically pre-programs erases chip sector Embedded programAlgorithms Automatically programs verifies data specified address Data Polling Toggle feature detection program erase cycle completion Ready/Busy output (RY/BY) Hardware method detection program erase cycle completion
(Continued)
Embedded Eraseand Embedded Programare trademarks Advanced Micro Devices, Inc.
MBM29LL800T-15S/MBM29LL800B-15S
(Continued) Erase Suspend/Resume Suspends erase operation allow read and/or program another sector within same device Sector protection Hardware method disables combination sectors from program erase operations Temporary sector unprotection Temporary sector unprotection RESET
PACKAGE
48-pin Plastic TSOP
Marking Side
48-pin Plastic TSOP
46-pin Plastic
Marking Side
(FPT-48P-M19)
(FPT-48P-M20)
(LCC-46P-M02)
MBM29LL800T-15S/MBM29LL800B-15S
GENERAL DESCRIPTION
MBM29LL800T/B 8M-bit, single voltage supply Flash memory organized bytes bits each 512K words bits each. MBM29LL800T/B offered 48-pin TSOP(I) 46-pin packages. device designed programmed in-system with standard system minimum supply. 12.0 required write erase operations. device also reprogrammed standard EPROM programmers. standard MBM29LL800T/B offers access times allowing operation high-speed microprocessors without wait states. eliminate contention device separate chip enable (CE), write enable (WE), output enable (OE) controls. MBM29LL800T/B command compatible with JEDEC standard 2PROMs. Commands written command register using standard microprocessor write timings. Register contents serve input internal state-machine which controls erase programming circuitry. Write cycles also internally latch addresses data needed programming erase operations. Reading data device similar reading from 12.0 Flash EPROM devices. MBM29LL800T/B programmed executing program command sequence. This will invoke Embedded Program Algorithm which internal algorithm that automatically times program pulse widths verifies proper cell margins. Typically, each sector programmed verified about seconds. Erase accomplished executing erase command sequence. This will invoke Embedded Erase Algorithm which internal algorithm that automatically preprograms array already programmed before executing erase operation. During erase, device automatically times erase pulse widths verifies proper cell margins. individual sector typically erased verified second. already preprogrammed.) device also features minimum sector erase architecture. sector mode allows each sector erased reprogrammed without affecting other sectors. MBM29LL800T/B erased when shipped from factory. device features minimum single power supply operation both read write functions. Internally generated regulated voltages provided program erase operations. detector automatically inhibits write operations loss power. program erase detected Data Polling DQ7, Toggle feature DQ6, RY/BY output pin. Once program erase cycle been comleted, device internally resets read mode. MBM29LL800T/B also hardware RESET pin. When this driven low, execution Embedded Program Algorithm Embedded Erase Algorithm terminated. internal state machine then reset read mode. RESET tied system reset circuitry. Therefore, system reset occurs during Embedded Program Algorithm Embedded Erase Algorithm, device automatically reset read mode will have erroneous data stored address locations being programmed erased. These locations need re-writing after Reset. Resetting device enables system's microprocessor read boot-up firmware from Flash memory. Fujitsu's Flash technology combines years Flash memory manufacturing experience produce highest levels quality, reliability, cost effectiveness. MBM29LL800T/B memory electrically erases bits within sector simultaneously Fowler-Nordhiem tunneling. bytes/words programmed byte/word time using EPROM programming mechanism electron injection.
MBM29LL800T-15S/MBM29LL800B-15S
FLEXIBLE SECTOR-ERASE ARCHITECTURE
word, words, word, fifteen words sectors word mode. byte, bytes, byte, fifteen bytes sectors byte mode. Individual-sector, multiple-sector, bulk-erase capability. Individual multiple-sector protection user definable. Sector SA10 SA11 SA12 SA13 SA14 SA15 SA16 SA17 SA18 Sector Size Kbytes Kwords Kbytes Kwords Kbytes Kwords Kbytes Kwords Kbytes Kwords Kbytes Kwords Kbytes Kwords Kbytes Kwords Kbytes Kwords Kbytes Kwords Kbytes Kwords Kbytes Kwords Kbytes Kwords Kbytes Kwords Kbytes Kwords Kbytes Kwords Kbytes Kwords Kbytes Kwords Kbytes Kwords Address Range 00000H 0FFFFH 10000H 1FFFFH 20000H 2FFFFH 30000H 3FFFFH 40000H 4FFFFH 50000H 5FFFFH 60000H 6FFFFH 70000H 7FFFFH 80000H 8FFFFH 90000H 9FFFFH A0000H AFFFFH B0000H BFFFFH C0000H CFFFFH D0000H DFFFFH E0000H EFFFFH F0000H F7FFFH F8000H F9FFFH FA000H FBFFFH FC000H FFFFFH Address Range 00000H 07FFFH 08000H 0FFFFH 10000H 17FFFH 18000H 1FFFFH 20000H 27FFFH 28000H 2FFFFH 30000H 37FFFH 38000H 3FFFFH 40000H 47FFFH 48000H 4FFFFH 50000H 57FFFH 58000H 5FFFFH 60000H 67FFFH 68000H 6FFFFH 70000H 77FFFH 78000H 7BFFFH 7C000H 7CFFFH 7D000H 7DFFFH 7E000H 7EFFFH
MBM29LL800T Boot Sector Architecture
MBM29LL800T-15S/MBM29LL800B-15S
Sector SA10 SA11 SA12 SA13 SA14 SA15 SA16 SA17 SA18
Sector Size Kbytes Kwords Kbytes Kwords Kbytes Kwords Kbytes Kwords Kbytes Kwords Kbytes Kwords Kbytes Kwords Kbytes Kwords Kbytes Kwords Kbytes Kwords Kbytes Kwords Kbytes Kwords Kbytes Kwords Kbytes Kwords Kbytes Kwords Kbytes Kwords Kbytes Kwords Kbytes Kwords Kbytes Kwords
Address Range 00000H 03FFFH 04000H 05FFFH 06000H 07FFFH 08000H 0FFFFH 10000H 1FFFFH 20000H 2FFFFH 30000H 3FFFFH 40000H 4FFFFH 50000H 5FFFFH 60000H 6FFFFH 70000H 7FFFFH 80000H 8FFFFH 90000H 9FFFFH A0000H AFFFFH B0000H BFFFFH C0000H CFFFFH D0000H DFFFFH E0000H EFFFFH F0000H FFFFFH
Address Range 00000H 01FFFH 02000H 02FFFH 03000H 03FFFH 04000H 07FFFH 08000H 0FFFFH 10000H 17FFFH 18000H 1FFFFH 20000H 27FFFH 28000H 2FFFFH 30000H 37FFFH 38000H 3FFFFH 40000H 47FFFH 48000H 4FFFFH 50000H 57FFFH 58000H 5FFFFH 60000H 67FFFH 68000H 6FFFFH 70000H 77FFFH 78000H 7FFFFH
MBM29LL800B Bottom Boot Sector Architecture
MBM29LL800T-15S/MBM29LL800B-15S
PRODUCT LINE
Part Speed Option
+0.3 -0.2
MBM29LL800T/800B -15S
Max. Address Access Time (ns) Max. Access Time (ns) Max. Access Time (ns)
BLOCK DIAGRAM
RY/BY Buffer
DQ15 RY/BY
Erase Voltage Generator
Input/Output Buffers
BYTE RESET
State Control
Command Register
Program Voltage Generator
Chip Enable Output Enable Logic
Data Latch
Y-Decoder
Y-Gating
Detector
Timer Program/Erase
Address Latch
X-Decoder
Cell Matrix
MBM29LL800T-15S/MBM29LL800B-15S
CONNECTION DIAGRAMS
TSOP(I) N.C. N.C. RESET N.C. N.C. RY/BY
(Marking Side)
MBM29LL800T/MBM29LL800B Standard Pinout
BYTE DQ15/A-1 DQ14 DQ13 DQ12 DQ11 DQ10
FPT-48P-M19 RY/BY N.C. N.C. RESET N.C. N.C.
(Marking Side)
MBM29LL800T/MBM29LL800B Reverse Pinout
DQ10 DQ11 DQ12 DQ13 DQ14 DQ15/A-1 BYTE
FPT-48P-M20
MBM29LL800T-15S/MBM29LL800B-15S
N.C. RESET DQ12 DQ13 DQ14 BYTE DQ15/A-1
(Marking Side)
MBM29LL800T/MBM29LL800B
RY/BY N.C. DQ11 DQ10
LCC-46P-M02
MBM29LL800T-15S/MBM29LL800B-15S
LOGIC SYMBOL
Table MBM29LL800T/B Configuration
DQ15 RESET BYTE RY/BY
Function Address Inputs Data Inputs/Outputs Chip Enable Output Enable Write Enable Ready/Busy Output Hardware Reset Pin/ Temporary Sector Unprotection Selects 8-bit 16-bit mode Connected Internally Device Ground Device Power Supply (2.4 +0.3 -0.2
A-1, DQ15 RY/BY RESET BYTE N.C.
MBM29LL800T-15S/MBM29LL800B-15S
Table Operation Auto-Select Manufacture Code Auto-Select Device Code Read Standby Output Disable Write (Program/Erase) Enable Sector Protection (2), Verify Sector Protection (2), Temporary Sector Unprotection Reset (Hardware)/Standby Table Operation Auto-Select Manufacture Code Auto-Select Device Code Read Standby Output Disable Write (Program/Erase) Enable Sector Protection (2), Verify Sector Protection (2), Temporary Sector Unprotection Reset (Hardware)/Standby MBM29LL800T/B User Operation (BYTE VIH) DQ15 RESET Code Code DOUT HIGH-Z HIGH-Z Code HIGH-Z
MBM29LL800T/B User Operation (BYTE VIL)
DQ-1
DQ15 RESET Code Code DOUT HIGH-Z HIGH-Z Code HIGH-Z HIGH-Z HIGH-Z HIGH-Z HIGH-Z HIGH-Z HIGH-Z HIGH-Z HIGH-Z HIGH-Z HIGH-Z
Legend: VIL, VIH, VIH.
pulse input. Characteristics voltage levels.
Notes: Manufacturer device codes also accessed command register write sequence. Table Refer section Sector Protection. VIL, initiates write operations. +0.1 -0.2
MBM29LL800T-15S/MBM29LL800B-15S
ORDERING INFORMATION
Standard Products
Fujitsu standard products available several packages. order number formed combination
MBM29LL800
PFTN
VOLTAGE RANGE Read, Write, Erase
PACKAGE TYPE PFTN 48-Pin Thin Small Outline Package (TSOP) Standard Pinout PFTR 48-Pin Thin Small Outline Package (TSOP) Reverse Pinout 46-Pin Small Outline Non-leaded Package SPEED OPTION Product Selector Guide
BOOT CODE SECTOR ARCHITECTURE sector Bottom sector DEVICE NUMBER/DESCRIPTION MBM29LL800 Mega-bit 8-Bit 512K 16-Bit) CMOS Flash Memory
MBM29LL800T-15S/MBM29LL800B-15S
FUNCTIONAL DESCRIPTION
Read Mode
MBM29LL800T/B control functions which must satisfied order obtain data outputs. power control should used device selection. output control should used gate data output pins device selected. Address access time (tACC) equal delay from stable addresses valid output data. chip enable access time (tCE) delay from stable addresses stable valid data output pins. output enable access time delay from falling edge valid data output pins. (Assuming addresses have been stable least tACC time.) When reading data without changing addresses after power-up, necessary input hardware reset change from "L". Figure timing specifications.
Standby Mode
There ways implement standby mode MBM29LL800T/B devices. using both RESET pins; other RESET only. When using both pins, CMOS standby mode achieved with RESET inputs both held ±0.3 Under this condition current consumed less than max. device read with standard access time (tCE) from either these standby modes. During Embedded Algorithm operation, active current (ICC2) required even "H". When using RESET only, CMOS standby mode achieved with RESET input held ±0.3 "L"). Under this condition current consumed less than max. standby mode, outputs high impedance state, independent input.
Automatic Sleep Mode
There function called automatic sleep mode restrain power consumption during read-out MBM29LL800T/B data. This mode used effectively with application requesting power consumption such handy terminals. activate this mode, MBM29LL800T/B automatically switches itself power mode when addresses remain stable necessary control this mode. During such mode, current consumed typically (CMOS Level). Standard address access timings provide data when addresses changed. While sleep mode, output data latched always available system.
Output Disable
input logic high level (VIH), output from device disabled. This will cause output pins high impedance state.
Autoselect
Autoselect mode allows reading binary code from device will identify manufacturer type. intent allow programming equipment automatically match device programmed with corresponding programming algorithm. Autoselect command also used check status write-protected sectors. (See Tables 4.2.) This mode functional over entire temperature range device. activate this mode, programming equipment must force (11.5 12.5 address identifier bytes then sequenced from devices outputs toggling address from VIH. addresses DON'T CARES except (See Table Table
MBM29LL800T-15S/MBM29LL800B-15S
manufacturer device codes also read command register, instances when MBM29LL800T/B erased programmed system without access high voltage pin. command sequence illustrated Table Command Definitions. Byte VIL) represents manufacture's code byte VIH) represents device identifier code. MBM29LL800T/B these bytes given Table 4.2. identifiers manufactures device will exhibit parity with defined parity bit. order read proper device codes when executing Autoselect, must VIL. (See Tables device indentification word mode (BYTE VIH), DQ13 equal DQ8, DQ10 DQ12, DQ14, DQ15 equal `0'. BYTE (for byte mode), device code (for boot block) (for bottom boot block). BYTE (for word mode), device code 22EAH (for boot block) 226BH (for bottom boot block). order determine which sectors write protected, must while running through sector addresses; selected sector protected, logical output (DQ0 =1). Table MBM29LL800T/B Sector Protection Verify Autoselect Code Type Manufacture's Code Byte MBM29LL800T Word Device Code Byte MBM29LL800B Word Sector Protection Byte mode. Outputs protected sector addresses outputs unprotected sector addresses. Table Expanded Autoselect Code Table Type Manufacture's Code
MBM29LL800T Device Code MBM29LL800B
A-1*1
Code (HEX) 22EAH 226BH 01H*2
Sector Addresses
Code DQ15 DQ14 DQ13 DQ12 DQ11 DQ10 A-1/0
HI-Z HI-Z HI-Z HI-Z HI-Z HI-Z HI-Z 22EAH
HI-Z HI-Z HI-Z HI-Z HI-Z HI-Z HI-Z 226BH
Sector Protection (B): Byte mode (W): Word mode
A-1/0
MBM29LL800T-15S/MBM29LL800B-15S
Table Sector Address SA10 SA11 SA12 SA13 SA14 SA15 SA16 SA17 SA18 Sector Address Tables (MBM29LL800T) Address Range Address Range 00000H 0FFFFH 10000H 1FFFFH 20000H 2FFFFH 30000H 3FFFFH 40000H 4FFFFH 50000H 5FFFFH 60000H 6FFFFH 70000H 7FFFFH 80000H 8FFFFH 90000H 9FFFFH A0000H AFFFFH B0000H BFFFFH C0000H CFFFFH D0000H DFFFFH E0000H EFFFFH F0000H F7FFFH F8000H F9FFFH FA000H FBFFFH FC000H FFFFFH 00000H 07FFFH 08000H 0FFFFH 10000H 17FFFH 18000H 1FFFFH 20000H 27FFFH 28000H 2FFFFH 30000H 37FFFH 38000H 3FFFFH 40000H 47FFFH 48000H 4FFFFH 50000H 57FFFH 58000H 5FFFFH 60000H 67FFFH 68000H 6FFFFH 70000H 77FFFH 78000H 7BFFFH 7C000H 7CFFFH 7D000H 7DFFFH 7E000H 7FFFFH
MBM29LL800T-15S/MBM29LL800B-15S
Table Sector Address SA10 SA11 SA12 SA13 SA14 SA15 SA16 SA17 SA18 Sector Address Tables (MBM29LL800B) Address Range Address Range 00000H 03FFFH 04000H 05FFFH 06000H 07FFFH 08000H 0FFFFH 10000H 1FFFFH 20000H 2FFFFH 30000H 3FFFFH 40000H 4FFFFH 50000H 5FFFFH 60000H 6FFFFH 70000H 7FFFFH 80000H 8FFFFH 90000H 9FFFFH A0000H AFFFFH B0000H BFFFFH C0000H CFFFFH D0000H DFFFFH E0000H EFFFFH F0000H FFFFFH 00000H 01FFFH 02000H 02FFFH 03000H 03FFFH 04000H 07FFFH 08000H 0FFFFH 10000H 17FFFH 18000H 1FFFFH 20000H 27FFFH 38000H 3FFFFH 30000H 37FFFH 28000H 2FFFFH 40000H 47FFFH 48000H 4FFFFH 50000H 57FFFH 58000H 5FFFFH 60000H 67FFFH 68000H 6FFFFH 70000H 77FFFH 78000H 7FFFFH
MBM29LL800T-15S/MBM29LL800B-15S
Write
Device erasure programming accomplished command register. command register written bringing VIL, while VIH. Addresses latched falling edge whichever occurs later, while data latched rising edge pulse, whichever occurs first. Standard microprocessor write timings used. Figures Refer Write Characteristics Erase/Programming Waveforms specific timing parameters.
Sector Protection
MBM29LL800T/B features hardware sector protection. This feature will disable both program erase operations number sectors through 18). sector protection feature enabled using programming equipment user's site. device shipped with sectors unprotected. activate this mode, programming equipment must force address control VIL, VIL, VIH. sector addresses pins (A18, A17, A16, A15, A14, A13, A12) should sector protected. Tables define sector address each nineteen (19) individual sectors. Programming protection circuitry begins falling edge pulse terminated with rising edge same. Sector addresses must held constant during pulse. figures sector protection waveforms algorithm. verify programming protection circuitry, programming equipment must force address with VIH. Scanning sector addresses (A18, A17, A16, A15, A14, A13, A12) while (A6, will produce logical device output protected sector. Otherwise device will produce unprotected sector. this mode, lower order addresses, except DON'T CARES. Address locations with reserved Autoselect manufacturer device codes. requires byte mode. also possible determine sector protected system writing Autoselect command. Performing read operation address location XX02H, where higher order addresses pins (A18, A17, A16, A15, A14, A13, A12) represents sector address will produce logical protected sector. Tables Autoselect codes.
Temporary Sector Unprotection
This feature allows temporary unprotection previously protected sectors MBM29LL800T/B devices order change data. Sector Unprotection mode activated setting RESET high voltage During this mode, formerly protected sectors programmed erased selecting sector addresses. Once taken away from RESET pin, previously protected sectors will protected again. (See Figures 24.)
MBM29LL800T-15S/MBM29LL800B-15S
Table Command Sequence (Notes
Read/Reset (Note Read/Reset (Note Autoselect Program (Notes Chip Erase Sector Erase (Note Sector Erase Suspend Sector Erase Resume
MBM29LL800T/B Command Definitions
Second First Third Fourth Fifth Sixth Write Write Cycle Write Cycle Read/Write Write Cycle Write Cycle Write Cycle Cycle Cycles Req'd
XXXXH 5555H AAAAH 5555H AAAAH 5555H AAAAH 5555H AAAAH 5555H AAAAH
Addr Data Addr Data Addr Data Addr Data Addr Data Addr Data
2AAAH 5555H 2AAAH 5555H 2AAAH 5555H 2AAAH 5555H 2AAAH 5555H
Word /Byte Word Byte Word Byte Word Byte Word Byte Word Byte Word /Byte Word /Byte
5555H AAAAH 5555H AAAAH 5555H AAAAH 5555H AAAAH 5555H AAAAH
5555H AAAAH 5555H AAAAH
2AAAH 5555H 2AAAH 5555H
5555H
AAAH
XXXXH XXXXH
Notes: Address bits address commands except Program Address (PA) Sector Address (SA). operations defined Tables Address memory location read. Address memory location programmed. Addresses latched falling edge pulse. Address sector erased. combination A18, A17, A16, A15, A14, A13, will uniquely select sector. Data read from location during read operation. Data programmed location Data latched rising edge system should generate following address patterns. Word Mode: 5555H 2AAAH addresses Byte Mode: AAAAH 5555H addresses A-1, Both Read/Reset commands functionally equivalent, resetting device read mode.
Command Definitions
Device operations selected writing specific address data sequences into command register. Writing incorrect address data values writing them improper sequence will reset device read mode. Table defines valid register command sequences. Note that Erase Suspend (B0H) Erase Resume (30H) commands valid only while Sector Erase operation progress. Moreover both Read/Reset commands functionally equivalent, resetting device read mode. Please note that commands always written DQ15 bits ignored.
MBM29LL800T-15S/MBM29LL800B-15S
Read/Reset Command
order return from Autoselect mode Exceeded Timing Limits (DQ5 read mode, read/reset operation initiated writing Read/Reset command sequence into command register. Microprocessor read cycles retrieve array data from memory. device remains enabled reads until command register contents altered. device will automatically power-up read/reset state. this case, command sequence required read data. Standard microprocessor read cycles will retrieve array data. This default value ensures that spurious alteration memory contents occurs during power transition. Refer Read Characteristics Waveforms specific timing parameters. (See Figure 5.2.)
Autoselect Command
Flash memories intended applications where local alters memory contents. such, manufactures device codes must accessible while device resides target system. PROM programmers typically access signature codes raising high voltage. However, multiplexing high voltage onto address lines generally desired system design practice. device contains Autoselect command operation supplement traditional PROM programming methodology. operation initiated writing Autoselect command sequence into command register. Following last command write, read cycle from address retrieves manufacture code 04H. read cycle from address (02H retrieves device code (MBM29LL800T MBM29LL800B mode; MBM29LL800T 22EAH MBM29LL800B 226BH mode). (See Tables 4.2.) manufactures device codes will exhibit parity with defined parity bit. Sector state (protection unprotection) will indicated address (04H Scanning sector addresses (A18, A17, A16, A15, A14, A13, A12) while (A6, will produce logical device output protected sector. programming verification should perform margin mode protected sector. (See Tables terminate operation, necessary write Read/Reset command sequence into register, also write Autoselect command during operation, execute after writing Read/Reset command sequence.
Word/Byte Programming
device programmed byte-by-byte word-by-word) basis. Programming four cycle operation. There "unlock" write cycles. These followed program set-up command data write cycles. Addresses latched falling edge whichever happens later data latched rising edge whichever happens first. rising edge last (whichever happens first) begins programming. Upon executing Embedded Program Algorithm command sequence, system required provide further controls timings. device will automatically provide adequate internally generated program pulses verify programmed cell margin. (See Figures automatic programming operation completed when data equivalent data written this which time device return read mode addresses longer latched. (See Table Hardware Sequence Flags.) Therefore, device requires that valid address supplied system this time. Hence, Data Polling must performed memory location which being programmed. commands written chip during this period will ignored. hardware reset occures during programming operation, impossible guarantee whether data being written correct not. Programming allowed sequence across sector boundaries. Beware that data cannot programmed back "1". Attempting either hang device result apparent success according data polling algorithm read from read/reset mode will show that data still "0". Only erase operations convert "0"s "1"s. Figure illustrates Embedded ProgramAlgorithm using typical command strings operations.
MBM29LL800T-15S/MBM29LL800B-15S
Chip Erase
Chip erase six-bus cycle operation. There "unlock" write cycles. These followed writing "set-up" command. more "unlock" write cycles then followed chip erase command. Chip erase does require user program device prior erase. Upon executing Embedded Erase Algorithm command sequence device will automatically program verify entire memory zero data pattern prior electrical erase. (Preprogram Function.) system required provide controls timings during these operations. automatic erase begins rising edge last pulse command sequence terminates when data (See Write Operation Status section.) which time device returns read mode. (See Figure Figure illustrates Embedded EraseAlgorithm using typical command strings operations.
Sector Erase
Sector erase six-bus cycle operation. There "unlock" write cycles, followed writing "set-up" command. more "unlock" write cycles then followed Sector Erase command. sector address (any address location within desired sector) latched falling edge while command (Data 30H) latched rising edge After time-out from rising edge last sector erase command, sector erase operation will begin. Multiple sectors erased concurrently writing six-bus cycle operations Table This sequence followed with writes Sector Erase command addresses other sectors desired concurrently erased. time between writes must less than otherwise that command will accepted erasure will start. recommended that processor interrupts disabled during this time guarantee this condition. interrupts re-enabled after last Sector Erase command written. time-out from rising edge last will initiate execution Sector Erase command(s). another falling edge occurs within time-out window timer reset. Monitor determine sector erase timer window still open. (See section DQ3, Sector Erase Timer.) command other than Sector Erase Erase Suspend during this time-out period will reset device read mode, ignoring previous command string. Resetting device once excution begun will corrupt data sector. that case, restart erase those sectors allow them complete. (Refer Write Operation Status section Sector Erase Timer operation.) Loading sector erase buffer done sequence with number sectors 18). Sector erase does require user program device prior erase. device automatically programs memory locations sector(s) erased prior electrical erase (Preprogram Function). When erasing sector sectors remaining unselected sectors affected. system required provide controls timings during these operations. (See Figure automatic sector erase begins after time from rising edge pulse last sector erase command pulse terminates when data (See Write Operation Status section) which time device returns read mode. Data polling must performed address within sectors being erased. Figure illustrates Embedded EraseAlgorithm using typical command strings operations.
Erase Suspend/Resume
Erase Suspend command allows user interrupt Sector Erase operation then perform data reads from program sector being erased. This command applicable ONLY during Sector Erase operation which includes time-out period sector erase. Erase Suspend command will ignored written during Chip Erase operation Embedded Program Algorithm. Writting Erase Suspend command during Sector Erase time-out results immediate termination time-out period suspension erase operation.
MBM29LL800T-15S/MBM29LL800B-15S
Writing Erase Resume command resumes erase operation. addresses "DON'T CARES" when writing Erase Suspend Erase Resume commands. When Erase Suspend command written during Sector Erase operation, device will take maximum suspend erase operation. When devices have entered erase-suspended mode, output will logic "1", will stop toggling. user must address erasing sector reading determine erase operation been suspended. Further writes Erase Suspend command ignored. When erase operation been suspended, device defaults erase-suspend-read mode. Reading data this mode same reading from standard read mode except that data must read from sectors that have been erase-suspended. Successively reading from erase-suspended sector while device erase-suspend-read mode will cause toggle. (See section DQ2.) After entering erase-suspend-read mode, user program device writing appropriate command sequence Program. This Program mode known erase-suspend-program mode. Again, programming this mode same programming regular Program mode except that data must programmed sectors that erase-suspended. Successively reading from erase-suspended sector while devices erase-suspend-program mode will cause toggle. erasesuspended Program operation detected RY/BY output pin, Data polling DQ7, Toggle (DQ6) which same regular Program operation. Note that must read from Program address while read from address. resume operation Sector Erase, Resume command (30H) should written. further writes Resume command this point will ignored. Another Erase Suspend command written after chip resumed erasing.
Address Sensitivity Write Status Flags
Detailed Table status flags that used check status device current mode operation. During sector erase, part provides status flags automatically ports. information address sensitive. This means that address from erasing sector consecutively read, then will toggle. However, will toggle address from non-erasing sector consecutively read. This allows user determine which sectors erasing which not. Once erase suspend entered, address sensitivity still applies. address non-erasing sector (that available read) provided, then stored data read from device. address erasing sector (that unavailable read) applied, device will output status bits.
MBM29LL800T-15S/MBM29LL800B-15S
Write Operation Status
Table Status Byte Word Programming Program/Erase Anto-Erase Progress Erase Sector Address Erase Suspend Mode Non-Erase Sector Address Program Erase Suspend Exceeded Time Limits Byte Word Programming Program/Erase Anto-Erase Program Erase Suspend Hardware Sequence Flags Data Toggle Toggle Toggle Data Data Data Toggle (Note Toggle (Note Data (Note (Note Toggle (Note Toggle RY/BY
Toggle (Note Toggle Toggle Toggle
Notes: toggled when sector address applied that erasing erase suspended sector. Coversely, cannot toggled when sector address applied that non-erasing non-erase suspended sector. therefore used determine which sectors erasing erase suspended which not. These status flags apply when outputs read from address non-erase-suspended sector. high (exceeded timing limits), successive reads from problem sector will cause toggle. reserved pins future use. Fujitsu internal only. Data Polling MBM29LL800T/B device features Data Polling method indicate host that Embedded Algorithms progress completed. During Embedded Program Algorithm, attempt read devices will produce complement data last written DQ7. Upon completion Embedded Program Algorithm, attempt read device will produce true data last written DQ7. During Embedded Erase Algorithm, attempt read device will produce output. Upon completion Embedded Erase Algorithm attempt read device will produce output. flowchart Data Polling (DQ7) shown Figure chip erase sector erase, Data Polling valid after rising edge sixth pulse six-write pulse sequence. Data Polling must performed sector address within sectors being erased protected sector. Otherwise, status valid. Once Embedded Algorithm operation close being completed, MBM29LL800T/B data pins (DQ7) change asynchronously while output enable (OE) asserted low. This means that device driving status information instant time then that byte's valid data next instant time. Depending when system samples output, read status valid data. Even device completed Embedded Program Algorithm operation valid data, data outputs still invalid. valid data will read successive read attempts. Data Polling feature only active during Embedded Programming Algorithm, Embedded Erase Algorithm sector erase time-out. (See Table Figure Data Polling timing specifications diagrams.
MBM29LL800T-15S/MBM29LL800B-15S
Toggle MBM29LL800T/B also feature "Toggle method indicate host system that Embedded Algorithms progress completed. During Embedded Program Erase Algorithm cycle, successive attempts read toggling) data from device will result toggling between zero. Once Embedded Program Erase Algorithm cycle completed, will stop toggling valid data read next successive attempts. During programming, Toggle valid after rising edge fourth pulse four write pulse sequence. chip erase sector erase, Toggle valid after rising edge sixth pulse sixwrite pulse sequence. Toggle active during sector time out. programming, sector being written protected, toggle will toggle about then stop toggling without data having changed. erase, device will erase selected sectors except ones that protected. selected sectors protected, chip will toggle toggle about then drop back into read mode, having changed none data. Either toggling will cause toggle. addition, Erase Suspend/Resume command will cause toggle. Figure Figure Toggle timing specifications diagrams. Exceeded Timing Limits will indicate program erase time exceeded specified limits (internal pulse count). Under these conditions will produce "1". This failure condition which indicates that program erase cycle successfully completed. Data Polling only operating function device under this condition. circuit will partially power down device under these conditions approximately mA). pins will control output disable functions described Tables failure condition also appear user tries program blank location without erasing. this case device locks never completes Embedded Algorithm operation. Hence, system never reads valid data never stops toggling. Once device exceeded timing limits, will indicate "1." Please note that this device failure condition since device incorrectly used. this occurs, reset device with command sequence. Sector Erase Timer After completion initial sector erase command sequence sector erase time-out will begin. will remain until time-out complete. Data Polling Toggle valid after initial sector erase command sequence. Data Polling Toggle indicates device been written with valid erase command, used determine sector erase timer window still open. high ("1") internally controlled erase cycle begun; attempts write subsequent commands device will ignored until erase operation completed indicated Data Polling Toggle ("0"), device will accept additional sector erase commands. insure command been accepted, system software should check status prior following each subsequent sector erase command. high second status check, command have been accepted. Table Hardware Sequence Flags. Toggle This toggle along with DQ6, used determine whether device Embedded Erase Algorithm Erase Suspend.
MBM29LL800T-15S/MBM29LL800B-15S
Successive reads from erasing sector will cause toggle during Embedded Erase Algorithm. device erase-suspended-read mode, successive reads from erase-suspended sector will cause toggle. When device erase-suspended-program mode, successive reads from byte address non-erase suspended sector will indicate logic DQ2. different from that toggles only when standard program Erase, Erase Suspend Program operation progress. example, used together determine erase-suspend-read mode progress. (DQ2 toggles while does not.) also Table Figure Furthermore, also used determine which sector being erased. When device erase mode, toggles this read from erasing sector. Table Mode Program Erase Erase-Suspend Read (Erase-Suspended Sector) (Note Erase-Suspend Program (Note Toggle Status Toggles Toggles Toggles Toggles Toggles (Note
Notes: These status flags apply when outputs read from sector that been erase suspended. These status flags apply when outputs read from byte/word address non-erase suspended sector. RY/BY Ready/Busy MBM29LL800T/B provides RY/BY open-drain output indicate host system that Embedded Algorithms either progress been completed. output low, device busy with either program erase operation. output high, device ready accept read/write erase operation. When RY/BY low, devices will accept additional program erase commands with exception Erase Suspend command. MBM29LL800T/B placed Erase Suspend mode, RY/BY output will high, means connecting with pull-up resister VCC. During programming, RY/BY driven after rising edge fourth pulse. During erase operation, RY/BY driven after rising edge sixth pulse. RY/BY will indicate busy condition during RESET pulse. Figure detailed timing diagram. RY/BY pulled high standby mode. Since this open-drain output, RY/BY pins tied together parallel with pull-up resistor VCC. RESET Hardware Reset MBM29LL800T/B device reset driving RESET VIL. RESET pulse requirement kept (VIL) least order properly reset internal state machine. operation process being executed will terminated internal state machine will reset read mode after RESET driven low. Furthermore, once RESET goes high, device requires additional before allows read access. When RESET low, device will standby mode duration pulse data output pins will tri-stated. hardware reset occurs during program erase operation, data that particular location will corrupted. Please note that RY/BY output signal should ignored during RESET pulse. Refer Figure timing diagram. Refer Temporary Sector Unprotection additional functionality.
MBM29LL800T-15S/MBM29LL800B-15S
hardware reset occurs during Embedded Erase Algorithm, there possibility that erasing sector(s) used.
Word/Byte Configuration
BYTE selects byte (8-bit) mode word (16-bit) mode MBM29LL800T/B device. When this driven high, device operates word (16-bit) mode. data read programmed DQ15. When this driven low, device operates byte (8-bit) mode. Under this mode, DQ15/A-1 becomes lowest address DQ14 bits tri-stated. However, command cycle always 8-bit operation hence commands written DQ15 bits ignored. Refer Figures timing diagrams.
Data Protection
MBM29LL800T/B designed offer protection against accidental erasure programming caused spurious system level signals that exist during power transitions. During power device automatically resets internal state machine read mode. Also, with control register architecture, alteration memory contents only occurs after successful completion specific multi-bus cycle command sequence. device also incorporates several features prevent inadvertent write cycles resulting form power-up power-down transitions system noise.
Write Pulse "Glitch" Protection
Noise pulses less than (typical) will change command registers.
Logical Inhibit
Writing inhibited holding VIL, VIH, VIH. initiate write, must logical zero while logical one.
Power-up Write Inhibit
Power-up devices with will accept commands rising edge internal state machine automatically reset read mode power-up.
Handling Package
metal portion marking side connected with internal chip electrically. Please attention occur electrical connection during operation. worst case, caused permanent damage device system excessive current.
MBM29LL800T-15S/MBM29LL800B-15S
ABSOLUTE MAXIMUM RATINGS
Storage Temperature -55°C +125°C Ambient Temperature with Power Applied -25°C +85°C Voltage with respect Ground pins except RESET (Note -0.5 +VCC +0.5 (Note -0.5 +5.5 RESET (Note -0.5 +13.0 Notes: Minimum voltage input pins -0.5 During voltage transitions, inputs negative overshoot -2.0 periods Maximum voltage output pins +0.5 During voltage transitions, outputs positive overshoot +2.0 periods Minimum input voltage RESET pins -0.5 During voltage transitions, RESET pins negative overshoot -2.0 periods Maximum input voltage RESET pins +13.0 which positive overshoot 14.0 periods Voltage difference between input voltage supply voltage (VIN VCC) exeed WARNING: Semiconductor devices permanently damaged application stress (voltage, current, temperature, etc.) excess absolute maximum rating conditions. exceed these ratings.
RECOMMENDED OPERATING RANGES
Commercial Devices Ambient Temperature (TA) .-20°C +70°C Supply Voltages MBM29LL800T-15S/B-15S .+2.2 +2.7 Operating ranges define those limits between which functionality device quaranteed. WARNING: Recommended operating conditions normal operating ranges semiconductor device. device's electrical characteristics warranted when operated within these ranges. Always semiconductor devices within recommended operating conditions. Operation outside these ranges adversely affect reliability could result device failure. warranty made with respect uses, operating conditions, combinations represented data sheet. Users considering application outside listed conditions advised contact their FUJITSU representative beforehand.
MBM29LL800T-15S/MBM29LL800B-15S
MAXIMUM OVERSHOOT
+0.6 -0.5 -2.0
Figure
Maximum Negative Overshoot Waveform
+2.0 +0.5 +2.0
Figure
Maximum Positive Overshoot Waveform
+14.0 +13.0 +0.5
Note This waveform applied RESET.
Figure
Maximum Positive Overshoot Waveform
MBM29LL800T-15S/MBM29LL800B-15S
CHARACTERISTICS
Parameter Symbol ILIT ICC1 ICC2 ICC3 ICC4 Parameter Description Input Leakage Current Output Leakage Current RESET Inputs Leakage Current Active Current (Note Active Current (Note Current (Standby) Current during Reset (Standby) Test Conditions VCC, Max. VOUT VCC, Max. Max., RESET 12.5 Byte VIL, Word VIL, Max., ±0.3 RESET ±0.3 Max., RESET ±0.3 Min. -1.0 -1.0 Max. +1.0 +1.0 Unit
ICC5
Max., RESET ±0.3 Current (Automatic Sleep Mode) (Note ±0.3 ±0.3 ±0.3 Input Level Input High Level Voltage Autoselect Sector Protection (A9, RESET) (Note Output Voltage Level Output High Voltage Level Min. -2.0 Min. -100 Min.
VOH1 VOH2
-0.5 11.5
12.5
Notes: current listed includes both operating current frequency dependent component MHz).The frequency component typically mA/MHz, with VIH. active while Embedded Erase Embedded Program progress. Automatic sleep mode enables power mode when address remain stable (VID VCC) exceed
MBM29LL800T-15S/MBM29LL800B-15S
CHARACTERISTICS
Read Only Operations Characteristics Parameter Symbols JEDEC tAVAV tAVQV tELQV tGLQV tEHQZ tGHQZ tAXQX Standard tACC tREADY tELFL tELFH Read Cycle Time Address Output Delay Chip Enable Output Delay Output Enable Output Delay Chip Enable Output HIGH-Z Output Enable Output HIGH-Z Output Hold Time From Address, Whichever Occurs First RESET Read Mode BYTE Switching High Min. Max. Max. Max. Max. Max. Min. Max. Max. -15S (Note)
Description
Test Setup
Unit
Note: Test Conditions: Output Load: only Input rise fall times: Input pulse levels: Timing measurement reference level Input: Output:
Device Under Test
Note: including capacitance
Figure
Test Conditions
MBM29LL800T-15S/MBM29LL800B-15S
Write (Erase/Program) Operations Parameter Symbols Description JEDEC tAVAV tAVWL tWLAX tDVWH tWHDX Standard tOES tOEH Write Cycle Time Address Setup Time Address Hold Time Data Setup Time Data Hold Time Output Enable Setup Time Output Enable Read Hold Time Toggle Data Polling Read Recover Time before Write High Low) Read Recover Time before Write High Low) Setup Time Setup Time Hold Time Hold Time Write Pulse Width Pulse Width Write Pulse Width High Pulse Width High Byte tWHWH1 tWHWH2 tWHWH1 tWHWH2 tEOE tVCS tVLHT tWPP tOESP tCSP Programming Operation Word Sector Erase Operation (Note Delay Time from Embedded Output Enable Setup Time Voltage Transition Time (Note Write Pulse Width (Note Setup Time Active (Note Setup Time Active (Note Write Recover Time from RY/BY Typ. Max. Min. Min. Min. Min. Min. Min. Typ. Min. Min. Min. Min. Min. Min. Min. Min. Min. Min. Min. Min. Min. Min. Min. Min. Min. Min. -15S Unit
tGHWL tGHEL tELWL tWLEL tWHEH tEHWH tWLWH tELEH tWHWL tEHEL
tGHWL tGHEL tWPH tCPH
(Continued)
MBM29LL800T-15S/MBM29LL800B-15S
(Continued)
Parameter Symbols Description JEDEC Standard tBUSY tEOE RESET High Time before Read Program/Erase Valid RY/BY Delay Delay Time from Embedded Output Enable Min. Min. Max. Max. Max. Min. Min. Min. -15S Unit
tELFL/tELFH BYTE Switching High tFLQZ tFHQV tVIDR BYTE Switching Output HIGH-Z BYTE Switching High Output Active Rise Time (Note RESET Pulse Width
Notes: This does include preprogramming time. This timing Sector Protection operation.
MBM29LL800T-15S/MBM29LL800B-15S
SWITCHING WAVEFORMS
Switching Waveforms
WAVEFORM
INPUTS Must Steady Change from Change from "L": Change Permitted Does Apply
OUTPUTS Will Steady Will Change from Will Change from Changing, State Unknown Center Line HighImpedance "Off" State
Addresses
Addresses Stable
tACC
tOEH
Outputs
HIGH-Z
Output Valid
HIGH-Z
Figure
Waveforms Read Operations
MBM29LL800T-15S/MBM29LL800B-15S
Addresses
tACC
Addresses Stable
RESET
Outputs
HIGH-Z
Output Valid
Figure
Waveforms Hardware Reset/Read Operations
MBM29LL800T-15S/MBM29LL800B-15S
Cycle Addresses
5555H
Data Polling
tGHWL tWPH tWHWH1
Data
DOUT
DOUT
Notes:
address memory location programmed. data programmed word address. output complement data written device. DOUT output data written device. Figure indicates last cycles four cycle sequence. These waveforms mode. (The addresses differ from mode.)
Figure
Alternate Waveforms Program Operations
MBM29LL800T-15S/MBM29LL800B-15S
Cycle
Data Polling
Addresses
5555H
tGHEL tCPH tWHWH1
DOUT
Data
Notes:
address memory location programmed. data programmed word address. output complement data written device. DOUT output data written device. Figure indicates last cycles four cycle sequence. These waveforms mode. (The addresses differ from mode.)
Figure
Alternate Controlled Program Operations
MBM29LL800T-15S/MBM29LL800B-15S
Addresses
5555H
2AAAH
5555H
5555H
2AAAH
tGHWL tWPH
Sector Erase
Data
tVCS
Notes: sector address Sector Erase. Addresses 5555H (Word), AAAAH (Byte) Chip Erase. These waveforms mode. (The addresses differ from mode.)
Figure
Waveforms Chip/Sector Erase Operations
MBM29LL800T-15S/MBM29LL800B-15S
tOEH
Data Valid Data
High-Z
tWHWH1
High-Z
(DQ0 DQ6)
Data
Output Flag
Valid Data
(tEOE)**
Valid Data (The device completed Embedded operation.) Maximam delay time expected until data valid after Embedded Operation been completed. Figure Waveforms Data Polling during Embedded Algorithm Operations
tOEH
tOES
Data Toggle Toggle Stop Toggling Data Valid
Stops toggling. (The device completed Embedded operation.) Figure Waveforms Toggle during Embedded Algorithm Operations
MBM29LL800T-15S/MBM29LL800B-15S
rising edge last signal
Entire programming erase operations
RY/BY
tBUSY
Figure
RY/BY Timing Diagram during Program/Erase Operations
RESET
RY/BY
tREADY
Figure
RESET, RY/BY Timing Diagram
MBM29LL800T-15S/MBM29LL800B-15S
BYTE
DQ14 tELFH
tFHQV
DQ14
DQ15/A-1
DQ15
Figure
Timing Diagram Word Mode Configuration
BYTE
tELFL DQ14
DQ14
DQ15/A-1
DQ15 tFLQZ
Figure
Timing Diagram Byte Mode Configuration
MBM29LL800T-15S/MBM29LL800B-15S
falling edge last write pulse
BYTE
tSET (tAS)
Input Valid
tHOLD (tAH)
Figure
BYTE Timing Diagram Write Operations
MBM29LL800T-15S/MBM29LL800B-15S
A18, A17, A15, A14,
tVLHT tWPP tVLHT tVLHT
tVLHT tOESP tCSP
tVCS
Data
Sector Address initial sector Sector Address next sector Note: byte mode. Figure Waveforms Sector Protection Timing Diagram
MBM29LL800T-15S/MBM29LL800B-15S
RESET
tVCS
tVIDR
tVLHT Program Erase Command Sequence
tVLHT RY/BY
Figure
Temporary Sector Unprotection Timing Diagram
Enter Embedded Erasing
Erase Suspend Erase
Enter Erase Suspend Program Erase Suspend Program
Erase Resume Erase Suspend Read Erase Erase Complete
Erase Suspend Read
Toggle with
Note: read from erase-suspended sector. Figure
MBM29LL800T-15S/MBM29LL800B-15S
EMBEDDED PROGRAM ALGORITHM
Start
Write Program Command Sequence (See Below)
Data Polling Device
Verify Byte
Increment Address
Last Address
Programming Completed
Program Command Sequence* (Address/Command):
5555H/AAH
2AAAH/55H
5555H/A0H
Program Address/Program Data
sequence applied mode. addresses differ from mode.
Figure
Embedded ProgramAlgorithm
MBM29LL800T-15S/MBM29LL800B-15S
EMBEDDED ERASE ALGORITHM
Start
Write Erase Command Sequece (See Below) Data Polling Toggle from Device
Data Erasure Completed
Chip Erase Command Sequence* (Address/Command): 5555H/AAH
Individual Sector/Multiple Sector* Erase Command Sequence (Address/Command): 5555H/AAH
2AAAH/55H
2AAAH/55H
5555H/80H
5555H/80H
5555H/AAH
5555H/AAH
2AAAH/55H
2AAAH/55H
5555H/10H
Sector Address/30H
Sector Address/30H
Additional sector erase commands optional.
Sector Address/30H
sequence applied mode. addresses differ from mode.
Figure
Embedded EraseAlgorithm
MBM29LL800T-15S/MBM29LL800B-15S
Start
Read Byte (DQ0 DQ7) Addr.
Data? Read Byte (DQ0 DQ7) Addr.
Address programming sector addresses within sector being erased during sector erase multiple erases operation. sector addresses within sector being protected during sector erase multiple sector erases operation.
Data? Fail
Pass
Note: rechecked even because change simultaneously with DQ5. Figure Data Polling Algorithm
MBM29LL800T-15S/MBM29LL800B-15S
Start
Read Byte (DQ0 DQ7) Addr.
Toggle Read Byte (DQ0 DQ7) Addr. ="H"
Toggle Fail Pass
Note: rechecked even because stop toggling same time changing "1". Figure Toggle Algorithm
MBM29LL800T-15S/MBM29LL800B-15S
Start
Setup Sector Addr. (A18, A17, A16, A15, A14, A13, A12)
PLSCNT
VID, VIL, RESET VIL,
Activate Pulse Increment PLSCNT
Time
VIH, should remain Read from Sector VIH, VIL, Addr. VIL)* PLSCNT Remove from Write Reset Command Data 01H? Protect Another Sector? Device Failed Remove from Write Reset Command
Sector Protection Completed
byte mode. Figure Sector Protection Algorithm
MBM29LL800T-15S/MBM29LL800B-15S
Start
RESET (Note
Perform Erase Program Operations
RESET
Temporary Sector Unprotection Completed (Note
Notes: protected sectors unprotected. previously protected sectors protected once again.
Figure
Temporary Sector Unprotection Algorithm
MBM29LL800T-15S/MBM29LL800B-15S
ERASE PROGRAMMING PERFORMANCE
Limits Parameter Min. Sector Erase Time Byte Programming Time Word Programming Time Chip Programming Time Erase/Program Cycle 100,000 Typ. Max. 3,600 5,200 cycles Excludes programming time prior erasure Excludes system-level overhead Excludes system-level overhead Unit Comments
TSOP(I) CAPACITANCE
Parameter Symbol COUT CIN2 Parameter Description Input Capacitance Output Capacitance Control Capacitance Test Setup VOUT Typ. T.B.D T.B.D T.B.D Max. T.B.D T.B.D T.B.D Unit
Note: Test conditions 25°C,
CAPACITANCE
Parameter Symbol COUT CIN2 Parameter Description Input Capacitance Output Capacitance Control Capacitance Test Setup VOUT Typ. T.B.D T.B.D T.B.D Max. T.B.D T.B.D T.B.D Unit
Note: Test conditions 25°C,
MBM29LL800T-15S/MBM29LL800B-15S
PACKAGE DIMENSIONS
48-Pin plastic TSOP(I) (FPT-48P-M19)
LEAD
Resin Protrusin: (Each Side: 0.15 (.006)MAX)
INDEX
Details part 0.15(.006)
0.15(.006)
0.35(.014) 0.25(.010)
20.00±0.20 (.787±.008) 18.40±0.20 (.724±.008)
12.00±0.20 (.472±.008) 11.50REF (.460)
1.10 -0.05 +.004 .043 -.002
MOUNTING HEIGHT
+0.10
0.10(.004)
0.50(.0197) 0.15±0.05 (.006±.002) 0.20±0.10 (.008±.004)
0.05(0.02)MIN STAND 0.10(.004)
19.00±0.20 (.748±.008)
0.50±0.10 (.020±.004)
1996 FUJITSU LIMITED F48029S-2C-2
Dimensions (inches)
48-Pin plastic TSOP(I) (FPT-48P-M20)
LEAD
Resin Protrusin: (Each Side: 0.15 (.006)MAX)
INDEX
Details part 0.15(.006)
0.15(.006)
0.35(.014) 0.25(.010)
19.00±0.20 (.748±.008)
0.50±0.10 (.020±.004) 0.15±0.10 (.006±.002) 0.20±0.10 (.008±.004) 0.10(.004)
0.10(.004)
0.50(.0197)
0.05(0.02)MIN STAND
18.40±0.20 (.724±.008) 20.00±0.20 (.787±.008)
11.50(.460)REF 12.00±0.20(.472±.008)
1.10 -0.05 +.004 .043 -.002
MOUNTING HEIGHT
+0.10
1996 FUJITSU LIMITED F48030S-2C-2
Dimensions (inches)
MBM29LL800T-15S/MBM29LL800B-15S
46-Pin plastic (LCC-46P-M02)
*12.00±0.10(.472±.004)
Note Resin residue marked dimentions 0.15 single side. Note geometory change with modes.
0.75(.030)MAX (TOTAL HEIGHT)
0.50(.020)TYP
10.10±0.20 (.398±.008) 10.00±0.10 (.394±.004)
INDEX
0.05(.002)
Details part 0.10(.004)TYP
Details part *0.50(.020)TYP
0.05(.002)
0(0)MIN (STAND OFF)
0.50(.020)TYP 0.32±0.05 (.013±.002)
1997 FUJITSU LIMITED C46002S-4C-3
Dimensions (inches)
MBM29LL800T-15S/MBM29LL800B-15S
FUJITSU LIMITED
further information please contact:
Japan FUJITSU LIMITED Corporate Global Business Support Division Electronic Devices KAWASAKI PLANT, 4-1-1, Kamikodanaka Nakahara-ku, Kawasaki-shi Kanagawa 211-88, Japan Tel: (044) 754-3763 Fax: (044) 754-3329
Rights Reserved. contents this document subject change without notice. Customers advised consult with FUJITSU sales representatives before ordering. information circuit diagrams this document presented examples semiconductor device applications, intended incorporated devices actual use. Also, FUJITSU unable assume responsibility infringement patent rights other rights third parties arising from this information circuit diagrams. FUJITSU semiconductor devices intended standard applications (computers, office automation other office equipment, industrial, communications, measurement equipment, personal household devices, etc.). CAUTION: Customers considering products special applications where failure abnormal operation directly affect human lives cause physical injury property damage, where extremely high levels reliability demanded (such aerospace systems, atomic energy controls, floor repeaters, vehicle operating controls, medical devices life support, etc.) requested consult with FUJITSU sales representatives before such use. company will responsible damages arising from such without prior approval. semiconductor devices have inherently certain rate failure. must protect against injury, damage loss from such failures incorporating safety design measures into your facility equipment such redundancy, fire protection, prevention over-current levels other abnormal operating conditions. products described this document represent goods technologies subject certain restrictions export under Foreign Exchange Foreign Trade Control Japan, prior authorization Japanese government should required export those products from Japan.
http://www.fujitsu.co.jp/
North South America FUJITSU MICROELECTRONICS, INC. Semiconductor Division 3545 North First Street Jose, 95134-1804, U.S.A. Tel: (408) 922-9000 Fax: (408) 922-9179 Customer Response Center Mon. Fri.: (PST) Tel: (800) 866-8608 Fax: (408) 922-9179
http://www.fujitsumicro.com/
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http://www.fujitsu-ede.com/
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http://www.fmap.com.sg/
F9709 FUJITSU LIMITED Printed Japan

FLASH MEMORY CMOS 8/512K MBM29LL800T-15S/MBM29LL800B-15

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