Quality Reliability Report 2005 DC04-0001 Page Revision Tabl
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Quality Reliability Report 2005
DC04-0001 Page Revision
Table Contents
Table Contents
CHAPTER ZILOG'S QUALITY CULTURE RELIABILITY QUALITY ASSURANCE POLICY STATEMENT. ZiLOG QUALITY POLICY ZiLOG'S QUALITY RELIABILITY PROGRAM. Training. Order Acknowledgment Policy Test Guardbanding Product Characterization Process Qualification. Product Qualification Measurement, Direct Indirect. Measurement Direct Indirect Field Quality Engineers. Product Analysis Total Quality Program. Environmental Protection Recycling ZiLOG ENVIRONMENTAL, HEALTH SAFETY POLICY CERTIFICATION 9000 CERTIFICATION FOUNDRIES/SUBCONTRACTORS. QUALITY RELIABILITY TREND CHARTS. Rate (FIT Failure Time: Failures Billion Hours). Electrical. R/QA Organizational Chart CHAPTER CUSTOMER QUALITY SUPP0RT SYSTEM CUSTOMER FAILURE ANALYSIS/CORRELATION PROCEDURE Guideline Information Needed Factory With CFA's. Summary Test Equipment. Summary Test Equipment. Summary Test Equipment. CUSTOMER NOTIFICATION SYSTEM CHAPTER QUALIFICATION REQUIREMENTS. Product/Process Qualification Requirements. Product/Process Qualification Requirements. ZiLOG Product Qualification Summary Package Qualification Requirements
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Table Contents
ZiLOG Package Qualification Summary CHAPTER QUALITY MONITOR SYSTEMS FAILURE RATE PREDICTION CALCULATIONS Z85230VSC Rate Calculation TESTING METHODOLOGY. LATCHUP TESTING METHODOLOGY. ZiLOG'S RELIABILITY SUMMARY EARLY LIFE LONG TERM LIFE PRESSURE POT. TEMPERATURE CYCLE. HIGHLY ACCELERATED STRESS TEST PACKAGE INTEGRITY TEST Reliability Monitor Testing Requirements Early Life Test, HRS, 125°C Long-Term Life Test, 150°C, 5V,184 HRS. Long-Term Life Test, 125°C,1000 Early Life Test Summary. Long-Term Life Test Summary. Pressure Test, 121°C, ATM. Temperature/Humidity Test, 85°C/85% Temperature Cycling Test, Condition -65°C 150°C Highly Accelerated Stress Test (HAST), 140°C ATM. Package Integrity Test C-Mode Scanning Acoustic Microscope Monitor. CHAPTER PACKAGE TEST INFORMATION PACKAGE TYPES. TECHNOLOGY DATA. PRE/POST PACKAGING DEVICE TEST PROCEDURES REDUCTION HAZARDOUS SUBSTANCES/LEAD-FREE PACKAGING PLASTICS PROCESS FLOW. PLASTIC-STANDARD ASSEMBLY/TEST PROCESS HANDLING STORAGEOF SURFACE MOUNT DEVICES HANDLING. LEAD PROTECTION PROTECTION. STORAGE UNPACKING CAUTION SOLDERING. DESOLDERING. THERMAL CHARACTERISTICS Calculation Device Junction Temperature Device Table Summary Thermal Characteristics ZiLOG Plastic Packages Device Table Summary Thermal Resistance Hermetic Packages CHAPTER QUALITY SYSTEMS
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Table Contents
QUALITY SYSTEMS SUBCONTRACTING. TRACEABILITY AVAILABILITY DOCUMENTATION MONITORING. QUALITY DATA TESTING (QA/Operating). TEST TAPE SUPPORT. WHAT HAPPENS WHEN FAILURES OCCUR?. WHEN MANUFACTURING PERFORMED OFFSHORE, WHAT CONTROLS? AVAILABILITY PROGRAMMING FACILITIES. AUDIT. DOCUMENT CONTROL SYSTEM. FLOW CHART CHAPTER QUALITY RELIABILITY GLOSSARY.
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Chapter ZiLOG's Quality Culture
CHAPTER
ZiLOG's Quality Culture
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Chapter ZiLOG's Quality Culture
ZiLOG's Quality Culture
RELIABILITY QUALITY ASSURANCE POLICY STATEMENT
ZiLOG's philosophy towards quality been consistently aimed continuous product improvement optimization processes associated with design, manufacture, test delivery products that conform established requirements total customer satisfaction. been ZiLOG tradition that customer main driving force company-wide goal achieve highest quality possible. Through excellent management personnel, equipment, materials, environmental resources, ZiLOG well positioned success.
ZiLOG QUALITY POLICY
Positive Customer Experience Through: Attitude Involved Employees Integrity Honesty Continuous Improvement Exceeding Expectations Best Class Products/Service
Mike Burgdorf Director Reliability Quality Assurance
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Chapter ZiLOG's Quality Culture
ZiLOG'S QUALITY RELIABILITY PROGRAM
ZiLOG's Quality Reliability Program based careful study principles laid down such pioneers Deming Juran. Even more importantly, have benefited from observation practical implementation those principles practiced Japanese, European American manufacturing facilities. ZiLOG program begins with employee involvement. Whether judgment performance based perfection with incoming inspection, trouble free service field, timely accurate customer service, recognize that employees ultimately control these factors. Hence, quality program broadly shared throughout organization. Training integrity product design depends skills employees. ZiLOG training emphasizes fundamentals involved product design processing quality reliability. Customer Service, important aspect ZiLOG's quality performance vendor, also depends upon people clearly understanding their jobs obligations customers. This aspect training also part overall curriculum administered ZiLOG. Order Acknowledgment Policy definition vendor quality performance that vendor "does what promises acknowledges." Acceptable reliability quality achieved only ZiLOG customer agreement product delivery specifications. Test Guardbanding physical attribute absolute. Customers' test methods differ from ZiLOG's variations test equipment, temperature specification interpretation. ensure that every ZiLOG product performs full customer expectations, ZiLOG uses "waterfall" methodology testing. first electrical tests made circuit both parameters, wafer probe operation, guardbanded final test specifications. final test specifications both parameters, turn, guardbanded quality control outgoing sample. quality control outgoing sample guardbanded data sheet specifications. This technique "waterfall" guardbanding eliminates circuits that marginal customer's expectations long before they shipping container.
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Chapter ZiLOG's Quality Culture
Product Characterization Every ZiLOG product design evaluated over extremes operating temperature, supply voltage, clock frequency prior production release. This information permits proper guardbanding test program waterfall identification marginal "corners" design tolerances. product characterization summary, which details more important tolerances identified process this exhaustive product design evaluation, available ZiLOG's customers. Process Qualification ZiLOG also qualifies every process prior production exhaustive stress sequence performed test chips representative products. Once process regime qualified, process re-qualification performed time there major process change. Product Qualification addition characterization, every ZiLOG product design fully qualified comprehensive series life, electrical, environmental tests before release production. Whenever possible, both industry standard environmental life tests employed. Again, qualification summary available customers that details certain life environmental data taken course these evaluations. Please Qualification Requirements example ZiLOG Package Qualification Summary Device Qualification Summary. Measurement, Direct Indirect frequently said that want improve something, need measure Therefore, ZiLOG measures outgoing quality "parts million" maintenance careful records statistical sampling production lots prepared shipment. This information then translated statement parts million outgoing quality performance. course, thing ZiLOG think doing good outgoing product quality another customer agree. Therefore, certain customers provide with their incoming inspection data that helps calibrate outgoing performance terms actual results field. fact that ZiLOG been awarded "ship stock" status many customers testifies success this area. Measurement Direct Indirect Just ZiLOG records outgoing quality terms parts million, also measures outgoing product reliability terms "FITS" Failures billion device hours. This calculation done using results weekly operating life test measurements circuits performed accordance with standard specifications.
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Chapter ZiLOG's Quality Culture
Field Quality Engineers ZiLOG maintains force skilled Field Application Engineers, also trained Field Quality Engineers. These engineers available immediate call consult customers problems they experiencing with ZiLOG product performance. Product Analysis Product Analysis facilities, staffed experienced professionals, exist each ZiLOG site provide rapid evaluation in-process in-field rejects. ZiLOG pleased share product analysis reports specific products with customer upon request. Total Quality Program ZiLOG employees actively participate meetings where methods proposed, reviewed, adopted. These meetings enable department more precise accurate manner. Environmental Protection Recycling ZiLOG committed environmental protection-recycling project that becoming international requirement. ZiLOG prefers that materials used package finished products recyclable and/or manufactured from recycled material. "Recyclable" symbol already found shipping boxes, tubes reels, shipping trays QFP/VQFP products.
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Chapter ZiLOG's Quality Culture
ZiLOG ENVIRONMENTAL, HEALTH SAFETY POLICY
ZiLOG's mission create superior value stakeholders. health safety employees, proper care environment, paramount importance. ZiLOG's concern them only good corporate citizenship, it's also good business. ZiLOG committed continuously improving Environmental, Health Safety Management System. Strict compliance with applicable regulations considered minimum standard neither production goals financial objectives shall excuse noncompliance. core values ZiLOG's Management System Create, maintain promote safe healthful workplace employees. Comply with intent well letter relevant regulations Federal, State Local levels. goals objectives measure progress toward them. Promote respect environment among employees. Conserve resources minimize waste reducing, reusing, recycling. Integrate considerations into business planning, decision making, daily activities. Provide resources training carry this policy. Prevent accidents minimize environmental impacts. Communicate performance. Respond concerns communities which business. Support public policy development. Encourage contractors suppliers adopt standards similar own. Exchange knowledge technology.
These core values build tradition quality, innovation, continuous improvement. Each employee personally responsible making these value part everyday work life ZiLOG.
Thorburn Chief Executive Officer ZiLOG, Inc.
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Chapter ZiLOG's Quality Culture
CERTIFICATION ZiLOG extremely proud have received following 9000 certification awards, which reflect stringent quality standards which ZiLOG products manufactured. FACILITY/LOCATION ZiLOG Electronics Philippines, Inc. (ZEPI) Manila, Philippines Final Test Shipment Semiconductors CERTIFICATION RECEIVED 9001 Re-certified 12/02 Yarsley International Certification Services Camberley, Surrey, 14001 Certified 2003 International Certification Services Zurich, Switzerland
(*ISO International Standards Organization) CERTIFICATION FOUNDRIES/SUBCONTRACTORS FACILITY Wafer Foundries: TSMC XFAB AMIS MACRONIX Assembly Subcontractors: Amkor ASEK NSEB ATEC Test Subcontractors: Ardentec ASET Amkor ATEC LOCATION Taiwan Taiwan Idaho,USA PROGRAM 9001/TS16949 9001/TS16949 9001/TS16949 9001/TS16949 9001/TS16949 9001/TS16949 9001/TS16949 9001/TS16949 9001/TS16949 9001 9001/TS16949 9001/TS16949 9001/TS16949 9001
Batam, Indonesia Manila, Manila, Taiwan Thailand Laguna, Taiwan Taiwan Manila, Laguna,
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Chapter ZiLOG's Quality Culture
QUALITY RELIABILITY TREND CHARTS Figure Rate (FIT Failure Time: Failures Billion Hours)
041H
NOTE: increase rate 2004 exclusively result using reduced sample size
Figure Electrical
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Chapter ZiLOG's Quality Culture
Figure R/QA Organizational Chart
Director Reliability Quality Assurance Mike Burgdorf
Document Control Supervisor Judy Nation
Manager Quality Assurance Asia Erlinda Fonte
Manager Quality Systems Stortini
Senior QA/DC Officer Lilia Gelena
Reliability Customer Engr Glenn
Section Manager Audit Amalia Sioson
Engineer Victoriano Cruda
Engineer Glenn Casamayor
Supervisor Leonardo Ontiveros
Tech Milagros Bautista
Engineer Eduardo Gines
Engineer Frederick Refran
Tech Victor Vivar
Tech Arnel Padayao
Clerk Rose Ubas
Assistant Rosario Alcantara
Inspectors
Tech Estella Cambronero
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CHAPTER Customer Quality Support System
CHAPTER
Customer Quality Support System
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CHAPTER Customer Quality Support System
Customer Quality Support System
CUSTOMER FAILURE ANALYSIS/CORRELATION PROCEDURE ZiLOG complete Customer Failure Analysis (CFA) system. Using this system, customer return units failure analysis test correlation. sequence events procedure follows: Customer suspects failure. customer completes request. Figure 2-1. request assigned number tracking. customer returns unit(s) factory. Product/Test Engineering performs go/no-go electrical test. unit(s) test results given Failure Analysis Engineer. unit(s) fail test, Failure Analysis Engineer performs electrical physical analysis, generates report. unit(s) pass test, Failure Analysis Engineer generates report returns unit(s) customer. goal provide complete report within working days from time unit(s) received. ZiLOG customer will work together reduce types failures zero. procedure several communication tools that used achieve this goal, proving overall effectiveness since inception 1985.
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CHAPTER Customer Quality Support System
Figure Guideline Information Needed Factory With CFA's Purpose: eliminate time spent researching failed component/part history order concentrate finding root cause failure complaint customer
OP184
FAILURE ANALYSIS QUESTIONNAIRE
GENERAL INFORMATION: Initiated Customer Name: Customer Address: Phone Parts Under Warranty? NOTE: Failure analysis warranty parts information only. PART INDENTITY: Device: Customer Application: Date/bb Code: Qty. being returned: Total devices lot: Qty. failed devices: Date: B.U.:
Qty. devices tested/inspected:
FAILURE DESCRIPTION: Incoming: Assembly: Noise Option? part removed with other parts? failure follow part? this application this device? this failure mode? Final Test: Field Return:
long service before failure occurred?
Additional processing temperatures which part seen before failure occurred:
there Customer board test program available ZiLOG? there failing passing samples available correlation work? Process steps part seen time failure: RETURNS: Programmer used: Option Bits Selected: Software Rev:
Checksum:
NOTE: most thorough analysis, please include file Customer's code. ADDITIONAL DETAILS:
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CHAPTER Customer Quality Support System
Table Summary Test Equipment Equipment ZEPI ISOMET Speed Curve Tracer Tester Tester HAST Polimet Polisher High Power Scope Power Scope Etch Plates Pressure Cooker Plasmod Plasma Etcher Digital Multimeter Power Supply Timer Acoustic Microscope Profile Projector Temperature/Humidity Test Chamber Temperature/Humidity Test Chamber Salt Atmospheric Chamber Mechanical Shock Tester Test Thermal Shock Temperature Cycle Toolmaker Scope Hardness Tester Plating Thickness Measuring Equipment Wirepull Tester Wirepull Tester Beam Balance Shear Tester Particle Counter Flow Thru Cooler Digital Linear Gauge Incubator High Power Scope Brand Buehler Tektronix IMCS Oryx 11000 Express Test Buehler Olympus Bausch Lomb Novus Technologies Ready-Heat Electric Steroclave March Inst Leica S420 Fluke Gralab Sonoscan C-SAM 3100 Mitutoyo ESPEC Sexton ESPEC Associated Lansmont Unholtz-Dickie Tabai Ransco Unitron Ames Precision Fischerscope Unitek Westbond None Atcor Neslab -Millipore Olympus Usage Cross-Section Analysis Bench Check VZAP Testing VZAP Testing Reliability Test Cross-Section Analysis External/Internal Visual Inspection External/Internal Visual Inspection Decapping Plastic Devices Solderability-Steam Aging Reliability Test Topside Etch Visual Elemental Analysis Latchup Test Latchup Test Timed Operations Delamination Inspection Dimensional Inspection Temperature/Humidity Test Moisture Resistance Test Salt Atmosphere Test Mechanical Shock Test Test Thermal Shock Test Temp Cycle Test Dimensional Check Leadframe Plating Thickness In-Process Wirepull Testing In-Process Wirepull Testing Weight Measurement Shear Test Airborne Particle Measurement Viscosity Check Wafer Thickness Check Bacteria Monitor Inspection
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CHAPTER Customer Quality Support System
Table Summary Test Equipment Equipment ZEPI Meter Coplanarity Tester MP-4 Land Camera With Stage Floodlights High Power Microscope w/Video Camera Brand RVSI Polaroid Leitz, Usage Check Coplanarity Check Photo Duplicating, Macrophotography 8X10 Wafer Level Inspection
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CHAPTER Customer Quality Support System
Table Summary Test Equipment Equipment Idaho Zoom Stereoscope 5-50X Brand Nikon Usage X-Section Mounting, Low-Power Inspection Package Visual Microphotography Film Radiography Sample Prep (Backup) Package Cross High Temp Analysis 1100C Bake Recovering Bake Recovering Sample Storage Chemical Safety Chemical Safety Cross-Section Wafer Reliability Analysis Chemical Etch Wafer Pressure Test Chip Unzip Chemical Heating Sample Cleaning Sample Cleaning Topside Etch Descum Part Decapsulation Part Decapsulation Timed Operations Chemical Measurement Penetrant Test EPROM Erasing Bench Check Bench Check Waveform Photo Bench Temperature Testing Microprobing Trace Cutting
High Power Microscope w/Camera, Nikon 1000X Long-Working Distance Objectives X-Ray System Faxitron Gold Coater Denton Vacuum Low-Speed Diamond Buehler Bench Furnace Lindberg High Temperature Ovens: 175C Blue 150C Blue 125C Blue Exhaust Hood Kewaunee Sink w/Exhaust Plastics 3-Wheel Polisher Buehler Plate PC100 Corning Plate PC100 Corning Plate Lindberg Plate Corning Plate Arthur Thomas Type 2000 Ultrasonic Cleaner Bransonic Ultrasonic Cleaner Branson 3510 Plasma Etcher Tegal Etch Rinse Enterprises Cerdip Opener Enterprises Timers Gralab Dial-O-Gram Ohaus Light Blak-Ray Light Logical Devices, Inc. Curve Tracer Tektronix Curve Tracer Tektronix Camera Tektronix Temperature Forcing Unit Temptronic Microprobe Station Wentworth Laser Cutter Wave LAZE Microprobe Device Socket Cards:
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CHAPTER Customer Quality Support System
Table Summary Test Equipment Equipment Idaho LCC/PLCC Lead Lead Narrow Pitch High Power Microscope 400x High Power Microscope 1000x S440 With SIMS (SIMS working) Brand ZiLOG Designed Micromanipulator ZiLOG Designed Nikon Nikon Leica Bench Microprobe Work Visual Microscope Visual Chip Unzip Inspection High Power Imaging Micro Cross Sectioning, Device Modification Elemental Analysis Imaging Device Deprocessing Product Visual Examination Feature Size Measurement Video Camera Inch Color Video Print Signal Waveform Monitor Parametric Tester Capacitance Measure Emission Microscope, Device Microprobe, Emission Microscope, Microprobe Liquid Crystal (Room Hot) Usage
Reactive Etcher (REI), 8-Inch Polycon, DIC, Confocal, Fluorescence, W/8x8" Stage W/Micron Stage Readout W/Sony Color Video Oscilloscopes 4145A w/LCR Meter Visionary 2000 W/MP2000 Probe Package Device Thermal Socket Cards: Lead PLCC Lead PLCC Lead PLCC Lead PLCC Lead PQFP Lead Lead VQFP Lead Lead Lead (300 Mil) Blazer Tester W/8" Probe Station 4156B Precision Semiconductor Parameter Analyzer 35665A Dynamic Signal Analyzer
Trion Leica-Reichert Semprex Optronics Sony Tektronics 7704 Hypervision Carl Suss Temptronics Temptronics Temptronics Temptronics Temptronics Temptronics Temptronics Temptronics Temptronics Temptronics Temptronics Wentworth
Bitmapping, Device Test Microprobe Parametric Tester Tester
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CHAPTER Customer Quality Support System
Table Summary Test Equipment Equipment Idaho 4275A Multi-Frequency Meter 4274A Multi-Frequency Meter Microminipulator Test Station 4155B Semiconductor Parameter Analyzer PQFP 17x17 PLCC PLCC Display 1340A Philips XL30 SFEG Multiprep Techprep 4500x High Power Optical Microscope High Temperature Oven Photographic Printer Printer (color) Camera Chip Unzip Brand Micromanipulator Agilent Schlumberger Schlumberger Schlumberger Schlumberger Schlumberger Schlumberger Schlumberger Schlumberger Schlumberger Schlumberger Schlumberger Schlumberger Philips Allied High Tech Nikon Eclipse L200 Usage Tester (Inductance, capacitance, resistance instrument) Tester (Inductance, capacitance, resistance instrument) Probe Test Parameter Tester Socket Adapters Socket Adapters Socket Adapters Socket Adapters Socket Adapters Socket Adapters Socket Adapters Socket Adapters Socket Adapters Socket Adapters Socket Adapters Socket Adapters Signal Display Ultra High Resolution SEI, (Solid State) Parallel Polishing Bright field, Dark field, Numarsky, Confocal inspection, Digital Camera1280 1944 Hammer Testing, Curing High Quality Photographic Printer Photographic Printer Polaroid Photographs Backside Analysis
Grieve Codonics Tektronics Polaroid Hypervision
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CHAPTER Customer Quality Support System
Table Summary Test Equipment Equipment Jose Spectrum Analyzer Pre-Amplifier Plotter Biconical Antenna Periodic Antenna Brand HP-8591A HP8447D HP-7550A #CEAB-100 #CEAL-100 Usage Near Field Testing Near Field Testing Near Field Testing Near Field Testing Near Field Testing
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CHAPTER Customer Quality Support System
OUTSIDE LABS RIGA Analytical Lab, Inc. 3375 Scott Blvd., Suite Santa Clara, 95051 Charles Evans Assoc. Chesapeake Drive Redwood City, 94063 BridgePoint Tech. Mfg. 4007 Commercial Drive Austin, 78744
CUSTOMER NOTIFICATION SYSTEM Customer Service notifies customer with formal change notification letter major process design changes. following list criteria which customers notified: Changes form, function Changes product design manufacturing locations Changes manufacturing Processes and/or materials Changes that affect product quality, reliability manufacturability
Shown following pages example change notification letter that gives customer schedule conversion, stating that: customer will given days request qualification samples from ZiLOG. product will shipped within days from date letter, unless ZiLOG receives written notice from customer continue shipping their current qualified product. automotive customers, change notification accompanied submission Product Submission Warrant (PSW) necessary attachments (Part Drawing, Failure Mode Effects Analysis, Engineering Samples) depending customer requests that PPAP process initiated. products automotive customers will require PPAP Level Process.
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CHAPTER Customer Quality Support System
June 2000
Subject: Customer Change Notification Z80S183 Z80L183 Revision Change From Dear Customer: Please advised that ZiLOG process changing current Z80S183/Z80L183 revision Mixed Signal 180. Z80S183/Z80L183 revision fully compatible with existing Z80S183/Z80L183 with exception following improvements: Improved Sleep Mode current less than less than 700µa modes Watch Timer functional. Register location changed from reflect die. Z80S183/Z80L183 have date code lower left corner package follow yyww convention, where year week. improved will stamped date code later than 0025. wish receive qualification samples product, contact ZiLOG field sales office serving your area. Sincerely,
Mike Burgdorf Director Reliability Quality Assurance
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CHAPTER Qualification Requirements
CHAPTER Qualification Requirements
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CHAPTER Qualification Requirements
Qualification Requirements
Product/Process Qualification Requirements Procedures SOP0940, SOP0903 SOP0909, ZiLOG performs initial qualification processes, products packages. Re-qualification required when material changes occur. Table Product/Process Qualification Requirements Test CMOS Latchup Sample Size 3/level Acceptance Criteria Method Method Procedure JESD22-A114-B JESD78 Test Conditions 150°C, Hours 125°C, 1000hours -65°C 150°C Cycles 168Hours 121°C Hours 140° A240°C,
Operating Life
0/77
1005
Temp Cycle
0/45
1010, Condition
Pressure
0/45
QCM-075
HAST
0/45
QCM-087
Package Integrity
0/10
Note: Process Qual requires three lots, Product Qual requires lot.
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CHAPTER Qualification Requirements
ZiLOG Product Qualification Summary
PRODUCT QUALIFICATION SUMMARY
ZiLOG Authorized Distribution
Document Control Nbr.: QR-9438
Rev.:
Page
OP25
DATE: PRODUCT: WRITTEN ZLR32300 Joseph Brajkovich PROCESS: APPROVED:
6-23-04 0.35um Mike Burgdorf
INTRODUCTION This report summarizes qualification results ZLR32300 Crimzon MCU.
INFORMATION SUMMARY qualification tests were performed industry and/or internal ZiLOG procedures.
PRODUCT QUALIFICATION
Test Description Latch-up Burn-in Temperature cycle Pressure HAST Package integrity Test Method JEDEC JESD22-A114-B QCC1425 MIL-STD-883/1005 MIL-STD-883/1010 120° 140° 240° seconds Condition Test Test Condition 150° Condition Test Test Test Test Result Class 1000 ma/11V overvolt 0/77 hours 0/50 1000 cycles 0/45 hours 0/50 hours 0/15
QUALIFICATION Process Device
TYPE 0.35 CMOS ZLR32300/A
DOC. QR-0656 QR-1141
ZILOG,
Race Street, Jose, 95126
(T)408-558-8500
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CHAPTER Qualification Requirements
Package Qualification Requirements Sample Size Acceptance Criteria 0/15 0/15 0/15 0/15 MIL-STD 883C/Procedure 2003 2016 2004 1004 1004 2019 2011, Condition 2011, Condition 150°C, Hours 125°C, 1000 Hours -65°C 150°C Cycles Hours 121°C Hours 140°C, A240°C, 2012 Mil-STD Test Method
Test Solderability Physical Dimensions Lead Fatigue External Visual Internal Visual Shear Bond Strength Bond Shear
Test Conditions LTPD 15/Leads Mil-STD Mil-STD Mil-STD Mil-STD Min.
Operating Life
0/77
1005
Temp Cycle
0/45
1010, Condition
Pressure HAST
0/45 0/45
QCM-075 QCM-087
Package Integrity X-Ray Solder Dunk
0/15 0/32
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CHAPTER Qualification Requirements
ZiLOG Package Qualification Summary
PACKAGE QUALIFICATION SUMMARY
Document Control Nbr.: QR-3002 Page
Rev.: OP25
PACKAGE TYPE: WRITTEN
Joseph Brajkovich
DATE: APPROVED:
1-27-99 Alice Baluni
INTRODUCTION This report summarizes qualification results package.
INFORMATION SUMMARY qualification tests were performed MIL-STD-883 and/or internal ZiLOG procedures.
PACKAGE QUALIFICATION Test Description Bond Strength Bond Shear Shear Physical Dimensions Resistance Solvents Lead Fatigue Solderability Pressure Temperature Cycle Burn-In Package Integrity Solder Dunk Test Method MIL-STD-883/2011 MIL-STD-883/2011 MIL-STD-883/2019 MIL-STD-883/2016 MIL-STD-883/2015 MIL-STD-883/2004 MIL-STD-883/2003 QCM-075 MIL-STD-883/1010 MIL-STD-883/1005 seconds seconds Condition Condition Spec Spec Test Method Test Method Test Method Test Method Spec Condition Test Method After 1000 Temp Cycle Test Result 6.8/8.2/7.5 min/max/ave 0/15 0/15 0/45 0/45 1000 cycles 0/77 1000 0/15
QUALIFICATION
Package
TYPE
DOC. QR-0308
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CHAPTER Quality Monitor Systems
CHAPTER Quality Monitor Systems
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CHAPTER Quality Monitor Systems
Quality Monitor Systems
FAILURE RATE PREDICTION CALCULATIONS ZiLOG estimates operating life products through statistical methods. possible guarantee lifetime individual part because tests determine this destructive. Therefore, only statistics predict typical behavior groups parts. These predictions, methods they based documented reports. report based process specific data derated reflect individual device characteristics. reports available ZiLOG's products. Other factors that affect device lifetime include actual operating hours, ambient temperature, stability power supply, board assembly other handling practices. these factors outside control ZiLOG dramatically shorten lifetime device. failure rate each product process function time, temperature applied power. primary temperature course, product junction temperature. This externally influenced ambient temperature internally influenced power dissipated die. power dissipation, turn, function duty cycle applied VCC. case CMOS, product power dissipation also function operating frequency. ZiLOG product failure rates were derived from accelerated life test results accumulated ongoing basis part ZiLOG reliability monitor. accelerated life test reliability data includes both infant mortality (early life results 0-160 hours) long term life results (168-1000 hours). Various interim time points sample sizes used. Life test performed either 125°C 1000 hours equivalent 150°C hours.
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CHAPTER Quality Monitor Systems
Z85230VSC Rate Calculation acceleration obtained when using high temperature life stressing calculated various stress application temperatures using widely accepted Arrhenius equation follows: (-Ea (T1) (T2)) Where Acceleration factor Activation energy (eV) Application junction temperature (°K) Stress junction temperature (°K) Boltzmann Constant 8.62 10-5
Assume application 55C, stress 125°C 8.62 105. Consider typical CMOS product Z85230 operating with 100% duty cycle PLCC package. Then with this would give 330°K 400°K. (-.7(330 400) 8.62 (330) (400) 1000 hours life stress 125°C equivalent 75,000 hours system application operation 55°C. Failure Rate Estimation: Given High Temperature Operating Life stress results: Z85230 Monitor 1994 Monitor 1995 Monitor 1996 Monitor 1997 Monitor 1998 Monitor 1999 Monitor 2000 Monitor 2001 Monitor 1H-2002 Hours 0/76 0/837 0/10,759 1/6,152 0/7,520 0/22,470 0/38,258 0/61,646 0/12,992 0/8,394 Hours 0/76 0/760 1000 Hours 0/76 0/606
0/231 0/200
0/77 0/231 0/200
Failure Rate Estimations made assuming Poisson distribution using Chi2 density function assign confidence values estimate general population follows: Confidence Fails then Chi2 4.05
Given reject from 29,527,680 device hours 125°C. Then using Chi2 this gives median failure rate 4.05/2 rejects 29,527,680 device hours 0.0686 rejects device hours. Failure rate 0.0686 dev. hrs. 68.6 dev. hrs. 68.6 68.6/75 55°C above) 109/1 124,471 years
Failure Rate MTBF
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CHAPTER Quality Monitor Systems
TESTING METHODOLOGY ZiLOG unqualified commitment quality reliability and, part this commitment, ZiLOG strives provide best possible protection each products. Since 1983, ZiLOG ongoing electrostatic discharge development program monitor improve protection circuitry. During event, protection circuitry must absorb power pulse while allowing little damage occur internal circuitry chip. 3000 volt pulse induce transient currents approaching amp, management these transient currents that good protection. ZiLOG, protection circuits have been developed optimize handling pulse currents, paying close attention current flow patterns, minimizing current density crowding problems that cause damage circuitry. ZiLOG's products tested their immunity part routine internal qualification procedures. test hardware compliance with JEDEC JESD22-A1214B Human Body Model. LATCHUP TESTING METHODOLOGY ZiLOG unqualified commitment quality reliability and, part this commitment, also strives provide each products with best possible latchup protection. Latchup occur result either current injection (positive negative) supply over voltage. latchup action that parasitic SCR, converting from high-impedance state, impedance, regenerative, state. resulting current flow exceed design capabilities device. Damage occur interconnections (bond wires metallization) result thermal heating effects excessive current flow. During conditions which lead latchup, device must able shunt triggering event (the positive negative injection current) without damage device. ZiLOG's products tested their latchup immunity JESD part routine qualification procedure.
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CHAPTER Quality Monitor Systems
ZiLOG'S RELIABILITY SUMMARY
tests currently employed under ZiLOG's reliability monitor include early life (burn-in), steam pressure pot, temperature cycle. addition, long-term life test performed selected lots gather data. Following brief descriptions various reliability tests included this program. EARLY LIFE Early Life testing, also called burn-in, typically performed 125°C hours. dynamic static bias employed, depending device that being tested. Early Life test results expose process assembly defects. These results valuable measure given fabrication assembly process. LONG TERM LIFE Long Term Life testing generally performed 150°C hours 125°C 1000 hours. Either dynamic static bias used stress device appropriately. These test results used estimate field operation lifetime device. This data applied products manufactured using same fabrication process PRESSURE Pressure testing performed 121°C, PSIG, 100% relative humidity. This test evaluates ability plastic device withstand long-term effects humid environment. TEMPERATURE CYCLE Temperature Cycle testing performed -65°C 150°C temperature. This test uses air-to-air environment. 215°C cold temperature difference determines proper thermal expansion matching exists between materials used device manufacture. temperature cycle simulates thermal stresses device undergoes during power-up power-down events. HIGHLY ACCELERATED STRESS TEST Highly Accelerated Stress Test (HAST) performed 141°C temperature Relative Humidity (RH) pressure with alternate bias. This test replaces traditional 85/85 test greatly reduces time taken evaluate ability plastic encapsulated device withstand long-term effects biased humid environment.
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CHAPTER Quality Monitor Systems
PACKAGE INTEGRITY TEST Package Integrity testing ensures integrity surface mount devices terms package cracking, bonding craters, marked deterioration result heat application during soldering operation. This includes testing units each legs follows: CONTROL TEST 10-SECOND SOLDER DUNK 240°C 10-HOUR *PPT 10-SECOND SOLDER DUNK 240°C 10-HOUR *PPT 3-HOUR OVEN BAKE 150°C 10-SECOND SOLDER DUNK 240°C
TEST
(*PPT Pressure Testing 121°C, 100% ATM) End-points room temperature electrical test, visual inspection, mark permanency crater test.
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CHAPTER Quality Monitor Systems
Table Reliability Monitor Testing Requirements Test Conditions Temp cycle Pressure Product Tested Each type Package/Fab Process assembly process flow assembly process flow PLCC package Each revision device Each revision device pkg/fab process Frequency Monthly Monthly Allowable Rejects Test -65° 150°C cycles 121°C, 100% A168 hrs, 125°C hrs, 150°C hours, 125°C 10-hr Pressure Pot, second solder dunk JESD22-A114-B JESD78 NMOS hours CMOS hours 140°C, AICP/EIA J-Std-002 ZiLOG spec
Burn-in Life test Package Integrity Latch-up CMOS HAST
Weekly Every Months Weekly
Monthly
Solderability Lead fatigue test
Each package type Each package type
Monthly Weekly
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CHAPTER Quality Monitor Systems
Table Early Life Test, HRS, 125°C CMOS PLASTIC Device Type 2004
Z86C3312PECF53KM Z8018233FSC Z8F042ASB020SC EZ80F91AZ050EC Z86L8808PSCR51JW Z86C3616PSCR52JN Z86E0412PSC2004 Z8523010VSC Z84C0006PEC Z86C3312PECR533N Z16C3010VSC Z16C3010VEC Z8F6423FT020SC Z8F6423FT020SC2093 Z8F6423FT020SG Z8F042ASB020SC Z8018006VSC ZLP32300P4008C Z8F6423FT020SG Z8018006VSC Z8F042AQB020SC2118 BF4205291AR K233057A ENC66525R6D KBCP52690A BLHG2KC.04A A4345327A A4334045APB A43208641B AZK02541A BK0849B AU4236104A BZK0553A ARA9995.2BL BRB0554.1B EARB1189.1B ENC66525R6D A4296383AB AMK5HCDA EARB1189.1B A4296383AB BFC6652523Q Z86C33BB Z80182LB Z8F042SAB Z80F91AC Z86L88GB Z86C36CB Z86E08EC Z80230DB Z84C00HA Z86C33BA Z16C30FB Z16C30FA Z8F642BC Z8F642BA Z8F642BC Z8F042ABB Z80180FB Z86D74AC Z8F642BC Z80180FB Z8F042SAB X6120 X6120 TSMC TSMC X6120 X5220 X4120 Z4120 Z6120 X3120 Z3120 TSMC TSMC TSMC TSMC X4110 TSMC X4110 TSMC 168HRS 328HRS 168HRS 168HRS 168HRS 168HRS 168HRS 168HRS 168HRS 168HRS 168HRS 168HRS 168HRS 168HRS 168HRS 168HRS 168HRS 168HRS (cont 168hrs) STWR 3651 168HRS 168HRS
Process
Remarks
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CHAPTER Quality Monitor Systems
Table Long-Term Life Test, 150°C, 5V,184 CMOS PLASTIC Device Type 2005
Z86E0812PEC2114 Z0221524VSCF50A5 Z0221524AECR50A5 Z0221524ASCR50A5 Z86C0812PECR2401 Z86C0812PSCR2432TR Z86C0812PECR2401 Z8932320FSCR540R Z8932320FSC2087 EA13158BA EK4341177A KU4323935BB TSR3486 AZ4345318DD EAFT9MA.A1A AZ4345318DD EAF21T7 EYL-2225924A Z86E08GA Z02215BFR51JA Z02215BFR51JA Z02215BFR51JA Z86C08FG Z86C08JA Z86C08FG Z89323DA Z89323DA Macronix X6134 X6134 X6134 X5126 X5126 X5127
Process
Table Long-Term Life Test, 125°C,1000 CMOS PLASTIC Device Type 2005
Data 2005
Process
Remarks
DC04-0001 Page Revision
CHAPTER Quality Monitor Systems
Table Early Life Test Summary Technology 2004 CMOS 2005 CMOS Plastic 285,840 2004 2005 Combined CMOS Plastic 562,392 Plastic 276,552 Package Type Device Rejects FITS (55°C,60%,0.7eV)
Table Long-Term Life Test Summary Technology 2004 CMOS 2005 CMOS Plastic 669,392 2004 2005 Combined CMOS Plastic 1,126,892 Plastic 457,500 Package Type Device 125°C Rejects FITS (55°C,60%,0.7eV)
DC04-0001 Page Revision
CHAPTER Quality Monitor Systems
Table Pressure Test, 121°C, ACMOS PLASTIC Device Type 1H-2005
Z8F042ASB020SC2106 Z86L827SZ008SCR53PF Z86L8808SSCR53JW Z86C3616PSCR52J9 Z0221524ASCR50A5 Z8018233ASC Z86C0404PECR2304 Z86E0812PEC2114 Z86C0812PSCR51Y4 Z86C3616PSCR52J9 Z86C0812SSCR2432-temp Z8F042APB020SC2106 Z84C1516FSC Z8F042ASB020SC2106 Z86C6516PSCR3752 Z86L8108SSCR5363 Z8F042APB020SC2106 Z8932320FSCR540R Z86C6516PSCR3752 Z8F6423FT020SG Z8FMC16110QKSC2119 Z8F042AQB020SC2118 Z8FMC16110AKSC2119 Z86L0808SSGR5009 Z86L8108SSGR53W0 Z86L8108SSCR5363 EAC66525B1A ETHH2G.03Q ETHGL43.04 B4273933B EK4322929B K4228953 ETZ215BG0BB EA131358.BA A4149799AAB B4273933B EAFT9MAA EAC66525A1A E4233053Q ENC66525R6D N4155943AA TLHHAGL.02P EAC66525A1A F21T7 N4155943AA EARB1189.1B EBFC670127P BFC66525BQ EBFC670127Q N5049837A NLHH267.5RA TLHHAGL.02P Z8F042SAB Z86L88GB Z86L88GB Z86C36CBR52J9 Z02215BER51JA Z80182LB Z86C08FCR2304 Z86E08GA Z86C08FG Z86C36CBR52J9 Z86C08JA Z8F042SAB Z84C15EB Z8F042SAB Z86C63ADR3752 Z86L96BB Z8F042SAB Z89323EB Z86C63ADR3752 Z8F642BC Z8FMC16AA Z8F042SAB Z8FMC16AA Z86L08HB Z86L96BB Z86L96BB
Rev.
DC04-0001 Page Revision
CHAPTER Quality Monitor Systems
Table Temperature/Humidity Test, 85°C/85% CMOS PLASTIC
Device
2005
Z86E0208HSC1925 Z8623316SSCR50JU Z86C0208SSCR50JH Z86L8808SSGR53MB Z86L8808HSGR53KY ZHX1403MA115THTR ZHX1403MA115THTR ZHX1203MB115THTR ZHX1203MB115THTR ZHX1203MB115THTR Z0221524VSCF50A5 Z0221524VSCR50A5 Z0221524VSCF50A5 Z0221524VSCF50A5 Z0221524ASCR50A5 Z0221524ASCR50A5 EZ80F91AZ050SG ZHX1810MV115THTR Z0221524ASCF50A5 EZ80190AZ050EC Z8F6423FT020SG ZHX1403MA115TH2090 ZHX1810MV115THTR Z86L0808SSGR5009 Z86L8108SSGR53W0 Z86L8708HSGR53Y1
Process
Setting/Duration
BJ2981Q N41343141PB AF4184709BB AFHGLYY ALHGL44.03A N52102 N52101 N51103 N51102 N51103 EK4322929A KZK1569 EK4341177A EK4323933A EK4341177Q EK4323933Q BCP5269.00P N53101 EK4287191C AMJ1QFAQ EARB1189.1B AE-Z283BE AE-Z277AE N5049837A NLHH267.5RA EALHHCYG.RA
Z86E02AD Z86243ABR5270 Z86C04CCR51XN Z86L88GB Z86L88GBR53KY Z13714BA Z13714BA Z13734AA Z13734AA Z13734AA Z02215BER51JA Z02215BER51JA Z02215BFR51JA Z02215BFR51JA Z02215BER51JA Z02215BER51JA Z80F91AB Z13754AB Z02215BER51JA Z80190BB Z8F642BC Z13714BA Z13754AB Z86L08HB Z86L96BB Z86L96BB
Z5220 X5126 X5126 X6134 Z6134 X6134 X6134 X6134 X6134 TSMC Veronica X6134 TSMC Z5231 X5122
30C/60%RH, 192hrs 85C/85%RH, 168hrs 85C/85%RH, 168hrs 85C/85%RH, 168hrs 30C/60%RH, 192hrs 30C/60%RH, 96hrs 30C/60%RH, 96hrs 30C/60%RH, 96hrs 30C/60%RH, 96hrs 30C/60%RH, 96hrs 30C/60%RH, 192hrs 30C/60%RH, 192hrs 30C/60%RH, 192hrs 30C/60%RH, 192hrs 30C/60%RH, 192hrs 30C/60%RH, 192hrs 30C/60%RH, 192hrs 30C/60%RH, 96hrs 30C/60%RH, 192hrs 30C/60%RH, 192hrs 30C/60%RH, 192hrs 30C/60%RH, 96hrs 30C/60%RH, 96hrs 85C/85%RH, 168hrs 85C/85%RH, 168hrs 30C/60%RH, 192hrs
DC04-0001 Page Revision
CHAPTER Quality Monitor Systems
Table Temperature Cycling Test, Condition -65°C 150°C CMOS PLASTIC Device Type 2005
Z8F042ASB020SC2106 Z8523008VSC Z8018233FSC Z8018216FSC1830 Z86L827SZ008SCR53PF Z86C6516PSCR3752 Z86C3616PSCR52J9 Z86L8808SSCR53JW Z86E0812PEC2114 Z86C0812PSCR51Y4 Z0221524ASCR50A5 Z8018233ASC Z0221524AASCR50A5 Z86C0404PECR2304 Z8F042APB020SC2106 Z8038220FSC Z8F042ASB020SC2106 Z86L8108SSCR5363 Z8932320FSCR540R Z86E0812PEC2114 Z86C0812SSCR2432-temp Z8932320FSCR540R Z8F6423FT020SG Z8932320FSCR540R Z86L8708HSGR53Y1 Z8FMC16110QKSC2119 Z8F042AQB020SC2118 Z8FMC16110AKSC2119 Z0221524ASCR50A5 Z0221524ASCR50A5 Z86L0808SSGR5009 Z86L8108SSGR53W0 B7F, good bench EAC66525B1A EB4235090B K4233057A KF4211501AP ETLHH2GW.03Q N4155943BAB B4273933B ETLHGL43.04 EA131358.BA A4149799AAB EK4322929B K4228953 EK4341177Q ETZ215BG0BB EAC66525A1A KAH1466A1B ENC66525R6D TLHHAGL.02P EACK78AA EA131358.BA EAFT9MAA F21T7 EARB1189.1B EAFK54A EALHHCYG.RA EBFC670127P BFC66525BQ EBFC670127Q EK5011935A EK5011935B N5049837A NLHH267.5RA Z8F042SAB Z80203DB Z80182LB Z80182DD Z86L88GB Z86C63AD Z86C36CBR52J9 Z86L88GBR53JW Z86E08GA Z86C08FG Z02215BER51JA Z80182LB Z02215BF51JA Z86C08FCR2304 Z8F042SAB Z80382BB Z8F042SAB Z86L96BB Z89323EA Z86E08GA Z86C08JA Z89323EB Z8F642BC Z89323EA Z86L96BB 8FMC16AA 8F042SAB 8FMC16AA Z02215BD Z02215BD Z86L08HB Z86L96BB TSMC X4120 X6120 X5120 X5126 X6120 Macronix X5126 X6134 X6120 X6134 Z5126 TSMC Z36120 TSMC 0.8u Macronix 0.8u 0.8u TSMC 0.8u 0.35u TSMC TSMC TSMC X6134 X6134 X5122 0.35u
Process
100X
500X
1000X
DC04-0001 Page Revision
CHAPTER Quality Monitor Systems
Table 4-10 Highly Accelerated Stress Test (HAST), 140°C ACMOS PLASTIC Device Type 2005
Z8F042ASB020SC2106 Z0221524VSCF50A5 Z86E0812PEC2114 Z0221524VSCR50A5 Z0221524VSCF50A5 Z8F042APB020SC2106 Z0221524VSCF50A5 Z0221524ASCF50A5 Z86C0812SSCR2432TEM Z8FMC16110QKS2119 Z86L8108SSGR53W0 EAC66525B1A EK4322929A EA131358.BA KZK1569 EK4323933A EAC66525A1A EK4323933A EK4287191C EAFT9MAA EBFC670127P NLHH267.5RA Z8F042SAB Z02215BER51JA Z86E08GA Z02215BER51JA Z02215BER51JA Z8F042SAB Z02215BER51JA Z02215BER51JA Z86C08JA 8FMC16AA Z86L96BB TSMC X6134 Macronix Z6134 X6134 TSMC X6134 X6134 TSMC 0.35 0.35
Rev.
Process
DC04-0001 Page Revision
CHAPTER Quality Monitor Systems
Table 4-11 Package Integrity Test CMOS PLASTIC Device Type 2005
Z86E0812PSC1866 ZGP323HES2004C Z84C1510AEC ZLP32300H4832GR5405 Z86E0412PSC1866 Z8S18020VSC ZGP323HES2804C Z86C1112FSCR508 Z86C6516PSCR3918 Z8702114SSCR4216TR ZLP32300P4008C Z86C0812SECR5302TR ZGP323HAH2832C Z86C3616PSCR52J9 Z84C0008FEG ZGP323HEH4804C Z86C6516PSCR3918 ZLR32300S2832CR540J Z0221524ASCR50A5 Z86C0812PSCR51Y4 Z86E0208SSG1925 Z84C1516FSC Z86E0812HSC1866 Z86C9620PSC Z86C1112FSCR508 Z86C6516PSCR3752 Z86L0208SSCR527L Z0221524ASCR50A5 Z8038220FSC Z0220112VSCR4078 ZLP32300P2832C Z84C9008VSC ZGP323LAH2832C EZ80L92AZ050SC ZLP32300H2832C Z86E3016PEC Z8937320VSG ZLP32300H4816G A43004191C AMKSSFDBCAJ AU4300430C AMK55FDBABR B4300421B B4289258BG AMK55FDBCAM BF430423PA N4288N38C N4269886B AMK5HCDBPJ A4303526APA AMKCHCABAQ B4273933B B4235892W BMKSLQBAAPG N4299401A NHH0PG.03B EK4322929B A4149799AAB A4344271RC A4233053Q A4308162BP B4155972AAR BF4318848B N4155943AA N4184706PBA EK4323933Q KAH1466A1B K4211504AR AMK52QAABSB A4306567AAP AMK5HCABAQN AMF16KP AMK5LQAAAPA B435148AB B4103620AP BMKHFAABR Z86E08EC Z86D74AC Z84C15KA Z86D74AC Z86E08ED Z8S180PB Z86D74AC Z86C21GF Z86C63AD Z87021AD Z86D74AC Z86C08FG Z86D74AC Z86C36CB Z84C00HB Z86D74AC Z86C63AD Z86D74AC Z02215BF Z86C08FG Z86E02AD Z84C15EB Z86E08EC Z86C61BD Z86C21GF Z86C63AD Z86L04CC Z02215BF Z80382BB Z02922AC Z86D74AC Z84C90EB Z86D74AC Z80L92AB Z86D74AC Z86E40DF Z89373CC Z86D74AC X5220 X4120 X5220 X4120 X3120/X3126 X5126 X5126 X5126 X6120 X4120 X5126 X6134 X5126 X5220 X4120 X5220 X4126 X3120/X3126 X5126 X5122 X6134 Z36120 X5126 X4120 TSMC X5220 X5221
Rev.
Process
DC04-0001 Page Revision
CHAPTER Quality Monitor Systems
Table 4-11 Package Integrity Test CMOS PLASTIC Device Type
Z8F042ASB020SC2106 EZ80F91AZ050EC Z0220112VSCR4078TR Z8F042APB020SC2106 Z8F1622VS020SG ZLR32300S2832CR540J Z8932320FSCR540R EZ80L92AZ050SC ZLP32300H2832G Z86E0812PSC2089 Z8523016VSC Z84C4306FEC Z16C3010AEC Z86L8708HSGR5462 Z86C6516PSGR541P Z86E0812SSC1866 Z0221524AEGR50A5 Z8038018FSC Z0220112VSCR3470 Z86C9116PSC Z86C3616SSGR542L EZ80L92AZ050SC Z86L8708HSGR53Y1 Z86E0208PSC1925 Z84C2006VEG Z86C1112FSCR508 Z8FMC16110AKSC2119 ZLP32300H4832G Z86L0808SSGR5009 Z0221524AECR50A5 Z0292212VSCR3796 Z8F042ASB020SC2106 Z86K1505PSCR4530
ENC66525R6D KBCP52690A K4338155Q EAC66525A1A ARB0550.AEB AHH0YF.031E F21T7 AMF66KZAAB AMK5HFBAAPB B5012956AE B4328006 B5007848P BZ5082468P BLHHJH3.00F N5046730 N4364642AP EK50263 K1554A K5061017AQ A4348342X EHF5040624PA AMFL6KL1A EALHHCYG.RA B4338161TA B4365685VB BF4318844 EBFC670127Q BMKQMGDPB N5049837A K5026300QD3 K007DX0R ETC66525RCP ET5005787PC
Rev.
8F042SAB Z80F91AB Z02922AC 8F042SAB Z8F642BC Z86D74AC Z89323EA Z80L92AB Z86D74AC Z86E08EC Z80230DB Z84C40DB Z16C30FB Z86L96BB Z86C63AD Z86E08EC Z02215BF Z80380CB Z02922AC Z86C93BC Z86C36CB Z80L92AB Z86L96BB Z86E02AD Z84C20BB Z86C21GF 8FMC16AA Z86D74AC Z86L08HB Z02215BF Z02922AC 8F042SAB Z86K15EB TSMC TSMC X5126 TSMC TSMC X5220 X4120 X3120 X3120 X5126 X5220 X6134 Z5128 X5126 X5120 X6120 0.35 0.35 X5220 X3120 X3120/X3126 TSMC 0.35 X5122 X6134 X5126 TSMC 0.35 X5126
Process
DC04-0001 Page Revision
CHAPTER Quality Monitor Systems
Table 4-12 C-Mode Scanning Acoustic Microscope Monitor CMOS PLASTIC Device Type 2005
Z86E0208HSC1925 Z86E0208HSC1925 Z86L8808HSGR53KY Z86L8808SSGR53MP Z86C6516PSGR3918 Z86C6516PSCR3590 Z86C0208SSCR50JH Z86L8808HSGR53KY Z86C6516PSGR3918 Z86C6516PSCR3590 Z8623316SSCR50JU Z86C6516PSCF3918 Z86C6516PSCR3590 Z8018216FSC1830 Z8018233ASC Z8018233FSC Z86L827SZ008SCR53PF Z8523008VSC Z8F042ASB020SC2016 Z86L8808SSCR53JW Z8F6421QN020SC Z0221524ASCR50A5 Z86C3312PECF533N Z86C3616PSCR52J9 Z86C3616PSCR52J9 Z8018233ASC ZHX1810 ZHX1810 ZHX1810 Z8F042ASB020SC2106 Z86C0404PECR2304 Z86L8808SSCR535W Z8F042ASBJ020SC2106 Z86C0404PECR2304 Z86C3616PSCR52J9 Z86C0812PSCR51Y4 Z86E0812HSC1866 Z84C1516FSC BJ2918Q BJ2918Q ALHGL44.03A AFHGLYY A4288238PAB AF9155920AB AF4184709BB ALHGL44.03A A4288238PAB AF9155940CP N4134314PB NF4155940CP AF9155940CP KF4211501AP K4228953 K4233057A ETLHH26W.03Q EB4235090B EAC66525B1A ETLHGL43.04 ENYERA6094P EK422929B BF411480PA B4273933B B4273933B K4228953 VISHAY DOWA OPTEL ETC66525B1A ETZA15BG0BB ETLHGL43'04 EAC66525B1A ETZ215BG0BB B4273933B A4149799AAB A4338162BP A4233053Q Z86E02AD Z86E02AD Z86L88GB Z86L88GB Z86C63AD Z86C63AD Z86C04CC Z86L88GB Z86C63AD Z86C63AD Z86243AB Z86C63AD Z86C63AD Z80182DD Z80182LB Z80182LB Z86L88GB Z80230DB 8F042SAB Z86L88GB Z8F642BC Z02215BF Z86C33BB Z86C36CBR52J9 Z86C36CBR52J9 Z80182LB Z13754AB Z13754AB Z13754AB 8F042SAB Z86C08FCR2304 Z86L88GB 8F042SAB Z86C08FCR2304 Z86C36CBR52J9 Z86C08FG Z86E08ED Z84C15EB Fresh Convection reflow Fresh Convection reflow Fresh Fresh Fresh Convection reflow Solder Dunk Solder Dunk Convection Reflow Fresh Solder Dunk 100XTC Convection Reflow 500XTC 500XTC 100XTC Fresh Fresh Convection Reflow Fresh Fresh 50XTC 500XTC Conv Reflow/TH Conv Reflow/TH Conv Reflow/TH 500XTC Fresh 500XTC 1000XTC 500XTC 500XTC Fresh Fresh Fresh Z5220 Z5220 X5126 X5126 X5126 X5126 X5126 X5126 X5126 X5126 X5120 X6120 X6120 X4120 TSMC TSMC X6134 X6120 X6120 X6120 X6120 Z5231 Z5231 Z5231 TSMC X5126 TSMC X5126 X6120 X5126 X5220 X4120
Rev.
Sample Selection
Results
Process
DC04-0001 Page Revision
CHAPTER Quality Monitor Systems
Table 4-12 C-Mode Scanning Acoustic Microscope Monitor CMOS PLASTIC Device Type
Z86E0812PEC2114 Z86C6516PSCR3752 Z86L0208SSCR527L Z8038220FSC Z0221524ASCR50A5 Z0221524ASCR50A5 Z0221524VSCF50A5 Z0221524VSCF50A5 Z0221524ASCR50A5 Z86C0404PECR2304 Z86L8808SSCR53JW EZ80F91AZ050SG EZ80190AZ050SC Z86C0812PSCR51Y4 Z84C1516FSC Z86C0812PSCR51Y4 Z8F042APB020SC2106 Z8932320FSCR540R Z8F042ASB020SC2106 Z0221524ASCF50A5 Z0221524ASCR50A5 Z0221524ASCR50A5 EZ80F91AZ050SG Z8F6423FT020SG Z8932320FSCR540R Z8932320FSCR540R Z84C9008VSC Z84C9008VSC Z86L8108SSGR53W0 Z8F042ASB020SC2106 Z8038220FSC Z86C3616PSCR52J9 Z8F042AQB020SC2118 Z8FMC16110AKSC2119 Z8523008VSG Z8FMC16110QKSC2119 Z86C0812SSCR2432TEM Z86C0812SSCR2432TEM
EA131358.BA N4155943AA N4184706PBA K4H1466A1B EK4341177Q EK4323933Q EK4341177A EK4323933A EK4322929B ETZ215BG0BB ETHGL43.04 ACP5269.R2A AMJ1QFARC A4149799AAB A4233053Q A4149799AAB EAC66525A1A EAFK54A ENC66525.R6D EK4287191C EK4323933Q EK4341177Q BCP5269.00P EARB1189.1B EAFK54A F21T7 A43065677ABA A4306567AAP NLHH267.5RA ENC66525R6D KAHH1466A1B B4273933B BFC6652523Q EBFC670127Q B4300427B EBFC67Q127P EAFT9MAA EAFT9MAA
Rev.
Z86E08GA Z86C63AD Z86L04CC Z80382BB Z02215BF Z02215BF Z02215BF Z02215BF Z02215BF Z86C08FCR2304 Z86L88GB Z80F91AB Z80190BB Z86C08FG Z84C15EB Z86C08FG 8F042SAB Z89323EB 8F042SAB Z02215BF Z02215BF Z02215BF Z80F91AB Z8F6423BC Z89323EB Z89323EB Z84C90EB Z84C90EB Z86L96BB 8F042SAB Z80382BB Z86C36CBR52J9 8F042SAB 8FMC16AA Z80230DB 8FMC16AA Z86C08JA Z86C08JA
Sample Selection
500XTC Fresh Fresh Fresh 1000XTC 1000XTC 1000XTC Fresh Fresh 500XTC 500XTC 1000XTC Fresh 500XTC Fresh Convection reflow 500XTC 500XTC Convection Reflow Convection Reflow 1000XTC 1000XTC Convection Reflow Convection Reflow Convection Reflow 500XTC 500XTC 1000XTC 1000XTC Fresh Fresh 500XTC 500XTC Convection reflow
Results
0/22 (type 1,2, 22/22 type
Process
Macronix X5126 X5122 Z36120 X6134 X6134 X6134 X6134 X6134 X5126 TSMC X5126 X4120 X5126 TSMC TSMC Z6134 Z6134 Z6134 TSMC TSMC X4120 X4120 TSMC Z5128 X6120 TSMC 0.35 TSMC 0.35 X4120 TSMC 0.35
DC04-0001 Page Revision
CHAPTER Quality Monitor Systems
Table 4-12 C-Mode Scanning Acoustic Microscope Monitor CMOS PLASTIC Device Type
Z86L8708HSGR53Y1 Z86L8708HSGR53Y1 Z86L0808SSGR5009 Z86L8108SSGR53W0 Z0292212VSCR3796 ZHX1403MA115TH2090TR ZHX1810MV115THTR ZHX1403MA115TH2090TR ZHX1810MV115THTR Z8F042ASB020SC2106 Z8F042ASB020SC2106
EALHHCYG.RA EALHHCYG.RA N5049837A NLHH267.5RA K007DX0R AE-Z283BE AE-Z277AE AE-Z283BE AE-Z277AE ETC66525RCP ETC66525RCP
Rev.
Z86L96BB Z86L96BB Z86L08HB Z86L96BB Z02922AC Z13714BA Z13754AB Z13714BA Z13754AB 8F042SAB 8F042SAB
Sample Selection
Convection Reflow Fresh Fresh Convection Reflow Fresh Fresh Fresh Convection Reflow Convection Reflow Fresh Convection Reflow
Results
0/22 (type 1,2, 22/22 type 0/22 (type 1,2, 22/22 type 0/22 0/22 0/22 X5122
Process
X5126 Z5231 Z5231 TSMC 0.35 TSMC 0.35
DC04-0001 Page Revision
CHAPTER Package Test Information
CHAPTER Package Test Information
DC04-0001 Page Revision
CHAPTER Package Test Information
Package Test Information
Package types: 132/ Technology Data: attach (method/composition) Wirebond (type/material) Bonding wires (material/diameter) Package seal Lead finish Leadframe material/plating Leadframe plating thickness Moisture Sensitivity Level Surface Mount Devices Moisture Sensitivity Level IrDA Devices
Plastic Dual In-line Package (PDIP) Shrink Dual In-line Package (SDIP) Plastic-Leaded Chip Carrier (PLCC) Quad Flat Pack (QFP) Very Small Quad Flat Pack (VQFP) Thin Quad Flat Pack (TQFP) Small Outline Integrated Circuit (SOIC) Shrink Small Outline Package (SSOP) Ball Grid Array (BGA)
Oven cure/silver filled epoxy Ball bond, thermosonic/gold aluminum Crescent bond, thermosonic/gold silver plated frame Gold Transfer epoxy molding Solder plate Pure (Green Product) Copper (A151) spot plate PLCC Copper (A194)/Ag spot plate PDIP, SDIP, SOIC SSOP Copper (A7025)/Ag spot plate VQFP spot 150-400 micro-inches PLCC, QFP, LQFP TQFP: Floor Life hrs. 30°C/60% PDIP SOIC moisture sensitive. Floor Life hrs. 30°C/60%
DC04-0001 Page Revision
CHAPTER Package Test Information
Pre/Post Packaging Device Test Procedures: Type Testers Provision Testing Speed Provision high temp testing Provisions tape reel shipment devices Provisions tray shipment devices Sentry 15/20/21, Megatest, ITS9000, Teradyne J750 Environmental handlers
DC04-0001 Page Revision
CHAPTER Package Test Information
Reduction Hazardous Substances (RoHS)
September 2003, ZiLOG began offering 'Green' product version integrated circuits that both leadfree RoHS compliant. customer must specify Green product version because offer both standard (Sn/Pb solder plate) Green product versions concurrently. What Does Lead-Free/RoHS Compliant Mean? Reduction Hazardous Substances (R0HS) Directive 2002/95/EC European Parliament Council January 2003 restricts acceptable levels following substances listed Table TABLE Substance Lead Cadmium Mercury Hexavalnet Chromium Polybrominated Biphenyls Polybrominated Diphenyl Ethers Symbol Cr[VI] PBDE Acceptable Concentration <1000 <100 <1000 <1000 <1000 <1000
fabrication assembly ZiLOG products provided qualified subcontractors. ZiLOG requires that suppliers provide green product versions certify that they compliance with restrictions contained Table ZiLOG achieved RoHS compliance through encapsulants that contain antimony bromine-based flame retardants offering lead-free 100% matte termination plating. Unique Part Numbers identify Green products with unique ZiLOG Product Specification Index (PSI) environment code Green packages (for example, Z84C0008FEC becomes Z84C0008FEG Z8F0822SJ020SC becomes Z8F0822SJ020SG). Therefore, Green ZiLOG product version, with exception those using custom topmarks, immediately identified mark.
Reflow Profiles widely accepted tin/silver/copper (SnAgCu) alloy SN3.9Ag0.6Cu solder paste because lower melting temperature (217°) long-term reliability. SnAgCu requires higher reflow temperatures, processes must optimized achieve best yields reliability. ZiLOG packages classified JEDEC JSTD-020 Level
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CHAPTER Package Test Information
Table describes profiles tin-lead lead-free assemblies. TABLE Recommended Reflow Profile Preheat Temperature Minimum (Tsmin) Temperature Maximum (Tsmax) Time (minimum maximum) Tin-Lead Assembly 100°C 150°C 60-120 seconds Lead-Free Assembly 150°C 200°C 60-180 seconds
Tsmax ramp-up rate Time maintained above: Temperature (TL) Time (tL) Peak Temperature (TP) Time within Peak Ramp-down Rate Time 25°C Peak Temperature
second, 183°C 60-120 seconds 215°C min/225°C typ/ 240°C 10-20 seconds second minutes maximum
second, 217°C 60-120 seconds 235°C min/245°C typ/ 260°C 10-20 seconds second minutes maximum
Note that lead-free solder joints shiny tin-lead joints. Operators should able distinguish lead-free solder joints from tin-lead solder joints.
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CHAPTER Package Test Information
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CHAPTER Package Test Information
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CHAPTER Package Test Information PLASTICS PROCESS FLOW Legend:
Material Transport Process
Bank acceptance Inspection/Test
Flow Process/Item Wafer Bank Pack/transport Subcon Subcon Assembly Pack/transport ZEPI Incoming Inspection Subcontract ZilOG Products Electrical Test <For Stress Test Flow only> Burn-In (48hrs specified PSI)/ 100% Electrical Test Room
REJECT
Document
SOM-040 SOM-005
SOM-005 QCM-235
TSM-021
TSM-012/ TSM-021 QCM-108
Electrical Test Gate
Outgoing Shipping Gate
Final Visual Inspection (For visual reject) Finished Goods Bake (for VQFP/QFP/TQFP) Tape Reel required PSI) Pack Shipping Audit Ship
MAM-235
MAM-212 MAM-236 MAM-067 QCM-301 QCM-301
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CHAPTER Package Test Information
PLASTIC-STANDARD ASSEMBLY/TEST PROCESS
PLASTIC STANDARD FLOW) BANK WAFER EPOXY ATTACH WIREBOND MOLD STRIPMARK SOLDER PLATE BAKEOUT (FOR PLCC) TRIM/FORM 100% ELECTRICAL TEST SAMPLE ELECTRICAL PRESHIP INSPECTION BAKEOUT QFP/VQFP TAPE REEL (OPTIONAL SOIC, PLCC) PACK
PLASTIC STRESSED FLOW) BANK WAFER EPOXY ATTACH WIREBOND MOLD STRIPMARK SOLDER PLATE BAKEOUT (FOR PLCC) TRIM/FORM 100% ELECTRICAL TEST BURN-IN HOURS 100% ELECTRICAL TEST ROOM PRESHIP INSPECTION BAKEOUT QFP/VQFP TRAY TAPE REEL (OPTIONAL PLCC, QFP, SOIC) PACK
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CHAPTER Package Test Information
Handling Storage Surface Mount Devices Handling Components should handled with vacuum pick ensure that coplanarity leads maintained.
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CHAPTER Package Test Information
Lead Protection Avoid sliding units with leads contact. solder coating prone contamination/scraping. sliding cannot avoided, contact surface should clean smooth.
Protection Observe protection times. These static sensitive devices.
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CHAPTER Package Test Information
Storage/Unpacking Caution plastic body surface mount product subjected high temperatures during printed circuit board assembly operation. moisture that present plastic expand damage unit. Therefore, very important that surface mount before printed circuit board operation begins. ZiLOG assures that unit thoroughly before final packing shipment. units shipped "dry pack" envelope designed keep moisture away from IC's. user should carefully observe following practices assure that units remain moisture free time printed circuit board soldering operation: open pack until ready solder. Product exposed ambient conditions 30C/60%RH less) more than hours. This corresponds moisture sensitivity level IrDA products more sensitive moisture than integrated circuits. IrDA exposed ambient conditions 30C/60%RH less) more than hours. This corresponds moisture sensitivity level Unopened packs stored <40oC/90% When pack must opened short period time (such incoming inspection), should resealed soon possible, ensuring that desiccant remains inside pack. Resealing should done with heat seal best closure bag. units have exceeded their exposure time humidity indicator card shows humidity above 20%, devices should baked hours 125oC, before board soldering. Product supplied Tape Reel must removed from Tape Reel placed heat resistant trays prior baking. Sales Wafers plated dice kept cabinet with 35%, temp 1627 degrees (60-80.6
Soldering Recommended surface mount profile standard tin/lead solder plate follows: Maximum 3oC/sec. ramp Maximum 220oC peak temp. Minimum min. cool down from peak temp. 50oC. Please refer Lead-Free products www.zilog.com lead-free soldering recommendations. Desoldering Parts removed board assembly problems suspected failure. boxed-in type desoldering fixture used, following recommended operating parameters: Package Temp: 220oC max. Dwell Time: min. max. important that above precautions followed ensure integrity packages.
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CHAPTER Package Test Information
THERMAL CHARACTERISTICS Calculation Device Junction Temperature Failure rates Failures Time (FITS) obtained from life test data based ambient temperatures (TA), corrected junction temperature (TJ). However, when significant difference between exists, incorporated into Arrhenius Equation accelerated failure rates using following equations: Junction Temp. (TJ): where: (JA) (PD) thermal resistance junction with respect ambient (C/W). maximum power dissipation watts ambient temperature (JC) (PD)
and:
Case Temperature (TC): where: Illustration:
thermal resistance junction with respect case. order calculate junction temperature (TJ) case temperature (TC) static airflow Z86C04 PDIP, following:
25°C, maximum power dissipation this device 0.08 watts. example, ambient temperature denoted assumed 25°C.
Z86C04 plastic (copper); 18°C/watt respectively. Therefore, (0.08) 31.2°C, 31.2 0.08) 29.8°C
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CHAPTER Package Test Information
Table 5-1. Device Table Summary Thermal Characteristics ZiLOG Plastic Packages Package Type PDIP PLCC 100L VQFP 100L SOIC SSOP SSOP Package Code
Lead Frame
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CHAPTER Package Test Information
Table 5-2. Device Table Summary Thermal Resistance Hermetic Packages PBGA 144L 256L 256L Layer Layer Layer
Notes:
P=Plastic V=PLCC-Plastic Leaded Chip Carrier F=QFP-Plastic Quad Flat Pack A=VQFP-Very Small Quad Flat Pack S=SOIC-Small Outline Integrated Circuit B=PBGA-Plastic Ball Grid Array HZ=SSOP-Shrink Small Outline Package HT=EPT SSOP-Exposed Thin SSOP
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CHAPTER Quality Systems
CHAPTER Quality Systems
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CHAPTER Quality Systems
Quality Systems
QUALITY SYSTEMS Organization: Quality control departments located ZiLOG worldwide headquarters Jose, ZiLOG Idaho Technology Center Meridian, ZiLOG Electronics Philippines (ZEPI) Manila, Equipment: Idaho Manila conduct material analysis failures including decapsulation, SEM, microprobe, Emission microscope, X-Ray, EDX, cross-section Sonoscan acoustic microscope. Table complete list test equipment.
FOUNDRY: 100% wafer manufacturing foundry. SUBCONTRACTING: 100% assembly subcontracted. TRACEABILITY: traceability provided product date code code that incorporated into standard ZiLOG integrated circuit device topmark. AVAILABILITY DOCUMENTATION MONITORING: Documents available either hard copy electronic form (SOP0937). QUALITY DATA: Data availability: Outgoing quality measured quality control acceptance/rejection data each production which reported basis.
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CHAPTER Quality Systems
TESTING (QA/Operating) Test program release procedure: ZiLOG formal test program review/release procedure, Procedures SOP1239. Does sample test? Yes. Lots sampled using statistically valid sampling plan. sample fails, entire re-tested second sample drawn. datasheet tested guaranteed? ZiLOG provides product specifications customer document called data sheet (SOP0302). product specification describes attributes that ZiLOG warrants. product tested full temperature range? product 100% electrically tested prior Does pull samples both Testing? propagation delay tested (e.g., simultaneous switching effect): Simultaneous Fault coverage (Operating QA): close 100% practical Coplanarity requirement SMD: mils maximum; reference seating plane Define failure: Does meet specifications
TEST TAPE SUPPORT: Test tapes, load boards documentation available WHAT HAPPENS WHEN FAILURES OCCUR? sample truncated? Corrective action plan: Failure analysis initiated R/QA product segregated (i.e., there protection from mixing)? Automatic binning during electrical test used segregate product. Product traceability customer order maintained unique part numbering system (SOP0937 SOP0902)
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CHAPTER Quality Systems
WHEN PROCESSES PERFORMED OFFSHORE, WHAT CONTROLS?: Same onshore; Manila plant monitored on-site organization. Periodic audits performed offshore facilities ZiLOG personnel. AVAILABILITY PROGRAMMING FACILITIES: ZiLOG develops test programs with facilities located Manila, Jose, Meridian, AUDIT: Availability audit reports: Serialized sheets audit checklists maintained Quality Control organization.
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CHAPTER Quality Systems
DOCUMENT CONTROL SYSTEM ZiLOG's Document Control Department promotes reliability quality through efficient, global document management revision control systems. Document Control Department maintains electronic document management system that accessible ZiLOG employees worldwide hours day. Manufacturing documents available electronically wafer foundry assembly subcontractors. system automatically manages revision control; ensuring users have most upto-date version every time. Corporate Document Control Meridian, oversees worldwide document management processes revision controlled documents. They also responsible managing design, engineering marketing documents records well company-wide policies procedures. Document Control department Manila, Philippines manages Asian manufacturing, assembly test procedures specifications. Additional details regarding sections contained this document found ZiLOG policies, procedures specifications. General categories listed below. Please contact ZiLOG Director Quality Reliability with specific questions. Corporate-Wide Policies Standard Operating Procedures Business Units, Corporate Communications, Finance, Human Resources, Information Technology, Legal, Operations, Reliability Sales, Strategy, Technology, Design Test Core Process Documents Phases Product Life Cycle Product Process Specific Manufacturing, Assembly Test Procedures Specifications
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CHAPTER Quality Systems
Flow Chart Input Product Demand
Wafer Foundry
Wafer Probe ZiLOG, Manila,
Wafer Probe Subcontractor
Assembly Subcontractor
Final Test ZEPI
Final Test Subcontractor
Ship Customer
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CHAPTER Quality Reliability Glossary
CHAPTER Quality Reliability Glossary
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CHAPTER Quality Reliability Glossary
Quality Reliability Glossary
TERM Accelerated Life Test:
DEFINITION Symbol Angstrom, which equals 10-10 meters (one ten-billionth meter). life test, which applied stress level exceeds that needed actual order shorten time required observe failure. good accelerated test should alter basic modes and/or mechanisms failure. ratio times needed obtain same failure rates under different sets stress conditions involving same failure modes mechanisms. energy level needed activate specific failure mechanism. Auger Electron Spectroscopy typically used interlayer dielectrics passivation films. operation exposing resist covered wafer projection printer. Atmospheric Pressure Chemical Vapor Deposition. method deposition glass used interlayer passivation dielectric. Application Specific Standard Product. Acceptable Quality Level. Generally, percent confidence that material stated will pass sample inspection. connecting package leads specified locations chip fine wire. Exposed aluminum pads chip which wires from package lead frame bonded during assembly. operation device prior application, elevated temperature and/or voltage specific period time. purpose stabilize device characteristics, identify early failures, eliminate devices subject infant mortality excessive parametric drift. Boron doped Phosphosilicate Glass.
Acceleration Factor:
Activation Energy (Ae): AES: Align: APCVD: ASSP: AQL: Bonding: Bond Pads: Burn-In:
BPSG:
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CHAPTER Quality Reliability Glossary
TERM CFA: CMOS: Confidence: Check: Chip:
DEFINITION Critical Dimension. Customer Failure Analysis/Correlation Request. Certificate Conformance. Complementary technology combining transistors same product. Advantages include power dissipation. specialized statistical term which refers probability statement being true. visual check done conclusion (dry wet) masking step. square wafer containing single integrated circuit. substrate which active passive components circuit fabricated; also called die. room chip fabrication plant which wafers processed. This area features controlled environment with filtered that eliminates essentially dust dirt. connection between conductive layers, e.g., metal-to-silicon contact. statistically defined limit which determines whether process changed significantly compared past history. measure statistical process control. C-Mode Scanning Acoustic Microscope which examines packaged units produces high resolution, ultrasonic images. Chemical Vapor Deposition thin films. Gaseous reactants brought together over silicon wafer, depositing required layers typically used interlayer dielectrics passivation films. Document Control. Defense Electronic Supply Center. Deionized water. Dual-in-Line Package. Design Rule Check. Device Under Test. MOSFET with permanently "on" channel; requires negative applied gate voltage turn (see "enhancement transistor").
Clean Room:
Contact: Control limit:
C-SAM: CVD:
DESC: DIP: DRC: DUT: Depletion transistor:
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CHAPTER Quality Reliability Glossary
TERM Develop:
DEFINITION chemical process that solidifies photoresist where been exposed removes elsewhere (for negative resist) vice versa (for positive resist). visual check following masking verify proper resist patterning before etch, e.g., alignment thickness checked. single integrated circuit separated from wafer which made; also called chip. process doping silicon diffusing impurities from surface into wafer high temperature. region silicon substrate doped diffusion implant (e.g., source drain diffusions). impurity intentionally introduced into silicon control electronic behavior (e.g., Boron, Arsenic, Phosphorus). implant, measure amount dopant implanted; usually expressed ions square centimeter. highly doped region adjacent transistor currently carrying channel. carries electrons transistor next circuit element conductor. process segment where photoresist spun onto wafer, soft baked, exposed, developed obtain desired pattern ready etch implant (see "wet masking"). Energy Dispersive X-ray analysis. Normally uses electron beam excitation scanning electron microscope. Electrical overstress, common application failure mechanism. Electrostatic discharge, common handling failure mechanism. MOSFET with normally "off" channel; requires positive applied gate voltage turn (see "depletion transistor"). rate which given layer etched given standard acid solution, expressed Deposition technique Aluminum, Gold, Chromium thin films. Expose photoresist-coated wafer light through mask. Field Application Engineer. Measurement assembled device performance. Products categorized speed/power/performance criteria.
Develop inspect: Die: Diffusion:
Dopant: Dose: Drain:
Masking:
EDX: EOS: ESD: Enhancement transistor: Etch rate: Evaporation: Expose: FAE: Final Test:
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CHAPTER Quality Reliability Glossary
TERM FIT: FPO: FQE: Gate: Gate oxide: Generic:
DEFINITION "Failure units" "Failure Time," measure failure rate defined failure 109, billion device hours. Finish Process Order. traveler that accompanies each through finish (Mark Pack FQA) areas. Field Quality Engineer. gate transistor. Dielectric oxide between gate channel region transistor. Devices similar process function. ZiLOG uses generic approach Reliability Program. Devices built same wafer process having similar complexity function grouped into "generic" product family. Data device within family considered indicative performance other devices that group process line. Trapping contamination atoms (especially alkali ions) prevent their drift into device regions where they affect electrical performance. amorphous form SiO2, used various insulating layers wafer. step following masking, where resist heated prepare etch. Highly Accelerated Stress Test. High Temperature Operating Life. Integrated Circuit. Initial failure rate life studies. followed early failure period then final wear period failure (bathtub curve). Incoming Quality Control. Kilo, thousand, 103. magnified, physical representation electronic circuit transistor level. Leadless Chip Carrier. external connection packaged integrated circuit. test purpose estimating some characteristic(s) device's useful lifetime. Large Scale Integration
Gettering:
Glass: Hard Bake: HAST: HTOL: Infant Mortality: IQC: Layout: LCC: Lead: Life Test: LSI:
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CHAPTER Quality Reliability Glossary
TERM LPCVD: glass:
DEFINITION Pressure Chemical Vapor Deposition. Typical method deposition glass used interlayer passivation dielectric. Temperature Oxide glass used interlayer passivation dielectric. Typically deposited same temperature APCVD deposited glasses used passivation, pressure. Tolerance Percent Defective. sample plan that will reject percent lots equal worse than stated LTPD value. pattern usually "printed" glass, used define areas chip wafer production purposes. lithography portion process physical area where lithography occurs. Million electron Volts. Milli electron Volts. Manufacturing. 0.001 inch. Military. Metal Oxide Semiconductor integrated circuit technology. Material Review Board. Mean Time Between Failures. Mean Time Fail. Time percent Cumulative Fail. 10-9. resist material which unexposed areas developed away. National Institute Standards Technology. Silicon Nitride, Si3N4. channel technology. Nanometer (1nm 10-9 meters). Nanoseconds (10-9 seconds). Original Equipment Manufacturer. Time Programmable Product sold plastic packaging. window provided erasure. process whereby thick oxide islands grown between active device regions better isolation performance. plasma deposited passivation interlayer dielectric film
LTPD: Mask: Masking: MeV: meV: MFG: Mil: MIL: MOS: MRB: MTBF: MTTF: Nano: Negative photoresist: NIST: Nitride: NMOS: OEM: OTP: "Oxi": Oxynitride:
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CHAPTER Quality Reliability Glossary
TERM PDIP: PECVD: PGA: PLCC: POA: PPM: PPOT: PROM: PSG: Package: Photolithography: Photomask:
DEFINITION consisting silicon, oxygen, nitrogen. Phosphorous. Plastic Dual In-Line Package. Product Engineer. Plasma Enhanced Chemical Vapor Deposition. Grid Array (package). Plastic Leaded Chip Carriers. Procedural Manual that contains ZiLOG's policies procedures. Point Acceptance. Quality Data, Parts Million defective; 1000 percent defective. Pressure Pot. Programmable Read Only Memory. Phosphosilicate Glass. glass containing phosphorus form P205). LTO, Pyrox Pyroglass types PSG. container used hold active semiconductor device. portion process involving light sensitive photoresist material layer definition. patterned chrome glass photographic plate used transfer pattern photo-resist masking. process segment involving patterning given layer photomask. light sensitive polymer material that used mask etching implant steps. also Negative Positive Photoresist. process using transformed field into reactive plasma. Deposition thin films using gaseous reactants presence plasma lower temperatures. etching process using transformed field into reactive plasma. Polycrystalline silicon made many tiny crystals opposed single crystal silicon. Oxidation poly after been defined. re-ox provides interpoly di-electric double (two layer) poly process. photosensitive organic polymer material which exposed areas
Photoresist: Plasma ash: Plasma deposition: Plasma etch: Poly: Poly Re-ox: Positive photoresist:
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CHAPTER Quality Reliability Glossary
TERM Prebake: Probe: Process Templating:
DEFINITION developed away. First step masking, which wafers dried oven prior resist application. first electrical test processed wafers. profile displayed process evaluation parameters, which automatically recorded from test patterns wafers they proceed through production line. machine that projects photomask onto resist-coated wafer. mask same size wafer imaged wafer. type phosphosilicate glass containing approximately Phosphorous. Quality Assurance. Quality Engineer. Product Process Qualification Report (XXXX report number). Rutherford Back Scattering. method non-destructive depth profile analysis thin films back scattering high-energy helium ions. Reliability Engineer. Residual Analysis. Quad Flat Package. Quality Improvement Process. Quality Reliability. Relative Humidity. Reactive Etch. Return Material Authorization. Read Only Memory. basic physical property which determines extent light bending (refraction) upon entering surface. Used thin film process control indirect measure chemistry. Photoresist. Statistical Design Experiments. Scanning Electron Microscope. microscope which makes scanning beam electrons image detail less than 100A size
Projection Aligner:
Pyrox: QR-XXXX: RBS:
RGA: QFP: QIP: Q&R: RIE: RMA: ROM: Refractive Index:
Resist: SDE: SEM:
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CHAPTER Quality Reliability Glossary
TERM SIMS: SL-Lot: SPC: STS: Silicon: Soft bake: SOIC: Source: Spec. Limit: Spin: Sputtering:
DEFINITION (surface only). Secondary Mass Spectroscopy. Special Lot. ZiLOG identification used identify products designed unique customer requirements. Statistical Process Control. Ship-to-Stock. Eliminates need customer IQC. Metallic element which forms substrate most semiconductor devices. step preparing freshly spun photoresist exposure baking oven remove excess solvent). Small Outline Integrated Circuit package. Equivalent drain transistor with exception that electrons leave source into channel active device. Absolute acceptable limit process parameter. process step which coats spinning wafer with liquid photoresist dispensing liquid onto center. Deposition metal layer bombarding metal target with heavy ions from gaseous (e.g., argon) plasma. Metal atoms removed from target deposited onto wafer during this process. Technology Development. Time Dependent Dielectric Breakdown. Transmission Electron Microscope. microscope used obtain high-resolution images with transmitted electron beam electron lens imaging rather than scanning. Temperature Humidity Bias (85°C/85% RH). Thin small outline package. Special electrical test structures included production device wafers monitoring critical parameters. high quality SiO2 layer grown oxidizing silicon furnace opposed externally deposited glass). Underwriters Laboratory. Ultra Violet. monitor measuring voltage current between probes applied semiconductor layer. Measures layer resistivity.
TDDB: TEM:
THB: TSOP: Test patterns: Thermal oxide: V/I:
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CHAPTER Quality Reliability Glossary
TERM Visual: VLSI: VQFP: Wafer:
DEFINITION check process quality examination wafers under light microscope. Very Large Scale Integration. Very small Quad Flat Pack package. Transistor threshold voltage. Voltage which transistor turns thin piece silicon sliced from cylinder shaped crystal. polished that surface like mirror. most commonly found 6-inch diameters. wafer base material most world's integrated circuits. flat area ground onto original silicon ingot from which wafers sliced. Gives crystallographic orientation.
Wafer flat:
Waterfall Guardbanding: technique testing circuit different levels manufacturing process, insure above marginal product performance compliance. masking: Process segment following "dry masking" which wafer, covered with resist pattern, etched transfer resist pattern wafer. resist then removed (includes and/or plasma etching). Etching liquid acid solution. process connecting thin wires from chip's bond pads package lead. (This done assembly.) Zero Defects. ZiLOG Electronics Philippines, Inc. ZiLOG Corporate Headquarters, Jose, California.
etch: Wire bonding:
ZEPI: ZUS:
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