Dual flip-flop with reset; negative-edge trigger Rev. November 20

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Dual flip-flop with reset; negative-edge trigger Rev. November 20

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74HC73
Dual flip-flop with reset; negative-edge trigger
Rev. November 2004 Product data sheet
74HC73 high-speed Si-gate CMOS device compatible with low-power Schottky (LSTTL). 74HC73 specified compliance with JEDEC standard 74HC dual negative-edge triggered flip-flop featuring individual clock (nCP) reset (nR) inputs; also complementary outputs. inputs must stable set-up time prior HIGH-to-LOW clock transition predictable operation. reset (nR) asynchronous active input. When LOW, overrides clock data inputs, forcing output output HIGH. Schmitt-trigger action clock input makes circuit highly tolerant slower clock rise fall times.
Features
Low-power dissipation Complies with JEDEC standard protection: EIA/JESD22-A114-B exceeds 2000 EIA/JESD22-A115-A exceeds Multiple package options Specified from from +125
Philips Semiconductors
74HC73
Dual flip-flop with reset; negative-edge trigger
Quick reference data
Table Quick reference data Tamb Symbol tPHL, tPLH Parameter propagation delay fmax
Conditions
Unit
maximum clock frequency input capacitance power dissipation capacitance flip-flop
used determine dynamic power dissipation µW). VCC2 VCC2 where: input frequency MHz; output frequency MHz; output load capacitance supply voltage number inputs switching; VCC2 outputs.
Ordering information
Table Ordering information Package Temperature range Name 74HC73N 74HC73D 74HC73DB 74HC73PW +125 +125 +125 +125 DIP14 SO14 SSOP14 Description plastic dual in-line package; leads (300 mil) plastic shrink small outline package; leads; body width Version SOT27-1 SOT337-1 SOT402-1 Type number
plastic small outline package; leads; body width SOT108-1
TSSOP14 plastic thin shrink small outline package; leads; body width
9397 13815
Koninklijke Philips Electronics N.V. 2004. rights reserved.
Product data sheet
Rev. November 2004
Philips Semiconductors
74HC73
Dual flip-flop with reset; negative-edge trigger
Functional diagram
001aab981
Functional diagram
001aab979
001aab980
Logic symbol
logic symbol
9397 13815
Koninklijke Philips Electronics N.V. 2004. rights reserved.
Product data sheet
Rev. November 2004
Philips Semiconductors
74HC73
Dual flip-flop with reset; negative-edge trigger
001aab982
Logic diagram (one flip-flop)
Pinning information
Pinning
001aab978
configuration
description
Table Symbol
9397 13815
description Description clock input flip-flop (HIGH-to-LOW, edge-triggered) asynchronous reset input flip-flop (active LOW) synchronous input flip-flop positive supply voltage clock input flip-flop (HIGH-to-LOW, edge-triggered) asynchronous reset input flip-flop (active LOW) synchronous input flip-flop complement flip-flop output true flip-flop output synchronous input flip-flop
Koninklijke Philips Electronics N.V. 2004. rights reserved.
Product data sheet
Rev. November 2004
Philips Semiconductors
74HC73
Dual flip-flop with reset; negative-edge trigger
description .continued Description ground true flip-flop output complement flip-flop output synchronous input flip-flop
Table Symbol
Functional description
Function table
Table Input
Function table Output asynchronous reset toggle load (reset) load (set) hold change) Operating mode
HIGH voltage level; HIGH voltage level set-up time prior HIGH-to-LOW transition; voltage level; voltage level set-up time prior HIGH-to-LOW transition; state referenced output set-up time prior HIGH-to-LOW transition; don't care; HIGH-to-LOW transition.
Limiting values
Table Limiting values accordance with Absolute Maximum Rating System (IEC 60134). Voltages referenced (ground Symbol ICC, IGND Tstg Ptot Parameter supply voltage input diode current output diode current output source sink current current storage temperature power dissipation DIP14 package SO14, SSOP14 TSSOP14 packages
9397 13815
Conditions -0.5 -0.5 -0.5
-0.5
+150
Unit
Above Ptot derates linearly with mW/K. Above Ptot derates linearly with mW/K.
Koninklijke Philips Electronics N.V. 2004. rights reserved.
Product data sheet
Rev. November 2004
Philips Semiconductors
74HC73
Dual flip-flop with reset; negative-edge trigger
Recommended operating conditions
Table Symbol Recommended operating conditions Parameter supply voltage input voltage output voltage input rise fall times except ambient temperature Conditions 1000 +125 Unit
Tamb
Static characteristics
Table Static characteristics recommended operating conditions; voltages referenced (ground Symbol Parameter Tamb HIGH-level input voltage LOW-level input voltage HIGH-level output voltage -5.2 LOW-level output voltage input leakage current quiescent supply current input capacitance GND; GND; 0.15 0.16 0.26 0.26 ±0.1 3.98 5.48 4.32 5.81 3.15 1.35 Conditions Unit
9397 13815
Koninklijke Philips Electronics N.V. 2004. rights reserved.
Product data sheet
Rev. November 2004
Philips Semiconductors
74HC73
Dual flip-flop with reset; negative-edge trigger
Table Static characteristics .continued recommended operating conditions; voltages referenced (ground Symbol Parameter Tamb HIGH-level input voltage LOW-level input voltage HIGH-level output voltage -5.2 LOW-level output voltage input leakage current quiescent supply current GND; GND; 0.33 0.33 ±1.0 40.0 3.84 5.34 3.15 1.35 Conditions Unit
9397 13815
Koninklijke Philips Electronics N.V. 2004. rights reserved.
Product data sheet
Rev. November 2004
Philips Semiconductors
74HC73
Dual flip-flop with reset; negative-edge trigger
Table Static characteristics .continued recommended operating conditions; voltages referenced (ground Symbol Parameter Tamb +125 HIGH-level input voltage LOW-level input voltage HIGH-level output voltage -5.2 LOW-level output voltage input leakage current quiescent supply current GND; GND; ±1.0 80.0 3.15 1.35 Conditions Unit
9397 13815
Koninklijke Philips Electronics N.V. 2004. rights reserved.
Product data sheet
Rev. November 2004
Philips Semiconductors
74HC73
Dual flip-flop with reset; negative-edge trigger
Dynamic characteristics
Table Dynamic characteristics Figure Symbol Parameter Conditions Figure propagation delay Figure propagation delay Figure tTHL, tTLH output transition time Figure clock pulse width HIGH Figure reset pulse width HIGH Figure trem removal time Figure set-up time Figure Unit Tamb tPHL, tPLH propagation delay
9397 13815
Koninklijke Philips Electronics N.V. 2004. rights reserved.
Product data sheet
Rev. November 2004
Philips Semiconductors
74HC73
Dual flip-flop with reset; negative-edge trigger
Table Dynamic characteristics .continued Figure Symbol Parameter hold time Conditions Figure fmax maximum clock frequency Figure power dissipation capacitance flip-flop
Unit
Tamb tPHL, tPLH propagation delay Figure propagation delay Figure propagation delay Figure tTHL, tTLH output transition time Figure clock pulse width HIGH Figure reset pulse width HIGH Figure trem removal time Figure
9397 13815
Koninklijke Philips Electronics N.V. 2004. rights reserved.
Product data sheet
Rev. November 2004
Philips Semiconductors
74HC73
Dual flip-flop with reset; negative-edge trigger
Table Dynamic characteristics .continued Figure Symbol Parameter set-up time Conditions Figure hold time Figure fmax maximum clock frequency Figure Tamb +125 tPHL, tPLH propagation delay Figure propagation delay Figure propagation delay Figure tTHL, tTLH output transition time Figure clock pulse width HIGH Figure reset pulse width HIGH Figure Unit
9397 13815
Koninklijke Philips Electronics N.V. 2004. rights reserved.
Product data sheet
Rev. November 2004
Philips Semiconductors
74HC73
Dual flip-flop with reset; negative-edge trigger
Table Dynamic characteristics .continued Figure Symbol trem Parameter removal time Conditions Figure set-up time Figure hold time Figure fmax maximum clock frequency Figure
used determine dynamic power dissipation µW). VCC2 VCC2 where: input frequency MHz; output frequency MHz; output load capacitance supply voltage number inputs switching; VCC2 outputs.
Unit
9397 13815
Koninklijke Philips Electronics N.V. 2004. rights reserved.
Product data sheet
Rev. November 2004
Philips Semiconductors
74HC73
Dual flip-flop with reset; negative-edge trigger
Waveforms
input
input
tPHL tPLH
output
tTHL output
tTLH
tTLH tPLH
tTHL tPHL
001aab983
shaded areas indicate when input permitted change predictable output performance.
Waveforms showing clock (nCP) output (nQ, propagation delays, clock pulse width, set-up hold times, output transition times maximum clock frequency
input trem input tPHL output tPLH input
001aab984
Waveforms showing reset (nR) input output (nQ, propagation delays reset pulse width removal time
9397 13815
Koninklijke Philips Electronics N.V. 2004. rights reserved.
Product data sheet
Rev. November 2004
Philips Semiconductors
74HC73
Dual flip-flop with reset; negative-edge trigger
PULSE GENERATOR D.U.T.
mna101
Test data given Table Definitions test circuit: Termination resistance should equal output impedance pulse generator. Load capacitance including probe capacitance.
Load circuitry switching times Table Supply Test data Input Load
9397 13815
Koninklijke Philips Electronics N.V. 2004. rights reserved.
Product data sheet
Rev. November 2004
Philips Semiconductors
74HC73
Dual flip-flop with reset; negative-edge trigger
Package outline
DIP14: plastic dual in-line package; leads (300 mil) SOT27-1
seating plane
index
scale
DIMENSIONS (inch dimensions derived from original dimensions) UNIT inches max. 0.17 min. 0.51 0.02 max. 0.13 1.73 1.13 0.068 0.044 0.53 0.38 0.021 0.015 0.36 0.23 0.014 0.009 19.50 18.55 0.77 0.73 6.48 6.20 0.26 0.24 2.54 7.62 3.60 3.05 0.14 0.12 8.25 7.80 0.32 0.31 10.0 0.39 0.33 0.254 0.01 max. 0.087
Note Plastic metal protrusions 0.25 (0.01 inch) maximum side included. OUTLINE VERSION SOT27-1 REFERENCES 050G04 JEDEC MO-001 JEITA SC-501-14 EUROPEAN PROJECTION
ISSUE DATE 99-12-27 03-02-13
Package outline SOT27-1 (DIP14)
9397 13815 Koninklijke Philips Electronics N.V. 2004. rights reserved.
Product data sheet
Rev. November 2004
Philips Semiconductors
74HC73
Dual flip-flop with reset; negative-edge trigger
SO14: plastic small outline package; leads; body width
SOT108-1
index detail
scale
DIMENSIONS (inch dimensions derived from original dimensions) UNIT max. 1.75 0.25 0.10 1.45 1.25 0.25 0.01 0.49 0.36 0.25 0.19 8.75 8.55 0.16 0.15 1.27 0.05 1.05 0.028 0.024 0.25 0.01 0.25 0.01
0.010 0.057 inches 0.069 0.004 0.049
0.019 0.0100 0.35 0.014 0.0075 0.34
0.244 0.039 0.041 0.228 0.016
0.028 0.004 0.012
Note Plastic metal protrusions 0.15 (0.006 inch) maximum side included. OUTLINE VERSION SOT108-1 REFERENCES 076E06 JEDEC MS-012 JEITA EUROPEAN PROJECTION
ISSUE DATE 99-12-27 03-02-19
Package outline SOT108-1 (SO14)
9397 13815 Koninklijke Philips Electronics N.V. 2004. rights reserved.
Product data sheet
Rev. November 2004
Philips Semiconductors
74HC73
Dual flip-flop with reset; negative-edge trigger
SSOP14: plastic shrink small outline package; leads; body width
SOT337-1
index detail
scale
DIMENSIONS original dimensions) UNIT max. 0.21 0.05 1.80 1.65 0.25 0.38 0.25 0.20 0.09 0.65 1.25 1.03 0.63 0.13
Note Plastic metal protrusions 0.25 maximum side included. OUTLINE VERSION SOT337-1 REFERENCES JEDEC MO-150 JEITA EUROPEAN PROJECTION
ISSUE DATE 99-12-27 03-02-19
Package outline SOT337-1 (SSOP14)
9397 13815 Koninklijke Philips Electronics N.V. 2004. rights reserved.
Product data sheet
Rev. November 2004
Philips Semiconductors
74HC73
Dual flip-flop with reset; negative-edge trigger
TSSOP14: plastic thin shrink small outline package; leads; body width
SOT402-1
index
detail
scale
DIMENSIONS original dimensions) UNIT Notes Plastic metal protrusions 0.15 maximum side included. Plastic interlead protrusions 0.25 maximum side included. OUTLINE VERSION SOT402-1 REFERENCES JEDEC MO-153 JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-18 max. 0.15 0.05 0.95 0.80 0.25 0.30 0.19 0.65 0.75 0.50 0.13 0.72 0.38
Package outline SOT402-1 (TSSOP14)
9397 13815 Koninklijke Philips Electronics N.V. 2004. rights reserved.
Product data sheet
Rev. November 2004
Philips Semiconductors
74HC73
Dual flip-flop with reset; negative-edge trigger
Revision history
Table Revision history Release date 20041112 Data sheet status Product data sheet Change notice Doc. number 9397 13815 Supersedes 74HC_HCT73_CNV_2 Document 74HC73_3 Modifications:
format this data sheet been redesigned comply with current presentation information standard Philips Semiconductors. Removed type number 74HCT73. Inserted family specification. Product specification Product specification 74HC_HCT73_1
74HC_HCT73_CNV_2 74HC_HCT73_1
19970911 19901201
9397 13815
Koninklijke Philips Electronics N.V. 2004. rights reserved.
Product data sheet
Rev. November 2004
Philips Semiconductors
74HC73
Dual flip-flop with reset; negative-edge trigger
Data sheet status
Level Data sheet status Objective data Preliminary data Product status Development Qualification Definition This data sheet contains data from objective specification product development. Philips Semiconductors reserves right change specification manner without notice. This data sheet contains data from preliminary specification. Supplementary data will published later date. Philips Semiconductors reserves right change specification without notice, order improve design supply best possible product. This data sheet contains data from product specification. Philips Semiconductors reserves right make changes time order improve design, manufacturing supply. Relevant changes will communicated Customer Product/Process Change Notification (CPCN).
Product data
Production
Please consult most recently issued data sheet before initiating completing design. product status device(s) described this data sheet have changed since this data sheet published. latest information available Internet data sheets describing multiple type numbers, highest-level product status determines data sheet status.
Definitions
Short-form specification data short-form specification extracted from full data sheet with same type number title. detailed information relevant data sheet data handbook. Limiting values definition Limiting values given accordance with Absolute Maximum Rating System (IEC 60134). Stress above more limiting values cause permanent damage device. These stress ratings only operation device these other conditions above those given Characteristics sections specification implied. Exposure limiting values extended periods affect device reliability. Application information Applications that described herein these products illustrative purposes only. Philips Semiconductors make representation warranty that such applications will suitable specified without further testing modification.
Disclaimers
Life support These products designed life support appliances, devices, systems where malfunction these products reasonably expected result personal injury. Philips Semiconductors customers using selling these products such applications their risk agree fully indemnify Philips Semiconductors damages resulting from such application. Right make changes Philips Semiconductors reserves right make changes products including circuits, standard cells, and/or software described contained herein order improve design and/or performance. When product full production (status `Production'), relevant changes will communicated Customer Product/Process Change Notification (CPCN). Philips Semiconductors assumes responsibility liability these products, conveys license title under patent, copyright, mask work right these products, makes representations warranties that these products free from patent, copyright, mask work right infringement, unless otherwise specified.
Contact information
additional information, please visit: sales office addresses, send email
9397 13815
Koninklijke Philips Electronics N.V. 2004. rights reserved.
Product data sheet
Rev. November 2004
Philips Semiconductors
74HC73
Dual flip-flop with reset; negative-edge trigger
Contents
General description Features Quick reference data Ordering information Functional diagram Pinning information Pinning description Functional description Function table Limiting values. Recommended operating conditions. Static characteristics. Dynamic characteristics Waveforms Package outline Revision history Data sheet status Definitions Disclaimers Contact information
Koninklijke Philips Electronics N.V. 2004
rights reserved. Reproduction whole part prohibited without prior written consent copyright owner. information presented this document does form part quotation contract, believed accurate reliable changed without notice. liability will accepted publisher consequence use. Publication thereof does convey imply license under patent- other industrial intellectual property rights. Date release: November 2004 Document number: 9397 13815
Published Netherlands

Dual flip-flop with reset; negative-edge trigger Rev. November 20

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