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Some members High-Speed Microcontroller Family incorporate internal EP


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Application Note Using High-Speed Microcontroller Bootstrap Loader
Some members High-Speed Microcontroller Family incorporate internal EPROM program storage. Some applications, however, require system reprogrammablility program memory. Such system easily implemented using Dallas Semiconductor High-Speed microcontroller with internal program memory reload external nonvolatile memory such Flash memory NVRAM. Using internal program memory bootloader allows lower cost solution than could obtained using device with internal NVRAM program memory costly boot- block Flash memory. most common bootloader configuration incorporates elements: microcontroller programmed with bootstrap loader, bootloader, external memory device such NVRAM Flash memory hold user application software. When system resets, following power-on external reset, will begin executing instructions microcontroller's internal program memory. bootloader code, inside microcontroller begins checking "loader/no- loader" stimulus such logic specific port pin, serial port character, etc. This allows system decide should load user program, execution should begin using existing user program. stimulus received, indicating that load desired, device will disable internal program memory ROMSIZE feature begin execution from external memory. stimulus present, device will execute bootloader routine, begin reprogramming external memory. This application note will provide examples designer external Flash NVRAM system reprogrammability High-Speed Microcontroller based design. General hardware software design guidelines presented. Software examples support techniques described herein available electronic format from Dallas Semiconductor anonymous site (Internet) BBS.
INVOKING BOOTLOADER
There several ways invoke loader. simplest dedicate general purpose sampled part reset routine contained inside High-Speed Microcontroller. examples this application note utilize P1.7, INT5, because least likely interfere with existing 8051 code designs. Following reset, device will begin executing code from internal EPROM. internal program will perform quick test determine loader should invoked. Because this defaults high state after reset, recommended that condition this used signal invoke loader. Using interrupt also allows device invoke loader times other than reset interrupt service routine. method used assert logic simple dedicated switch, more complicated connection RS-232 cable from host that pulls when connected. alternate method involves using serial port invoke bootstrap loader. Upon reset, device continuously poll serial port character. character received specified period time, program will exit loader begin execution from external memory. This approach advantage requiring general purpose port pin. primary disadvantage that device will experience fixed delay every time reset before running user application.
EXITING BOOTLOADER
After loading software external memory loader operation desired, system will need exit loader begin execution from external program memory. ROMSIZE feature provides fast convenient this. ROMSIZE register allows software "turn off" internal program memory force program execution externally, similar pulling low. software should then execute LJMP reset vector 0000h.
ECopyright 1995 Dallas Semiconductor Corporation. Rights Reserved. important information regarding patents other intellectual property rights, please refer Dallas Semiconductor data books.
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ROMSIZE register must modified from external memory location that outside memory range internal memory. example, DS87C520 contains 16KB EPROM. instruction modify ROMSIZE register should located external memory address 4000h greater. Failure this could result code execution failure memory switched middle instruction. simplest this short routine (~16 bytes) high memory. 64KB memory space used, this could FFF0h. This offers least chance interfering with user application code. Upon completion loader routine, software will jump external memory (location FFF0h this example), modify ROMSIZE register disable internal program memory, then jump location 0000h. This simulates reset user application code. important include other dummy instruction following modification ROMSIZE register allow machine cycle memory select circuitry disable internal program memory. following routine suggested: CSEG 0FFF0h #0AAh #55h ROMSIZE, LJMP 0000h
load, verify, commands. Flash memory devices will require chip erase commands, NVRAM find fill command useful. Figure illustrates basic operation bootloader program. software begins checking signal start loader. present, device performs user- requested bootloader functions. When complete, loader stimulus detected, device will jump location FFF0h, modify ROMSIZE register disable internal EPROM, jump back restart vector. This simulates device beginning execution address 0000h following reset. sample bootloader High-Speed Microcontroller family available from Dallas Semiconductor. assembly language source file HSM_LOAD.ASM incorporates optional include files support several different memory types, including Flash NVRAM. following list some commands that supported:
Load Intel file memory Verify file against memory Erase chip (Flash only) Fill range memory with data (NVRAM only) Calculate Modify read port values Dump memory contents Intel format Exit loader
BOOTLOADER SOFTWARE
There many different features that included bootloader, which vary depending specific memory device used. general, these should include
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BOOTLOADER FLOWCHART Figure
RESET
LOADER STIMULUS ACTIVE?
INTERNAL EPROM
PERFORM MORE LOADER FUNCTIONS
EXIT LOADER?
JUMP FFF0h
EXTERNAL PROGRAM MEMEORY
MODIFY ROMSIZE REGISTER USING TIMED ACCESS
JUMP 0000h
BEGIN USER APPLICATION ADDRESS 0000h
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HARDWARE
Figure illustrates 29F010 5.0V-only Flash memory part bootloader design. Although this configuration designed compatible with software presented file HSM_LOAD.ASM, easily adapted other Flash memory NVRAM devices. Some flash memory devices such 28Fxxx series require external programming. Designs which incorporate these devices will need include voltage source. Although 29F010 128KB device, this example only uses 64KB tying address line low. This will effect Flash memory command functions
most devices designed ignore during their programming algorithms. A16, connect unused general purpose port pin. aware that port pins will default logic high state, selecting upper 64KB Flash memory. inverter used between port Flash device have select lower 64KB power-up. This will simplify code placement. command bootloader used manipulate Flash memory during loading process load both upper lower 64KB banks device. More information bank switching found Application Note Memory Expansion with High-Speed Microcontroller Family.
BOOTLOADER HARDWARE Figure
DS87C520 P1.7/INT5 LOAD 74AC373 PORT PORT 29F010
DS232A P1.2/RXD1 P1.3/TXD1 PSEN
OTHER RS-232 INTERFACE
USING NVRAM WITH BOOTLOADER
NVRAM several advantages when used bootloader design. does require complicated byte programming algorithm, making much faster program. Both data program stored same chip, reducing board space while gaining advantage data nonvolatility. NVRAMs with internal partitioning, such Dallas Semiconductor DS1630 Partitionable 256K SRAM DS1645 Partitionable 1024K SRAM, prevents accidental code corruption. Optional include modules available HSM_LOAD.ASM file support many Dallas Semiconductor NVRAM products.
ADDENDUM REVISION DEVICES
DS87C520 DS87C530 devices revision earlier incorporate errata pertaining PSEN signal that requires minor change above hardware. these devices, PSEN signal toggles regardless whether device operating from internal external program memory. This will cause conflict during writes Flash memory device. Figure illustrates temporary workaround. This configuration places restriction that Load signal P1.7 must removed before beginning operation from external memory. This minor point, most applications will program Flash memory separate step, reset device, then begin operation. This errata will corrected later revisions devices.
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BOOTLOADER HARDWARE DS87C520/DS87C530 REVISION Figure
DS87C520 P1.7/INT5 LOAD 74AC373 PORT PORT 29F010
DS232A OTHER RS-232 INTERFACE P1.2/RXD1 P1.3/TXD1 PSEN
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