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1CY 7C37 5

For new designs see CY7C375i.

1CY 7C37 5
fax id: 6130
For new designs see CY7C375i.
CY7C375
UltraLogic 128-Macrocell Flash CPLD
Features
Functional Description
The CY7C375 is a Flash erasable Complex Programmable Logic Device (CPLD) and is part of the FLASH370 family of high-density, high-speed CPLDs. Like all members of the FLASH370 family, the CY7C375 is designed to bring the ease of use and high performance of the 22V10 to high-density PLDs. The 128 macrocells in the CY7C375 are divided between eight logic blocks. Each logic block includes 16 macrocells, a 72 x 86 product term array, and an intelligent product term allocator. The logic blocks in the FLASH370 architecture are connected with an extremely fast and predictable routing resource-the Programmable Interconnect Matrix (PIM). The PIM brings flexibility, routability, speed, and a uniform delay to the interconnect.
Logic Block Diagram
CLOCK INPUTS INPUTS
2 INPUT MACROCELLS 4 16 I / Os I / O0-I / O15 LOGIC BLOCK 36 16 36 16 36 16 36 16 PIM
4 INPUT / CLOCK MACROCELLS 4 36 16 36 16 36 16 36 16 LOGIC BLOCK 16 I / Os I / O112 -I / O127
16 I / Os LOGIC BLOCK
LOGIC BLOCK 16 I / Os
I / O16-I / O31
16 I / Os LOGIC BLOCK
LOGIC BLOCK 16 I / Os
I / O96-I / O111
I / O32-I / O47
16 I / Os LOGIC BLOCK
LOGIC BLOCK 16 I / Os
I / O80-I / O95
I / O48-I / O63
I / O64-I / O79
Selection Guide
7C375-100 Maximum Propagation Delay, tPD (ns) Minimum Set-Up, tS (ns) Maximum Clock to Output, tCO (ns) Maximum Supply Current, ICC (mA) Commercial Military / Industrial 12 6 7 330 7C375-83 15 8 8 300 370 7C375-66 20 10 10 300 370 7C375L-66 20 10 10 150
UltraLogic and FLASH370 are trademarks of Cypress Semiconductor Corporation.
Cypress Semiconductor Corporation
3901 North First Street
San Jose · CA 95134 · 408-943-2600 September 1992 - Revised February 1997