designs CY7C373i. CY7C373 UltraLogic64-Macrocell Flash CPLD
|
|
|
Top Searches for this datasheet
designs CY7C373i.
CY7C373
UltraLogic64-Macrocell Flash CPLD
Features
macrocells four logic blocks pins dedicated inputs including clock pins hidden delays High speed fMAX Electrically alterable Flash technology Available 84-pin PLCC 100-pin TQFP packages compatible with CY7C374
Functional Description
CY7C373 Flash erasable Complex Programmable Logic Device (CPLD) part FLASH370family high-density, high-speed CPLDs. Like members FLASH370 family, CY7C373 designed bring ease high performance 22V10 high-density CPLDs. macrocells CY7C373 divided between four logic blocks. Each logic block includes macrocells, product term array, intelligent product term allocator. logic blocks FLASH370 architecture connected with extremely fast predictable routing resource-the Programmable Interconnect Matrix (PIM). brings flexibility, routability, speed, uniform delay interconnect.
Logic Block Diagram
CLOCK INPUTS INPUTS
INPUT MACROCELLS I/Os I/O0-I/O15
INPUT/CLOCK MACROCELLS I/Os I/O48-I/O63
LOGIC BLOCK
LOGIC BLOCK
I/Os I/O16 -I/O31
LOGIC BLOCK
LOGIC BLOCK
I/Os I/O32-I/O47
7C373-1
Selection Guide
7C373-125 Maximum Propagation Delay (ns) Minimum Set-up, (ns) Maximum Clock Output, (ns) Maximum Supply Current, (mA) Commercial Industrial 7C373-100 7C373-83 7C373-66 7C373L-66
Shaded area contains preliminary information.
UltraLogic FLASH370 trademarks Cypress Semiconductor Corporation.
Cypress Semiconductor Corporation
3901 North First Street
Jose
95134 408-943-2600 June 1992 Revised February 1997
Other recent searches
QSL11 - QSL11 QSL11 Datasheet
NM1LUR12D17 - NM1LUR12D17 NM1LUR12D17 Datasheet
NGSF3443V - NGSF3443V NGSF3443V Datasheet
NGA-286 - NGA-286 NGA-286 Datasheet
MMG1001NT1 - MMG1001NT1 MMG1001NT1 Datasheet
2SC4304 - 2SC4304 2SC4304 Datasheet
Privacy Policy | Disclaimer
© 2012 Datasheet Archive
