Laser Mouse Bundles Avago Technologies' ADNB-6001 ADNB-6002 laser

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Laser Mouse Bundles Avago Technologies' ADNB-6001 ADNB-6002 laser

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ADNB-6001 ADNB-6002
Laser Mouse Bundles
Avago Technologies' ADNB-6001 ADNB-6002 laser mouse bundles world's first laser-illuminated navigation systems corded applications. Enabled with Avago Technologies' LaserStream Technology, mouse operate many surfaces that prove difficult traditional LED-based optical navigation. high-performance architecture capable sensing highspeed mouse motion with velocities inches second accelerations ADNS-6000 sensor along with ADNS-6120 ADNS-6130-001 lens, ADNS-6230-001 clip ADNVADNB-6001 ADNB-6002 laser mouse bundles include: Bundle Part Number ADNB-6001 Part Number ADNS-6000 ADNV-6330 ADNS-6120 ADNS-6230-001 Description Laser Mouse Sensor Single-Mode Vertical-Cavity Surface Emitting Laser (VCSEL) Laser Mouse Round Lens Laser Mouse VCSEL Assembly Clip 6330 laser diode form complete compact laser mouse tracking system. There moving parts, which means high reliability less maintenance user. addition, precision optical alignment required, facilitating high volume assembly. This document will begin with some general information usage guidelines bundle set, followed individual detailed information ADNS-6000 laser mouse sensor, ADNV-6330 VCSEL, ADNS-6120 ADNS-6130-001 lens ADNS-6230-001 clip.
Bundle Part Number ADNB-6002
Part Number ADNS-6000 ADNV-6330 ADNS-6130-001 ADNS-6230-001
Description Laser Mouse Sensor Single-Mode Vertical-Cavity Surface Emitting Laser (VCSEL) Laser Mouse Trim Lens Laser Mouse VCSEL Assembly Clip
Overview ADNB-6001 Laser Mouse Assembly
Figure Assembly drawing ADNB-6001 (top, front cross-sectional view)
Assembly Drawing ADNB-6001, PCBs Base Plate
Customer Supplied VCSEL ADNS-6000 (sensor)
ADNV-6330 (VCSEL)
Customer Supplied ADNS-6230-001 (clip) ADNS-6120 (lens)*
Customer Supplied Base Plate With Recommended Features IGES Drawing
ADNS-6130-001 trim lens
Figure Exploded view drawing
Shown with ADNS-6120 Laser Mouse Lens, ADNS-6230001 VCSEL Assembly Clip ADNV-6330 VCSEL. components interlock they mounted onto defined features base plate. ADNS-6000 laser mouse sensor designed mounting through hole PCB, looking down. There aperture stop features package that align lens. ADNV-6330 VCSEL provides laser diode with single longitudinal single transverse mode. particularly suited lower power consumption highly coherent replacement LEDs. also provides wider operation range while still remaining within single-mode, reliable operating conditions. ADNS-6120 ADNS-6130-001 Laser Mouse Lens designed with ADNS-6000 sensor illumination subsystem provided VCSEL assembly clip
VCSEL. Together with VCSEL, ADNS-6120 ADNS-6130-001 lens provides directed illumination optical imaging necessary proper operation Laser Mouse Sensor. ADNS-6120 ADNS-6130-001 precision molded optical component should handled with care avoid scratching optical surfaces. ADNS-6120 large round flange provide long creepage path events that occur opening base plate. ADNS-6230-001 VCSEL Assembly Clip designed provide mechanical coupling ADNV-6330 VCSEL ADNS-6120 ADNS-6130-001 lens. This coupling essential achieve proper illumination alignment required sensor operate wide variety surfaces. Avago Technologies provides IGES file drawing describing base plate molding features lens alignment.
Assembly Recommendation
Insert sensor other electrical components into application (main board VCSEL board). Wave solder entire assembly no-wash solder process utilizing solder fixture. solder fixture needed protect sensor during solder process. also sets correct sensor-to -PCB distance, lead shoulders normally rest surface. fixture should designed expose sensor leads solder while shielding optical aperture from direct solder contact. Place lens onto base plate. Remove protective kapton tape from optical aperture sensor. Care must taken keep contaminants from entering aperture. Insert assembly over lens onto base plate. sensor aperture ring should self-align lens. optical position reference base plate lens. Note that motion button presses must minimized maintain optical alignment. Remove protective kapton tape from VCSEL. Insert VCSEL assembly into lens. Slide clip place until latches. This locks VCSEL lens together. Tune laser output power from VCSEL meet Safe Class Standard detailed LASER Power Adjustment Procedure. Install mouse case. There must feature case other area) press down onto sensor ensure sensor lens interlocked correct vertical height.
Figure Recommended mechanical cutouts spacing
Design considerations improving Performance
improved electrostatic discharge performance, typical creepage clearance distance shown table below. Assumption: base plate construction Avago Technologies supplied IGES file ADNS-6120 round lens. Typical Distance Creepage Clearance Millimeters 12.0
VCSEL
lens flange sealed (i.e. glued) base plate. Note that lens material polycarbonate therefore, cyanoacrylate based adhesives other adhesives that damage lens should used.
SENSOR LENS CLIP BASE PLATE VCSEL
Figure Cross section assembly
KBit EEPROM (optional)
100K
+3.3V
Buttons left middle right
3.3V Regulator LP2950ACZ-3.3
SCLK
Vout
25LC160A
microcontroller
VDD3
VDD3
470pF
P1.0 P1.1 P1.2 P1.4 P1.5 RBIN
SCLK MISO MOSI RESET REFB
P0.7 P0.6
2N3906
Port VBUS 1.30K
ADNS-6000
P1.3
CYPRESS CY7C63743-PXC
P0.5 P0.4 P0.2
REFC
2.7K
P1.6 P1.7
VCSEL
P0.3
LASER_NEN XY_LASER
D+/SCLK
D-/SDAT
OSC_IN GUARD OSC_OUT
Murata CSALS24MOX53-B0
XTALOUT Vreg XTALIN/P2.1
P0.0
P0.1
Outputs configured open drain
ALPS EC10E
Rbin Selected match laser
Optional Ground Plane
Scroll wheel encoder
Figure Schematic Diagram 3-Button Scroll Wheel PS/2 Mouse
Notes (for figure Caps pins MUST have trace lengths LESS than each side. Pins caps MUST GND. used, should connected reduce potential emissions. caps must ceramic. Caps should have less than self inductance. Caps should have less than ESR. pins should connected traces. Surface mount parts recommended. Care must taken when interfacing microcontroller ADNS-6000. Serial port inputs sensor should connected open-drain outputs from microcontroller active drive level shifter. RESET should connected microcontroller outputs through resistor divider other level shifting technique. VDD3 should have impedance connections power supply. Because RBIN sets XY_LASER current, following board layout practices should followed reduce chance uncontrolled laser drive current caused from leakage path between RBIN ground. hypothetical source such leakage path board contamination liquid, such soft drink, being deposited printed circuit board. RBIN resistor should located close sensor traces between resistor sensor should short. solder exposed conductors connected should surrounded guard trace connected VDD3 devoid solder mask. solder pad, traces connected RBIN resistor should covered with conformal coating. RBIN resistor should thru-hole style increase distance between terminals. This does apply conformal coating used.
Safety
ADNS-6000 associated components schematic Figure intended comply with Class Safety Requirements 60825-1. Avago Technologies suggests that manufacturers perform testing verify safety each mouse. also recommended review possible single fault mechanisms beyond those described below section "Single Fault Detection". Under normal conditions, ADNS-6000 generates drive current laser diode (ADNV-6330). order stay below Class power requirements, resistor Rbin must least high value table Figure based number laser diode LP_CFG0 LP_CFG1 must programmed appropriate values. Avago Technologies recommends using exact Rbin value specified table ensure sufficient laser power navigation. system comprised ADNS-6000 ADNV-6330 designed maintain output beam power within Class requirements over component manufacturing tolerances recommended temperature range when adjusted procedure below when implemented shown recommended application circuit Figure more information, please refer Avago Technologies ADNB6001, ADNB-6002, ADNB-6011 ADNB-6012 Laser Mouse Safety Calculation Application Note 5088.
LASER Power Adjustment Procedure
ambient temperature should 5°C. VDD3 permanent value. Ensure that laser drive 100% duty cycle. Program LP_CFG0 LP_CFG1 registers achieve output power close 506uW possible without exceeding Good engineering practices should used guarantee performance, reliability safety product design. Avago Technologies additional information detail, such firmware practices, layout suggestions, manufacturing procedures specifications that could provided.
LASER Drive Mode
LASER modes operation: Shutter. mode, LASER times chip powered except when power down mode pin. shutter mode LASER only during portion frame that light required. LASER mode LASER_MODE Configuration_bits register. optimum product lifetime, Avago Technologies recommends default Shutter mode setting (except calibration test).
Laser Table
Number Rbin Resistor Value (kohm) 18.7 12.7 Match_Bit (Reg 0x2C, Bit7)
Laser Output Power
Parameter Laser output power Symbol Minimum Maximum Units Notes conditions above
LASER Output Power
laser beam output power measured navigation surface plane specified below. following conditions apply: system adjusted according above procedure. system operated within recommended operating temperature range. VDD3 value greater than 50mV above value time adjustment. allowance optical power meter accuracy assumed.
Single Fault Detection
ADNS-6000 able detect short circuit, fault, condition RBIN XY_LASER pins, which could lead excessive laser power output. resistance path ground either these pins will trigger fault detection circuit, which will turn laser drive current source LASER_NEN output high. When used combination with external components shown block diagram below, system will prevent excess laser power single short ground RBIN XY_LASER shutting laser. Refer board layout notes recommendations reduce chance high resistance paths ground existing board contamination. addition continuous fault detection described above, additional test executed automatically whenever LP_CFG0 register written This test will check short ground XY_LASER pin, short VDD3 XY_LASER pin, will test fault detection circuit XY_LASER pin.
Disabling LASER
LASER_NEN connected base transistor which when connects VDD3 LASER. normal operation, LASER_NEN low. case fault condition (ground XY_LASER RBIN), LASER_NEN goes high turn transistor disconnect VDD3 from LASER.
VDD3 Microcontroller ADNS-6000 LASER DRIVER fault control block LASER voltage sense XY_LASER
LASER_NEN VDD3
RESET
current
RBIN
Figure Single Fault Detection Eye-safety Feature Block Diagram
ADNS-6000
Laser Mouse Sensor
Theory Operation
ADNS-6000 based LaserStream Technology, which measures changes position optically acquiring sequential images (frames) mathematically determining direction magnitude movement. ADNS-6000 contains Image Acquisition System (IAS), Digital Signal Processor (DSP), four wire serial port. acquires microscopic surface images lens illumination system. These images processed determine direction distance motion. calculates relative displacement values. external microcontroller reads information from sensor serial port. microcontroller then translates data into signals before sending them host game console.
Applications
Mice game consoles computer games Mice desktop PC's, Workstations, portable PC's Trackballs Integrated input devices
Features
High speed motion detection LaserStream architecture greatly improved optical navigation technology Programmable frame rate over frames second SmartSpeed self-adjusting frame rate optimum performance Serial port burst mode fast data transfer selectable resolution Single volt power supply Four-wire serial port along with Power Down, Reset pins Laser fault detect circuitry on-chip Safety Compliance
Pinout
Name MISO SCLK MOSI RESET OSC_OUT GUARD OSC_IN REFC REFB RBIN XY_LASER VDD3 VDD3 LASER_NEN Description Chip select (active input) Serial data output (Master In/Slave Out) Serial clock input Serial data input (Master Out/Slave Connection Reset input Power down (active input) Oscillator output Oscillator guard (optional) Oscillator input Reference capacitor Reference capacitor XY_LASER current LASER current output Connection Supply voltage Ground Supply voltage Ground Laser enable (active low)
VIEW
MISO SCLK MOSI RESET OSC_OUT GUARD OSC_IN REFC REFB RBIN XY_LASER VDD3 VDD3 LASER_NEN
A6000 XYYWWZ
PINOUT
Figure Package outline drawing (top view)
CAUTION: advised that normal static precautions taken handling assembly this component prevent damage and/or degradation which induced
SECTION Notes. Dimensions millimeters (inches) Dimenstional tolerance: ±0.1 Coplanarity leads: Lead pitch tolerance: ±0.15 Cummulative pitch tolerance. ±0.15 Angular tolerance: ±3.0° Maximum flash +0.2 Chamfer (25° taper side lead
Figure Package outline drawing
External PROM
ADNS-6000 must operate from externally loaded programming. This architecture enables immediate adoption features improved performance algorithms. external program supplied Agilent file, which burned into programmable device. example application shown this document uses EEPROM store load external program memory. micro-controller with sufficient memory used instead. power-up reset, ADNS-6000 program downloaded into volatile memory using burstmode procedure described Synchronous Serial Port section. program size 1986 bits.
Regulatory Requirements
Passes worldwide analogous emission limits when assembled into mouse with shielded cable following Agilent recommendations. Passes IEC-1000-3 radiated susceptibility level when assembled into mouse with shielded cable following Avago Technologies' recommendations. Passes EN61000-/IEC801- tests when assembled into mouse with shielded cable following Avago Technologies' recommendations. flammability level V-0.
OSCILLATOR
Serial Port
OSC_IN RESONATOR OSC_OUT REFB
VOLTAGE REGULATOR POWER CONTROL
SCLK MOSI MISO
IMAGE PROCESSOR
REFC
REFERENCE VOLTAGE FILTER NODE
POWER
CTRL RESET
RBIN
LASER DRIVER
XY_LASER LASER_NEN
Figure Block diagram ADNS-6000 optical mouse sensor
VCSEL Sensor
VCSEL VCSEL Clip
Sensor
2.40 0.094
Lens
Surface
Figure Distance from lens reference plane surface
Absolute Maximum Ratings
Parameter Storage Temperature Operating Temperature Lead Solder Temp Supply Voltage Input Voltage Output current Input Current IOUT -0.5 VDD3 -0.5 Symbol Minimum Maximum VDD3+0.5 Units
Notes
seconds, 1.6mm below seating plane.
pins, human body model Method 3015 NPD, NCS, MOSI, SCLK, RESET, OSC_IN, OSC_OUT, REFC, RBIN MISO, LASER_NEN XY_LASER
Recommended Operating Conditions
Parameter Operating Temperature Power supply voltage Power supply rise time Supply noise (Sinusoidal) Oscillator Frequency Serial Port Clock Frequency Symbol VDD3B fCLK fSCLK Minimum 3.10 3.30 Typical Maximum 3.60 Units Volts 3.0V 10kHz- 300KHZ 300KHz-50MHz ceramic resonator Active drive, duty cycle Open drain drive with pull-ups load Notes
Resonator Impedance Distance from lens reference plane surface Speed Acceleration Frame Rate Resistor value LASER Drive Current Voltage XY_LASER
XRES 2.18
2.62
Results minimum DOF, Figure
Rbin Vxy_laser Table Figure
in/sec Frames/s kOhms Frame_Period register section ADNV-6330 VCSEL
VDD3
Electrical Specifications
Electrical Characteristics over recommended operating conditions. Typical values VDD3=3.3V, fclk=2MHz.
Parameter Symbol tPU-RESET TIN-RST Min. Typical Max. Units Notes RESET Data delay after RESET Input delay after reset Power Down From 3.0V RESET sampled From RESET falling edge valid motion data shutter bound 20k. From RESET falling edge inputs active (NPD, MOSI, NCS, SCLK) From falling edge initiate power down cycle 500fps (tpd frame period 100ms From rising edge valid motion data shutter bound 20k. assumes surface change while From rising edge registers contain data from images (See Figure 11).
Wake from
tPUPD tCOMPUTE tPW-RESET tr-MISO tf-MISO tDLY-MISO thold-MISO thold-MOSI tsetup-MOSI tSWW tSWR tSRW tSRR tSRAD
tCOMPUTE
Data delay after RESET pulse width MISO rise time MISO fall time MISO delay after SCLK MISO hold time MOSI hold time MOSI setup time time between write commands time between write read commands time between read subsequent commands read address-data delay
50pF 50pF From SCLK falling edge MISO data valid, load conditions Data held until next falling SCLK edge Amount time data valid after SCLK rising edge From data valid SCLK rising edge From rising SCLK last first data byte, rising SCLK last second data byte. From rising SCLK last first data byte, rising SCLK last second address byte. From rising SCLK last first data byte, falling SCLK first second address byte. From rising SCLK last address byte, falling SCLK first data being read. registers except Motion Motion_Burst From rising SCLK last address byte, falling SCLK first data being read. Applies 0x02 Motion, 0x50 Motion_Burst, registers From falling edge first SCLK rising edge From last SCLK falling edge rising edge, valid MISO data transfer From rising edge MISO high-Z state (See Figure
motion read address-data delay SCLK active SCLK inactive MISO high-Z PROM download frame capture byte-to-byte delay burst mode exit Transient Supply Current Input Capacitance
tSRAD-MOT tNCS-SCLK tSCLK-NCS tNCS-MISO tLOAD
tBEXIT IDDT
1-22
Time must held high exit burst mode supply current during VDD3 ramp from OSC_IN, OSC_OUT
Electrical Specifications
Electrical Characteristics over recommended operating conditions. Typical values VDD3=3.3 Parameter Symbol Minimum Typical Maximum Units Notes Supply Current Power Down Supply Current Input Voltage Input High Voltage Input hysteresis Input current, pullup disabled Input current, CMOS inputs Output current, pulled-up inputs XY_LASER Current IDD_AVG IDDPD average fps. load XY_LASER, MISO. NPD=GND; SCLK, MOSI, NCS=GND VDD3; RESET=0V SCLK, MOSI, NPD, NCS, RESET SCLK, MOSI, NPD, NCS, RESET SCLK, MOSI, NPD, NCS, RESET Vin=0.8*VDD3, SCLK, MOSI, NPD, RESET, Vin=0.8*VDD3 Vin=0.2V, SCLK, MOSI, NCS; Extended_Config register Vxy_laser LP_CFG0 0x00, LP_CFG1 0xFF Rbin Ohms, VXY_LASER <0.2V Iout=2mA, MISO Iout= 1mA, LASER_NEN Iout=-2mA, MISO Iout= -0.5 LASER_NEN Rbin open
VI_HYS IIH_DPU IOH_PU VDD3
ILAS
16/Rbin
XY_LASER Current (fault mode) Output Voltage, MISO, LASER_NEN Output High Voltage, MISO, LASER_NEN XY_LASER Current Rbin)
ILAS 0.8*VDD3
ILAS_NRB
Reset Count Oscillator Start LASER CURRENT (shutter mode) SCLK Optional transactions with image data Frame Frame Frame
Frame
Frame
"Motion" motion detected. First read
tCOMPUTE 590us Frame Periods
Figure Rising Edge Timing Detail
Typical Performance Characteristics
1000 Resolution (counts/inch) Distance from Lens Reference Plane Surface, (mm) Recommended Operating Region Typical Resolution Black Formica White Melamine Bookshelf Manila Photo Paper
Figure Mean Resolution 800cpi
Typical Path Deviation Largest Single Perpendicular Deviation From Straight Line Degrees Path Length inches; Speed Resolution Black Formica White Melamine Bookshelf Manila Photo Paper
Maximun Distance (mouse count)
Distance From Lens Reference Plane Navigation Surface (mm) Relationship mouse count distance (mouse count) (cpi) Deviation mouse count 7/800 0.00875 inch 0.009 inch; where
Figure Average Error Distance 800cpi (mm)
Average Supply Current Frame Rate 110% 100% Relative Current 2000 4000 Frame Rate (Hz) 6000 8000 100%
Figure Average Supply Current Frame Rate
Relative Responsivity ADNS-6000
Relative responsivity
Wavelength (nm) 1000
Figure Relative Responsivity
Synchronous Serial Port
synchronous serial port used read parameters ADNS-6000, read motion information. serial port also used load PROM data into ADNS-6000. port four wire port. host micro-controller always initiates communication; ADNS-6000 never initiates data transfers. serial port cannot activated while chip power down mode (NPD low) reset (RESET high). SCLK, MOSI, driven directly 3.3V output from micro-controller, they driven open drain configuration enabling on-chip pull-up current sources. open drain drive allows micro-controller without level shifting components. port pins shared with other slave devices. When high, inputs ignored output tri-stated. lines that comprise port are: SCLK: MOSI: MISO: NCS: Clock input. always generated master (the micro-controller.) Input data. (Master Out/Slave Output data. (Master In/Slave Out) Chip select input (active low). needs activate serial port; otherwise, MISO will high MOSI SCLK will ignored. also used reset serial port case error.
Chip Select Operation
serial port activated after goes low. raised during transaction, entire transaction aborted serial port will reset. This true transactions including PROM download. After transaction aborted, normal address-to-data transaction-to-transaction delay still required before beginning next transaction. improve communication reliability, serial transactions should framed NCS. other words, port should remain enabled during periods non-use because EFT/B events could interpreted serial communication chip into unknown state. addition, must raised after each burst-mode transaction complete terminate burst-mode. port available further until burst-mode terminated.
Write Operation
Write operation, defined data going from microcontroller ADNS-6000, always initiated micro-controller consists bytes. first byte contains address (seven bits) indicate data direction. second byte contains data. ADNS-6000 reads MOSI rising edges SCLK.
Read Operation
read operation, defined data going from ADNS6000 micro-controller, always initiated micro-controller consists bytes. first byte contains address, sent micro-controller over MOSI, indicate data direction. second byte contains data driven ADNS-6000 over MISO. sensor outputs MISO bits falling edges SCLK samples MOSI bits every rising edge SCLK. NOTE: minimum high state SCLK also minimum MISO data hold time ADNS-6000. Since falling edge SCLK actually start next read write command, ADNS-6000 will hold state data MISO until falling edge SCLK.
SCLK
MOSI Hold,MOSI tsetup MOSI
Figure MOSI Setup Hold Time
SCLK MOSI MISO
MOSI Driven Micro
Figure Write Operation
SCLK Cycle SCLK MOSI MISO
Figure Read Operation
tSRAD delay
Required timing between Read Write Commands (tsxx)
There minimum timing requirements between read write commands serial port.
SCLK DLY-MISO MISO HOLD-MISO
Burst Mode Operation
Burst mode special serial port operation mode which used reduce serial transaction time three predefined operations: motion read PROM download frame capture. speed improvement achieved continuous data clocking from multiple registers without need specify register address, requiring normal delay period between data bytes.
Figure MISO Delay Hold Time
rising edge SCLK last data second write command occurs before microsecond required delay, then first write command complete correctly. rising edge SCLK last address read command occurs before microsecond required delay, write command complete correctly. falling edge SCLK first address either read write command must least after last SCLK rising edge last data previous read operation. addition, during read operation SCLK should delayed after last address data ensure that ADNS-6000 time prepare requested data.
tSWW
SCLK
Address Data Address Data
Write Operation
Write Operation
Figure Timing between write commands
SCLK
Address Data Address
Write Operation
Next Read Operation
Figure Timing between write read commands
non-motion read register 0x02 tSRW tSRR >250
SRAD SRAD
SCLK Address Read Operation Data Address Next Read Write Operation
Figure Timing between read either write subsequent read commands
Motion Read
Reading Motion_Burst register activates this mode. ADNS-6000 will respond with contents Motion, Delta_X, Delta_Y, SQUAL, Shutter_Upper, Shutter_Lower, Maximum_Pixel registers that order. After sending register address, microcontroller must wait tSRAD-MOT then begin reading data. data bits read with delay between bytes driving SCLK normal rate. data latched into output buffer after last address received. After burst transmission complete, micro-controller must raise line least tBEXIT terminate burst mode. serial port available until reset with NCS, even second burst After first data byte complete, PROM microcontroller must write subsequent bytes presenting data MOSI line driving SCLK normal rate. delay least tLOAD must exist between data bytes shown. After download complete, micro-controller must raise line least tBEXIT terminate burst mode. serial port available until reset with NCS, even second burst transmission. Avago Technologies recommends reading SROM_ID register verify that download successful. addition, self-test executed, which performs SROM contents reports results register. test initiated writing particular value SROM_Enable register; result placed Data_Out register. those register descriptions more details. Avago Technologies provides data file download; file size 1986 data bytes. chip will ignore additional bytes written SROM_Load register after SROM file.
PROM Download
This function used load Avago Technologiessupplied firmware file contents into ADNS-6000. firmware file ASCII text file with each 2-character byte single line. following steps activate this mode: Perform hardware reset toggling RESET Write 0x1D register (SROM_Enable register) Wait least frame period Write 0x18 register (SROM_Enable register) Begin burst mode write data file register 0x60 (SROM_Load register)
SRAD-MOT
SCLK
Motion_Burst Register Address Read First Byte Read Second Byte Read Third Byte
First Read Operation
Figure Motion burst timing.
exit burst mode tBEXIT SROM_Enable write MOSI SROM_Enable write address data SROM_Load write address byte enter burst mode byte byte 1985 address
frame
period
SCLK tNCS-SCLK >120ns
tLOAD
tLOAD
soonest read SROM_ID
Figure PROM Download Burst Mode
Frame Capture
This fast download full array pixel values from single frame. This mode disables navigation overwrites downloaded firmware. hardware reset required restore navigation, firmware must reloaded. trigger capture, write Frame_Capture register. next available complete frames (1536 values) will stored memory. data retrieved reading Pixel_Burst register once using normal read method, after which remaining bytes clocked driving SCLK normal rate. byte time must least tLOAD. Pixel_Burst register read before data ready, will return zeros. read single frame, read total bytes. next bytes will approximately next frame. first pixel first frame (1st read) start-of-frame marker. first pixel second partial frame (901st read) will also have other bytes have zero. bytes Pixel_Burst register read past data (1537 reads data returned will zeros. Pixel data lower bits each byte. After download complete, micro-controller must raise line least tBEXIT terminate burst mode. read aborted time raising NCS. Alternatively, frame data also read byte time from Frame_Capture register. register description more information.
exit burst mode tBEXIT frame capture write MOSI address data pixel dump read address enter burst mode SCLK tNCS-SCLK >120ns MISO tCAPTURE tSRAD tLOAD
frame capture address soonest begin again
tLOAD
P899 note
Notes: bytes. bytes except pixel both frames which frame marker. Reading beyond pixel will return first pixel second partial frame. tCAPTURE frame periods. This figure illustrates reading single complete frame pixels. additional pixels from next frame available.
Figure Frame capture burst mode timing
pixel output order related surface shown below.
Cable Xray View Mouse
Positive
Positive
A6000
expanded view surface viewed through lens last output
etc.
first output
Figure Pixel address (surface referenced)
Error detection recovery
ADNS-6000 micro-controller might synchronization events, power supply droops micro-controller firmware flaws. such case, micro-controller should pulse high least ADNS-6000 will reset serial port (but control registers) will prepared beginning transmission after normal transaction delay. Invalid addresses: Writing invalid address will have effect. Reading from invalid address will return zeros. Termination transmission micro-controller sometimes required (for example, suspend interrupt during read operation). accomplish this micro-controller should raise NCS. ADNS-6000 will write register will reset serial port (but control registers) prepared beginning future transmissions after goes low. normal delays between reads writes (tSWW, tswr, tSRAD, tSRAD-mot) still required after aborted transmissions. micro-controller verify success write operations issuing read command same address comparing written data read data. micro-controller verify synchronization serial port periodically reading product inverse product registers. microcontroller read SROM_ID register verify that sensor running downloaded PROM code. similar noise events cause sensor revert native execution. this should happen, pulse RESET reload SROM code.
Notes Power-up serial port Reset Circuit
ADNS-6000 does perform internal power self-reset; reset must raised lowered reset chip. This should done every time power applied. During power-up there will period time after power supply high before clocks available. table below shows state various pins during power-up reset when RESET driven high micro-controller. pullups State Signal Pins After Valid Before Reset undefined hi-Z control functional driven hi-Z (per NCS) undefined undefined undefined functional During Reset hi-Z control functional driven hi-Z (per NCS) ignored ignored hi-Z high (externally driven) ignored high (off) After Reset (default) functional
MISO
hi-Z (per NCS) functional functional functional functional
SCLK MOSI XY_LASER RESET
LASER_NEN
undefined undefined
functional functional
Power Down Circuit
following table lists states during power down. chip into power down (PD) mode lowering input. When mode, oscillator stopped register contents retained. achieve lowest current state, inputs must held externally within 200mV rail, either ground VDD3. chip outputs driven hi-Z during prevent current consumption external load.
State Signal Pins During Power Down hi-Z control functional hi-Z (per NCS) ignored ignored high (off functional (driven externally) VDD3 high high (off After wake from pre-PD state functional pre-PD state hi-Z functional functional functional functional functional
pullups MISO SCLK MOSI XY_LASER RESET
REFC OSC_IN OSC_OUT LASER_NEN
REFC OSC_IN OSC_OUT functional
Registers
ADNS-6000 registers accessible serial port. registers used read motion data status well device configuration. Address Register Read/Write Default Value
0x00 0x01 0x02 0x03 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e 0x1f 0x20-0x2b 0x2c 0x2d 0x2e-0x3c 0x3d 0x3e 0x3f 0x50 0x60 Product_ID Revision_ID Motion Delta_X Delta_Y SQUAL Pixel_Sum Maximum_Pixel Reserved Reserved Configuration_bits Extended_Config Data_Out_Lower Data_Out_Upper Shutter_Lower Shutter_Upper Frame_Period_Lower Frame_Period_Upper Motion_Clear Frame_Capture SROM_Enable Reserved Configuration Reserved Reserved Frame_Period_Max_Bound Lower Frame_Period_Max_Bound_Upper Frame_Period_Min_Bound_Lower Frame_Period_Min_Bound_Upper Shutter_Max_Bound_Lower Shutter_Max_Bound_Upper SROM_ID Reserved LP_CFG0 LP_CFG1 Reserved Observation Reserved Inverse Product Pixel_Burst Motion_Burst SROM_Load 0xE3 0x00 0x00 0x00 0x7F 0x80 0x90 0x65 0x7E 0x0E 0x20 Version dependent 0x08 0x85 0x00 0x00 0x00 0x1C 0x20 0x20 0x00 0x00 0x00 0x00 0x00
Product_ID Access: Read Field PID7 PID6
Address: 0x00 Default Value: 0x1C PID5 PID3 PID2 PID1 PID0
Data Type: 8-Bit unsigned integer USAGE: This register contains unique identification assigned ADNS-6000. value this register does change; used verify that serial communications link functional. Revision_ID Access: Read Field RID7 RID6 Address: 0x01 Default Value: 0x20 RID5 RID3 RID2 RID1 RID0
Data Type: 8-Bit unsigned integer. USAGE: This register contains revision. subject change when versions released. NOTE: downloaded SROM firmware revision separate value available SROM_ID register.
Motion Access: Read Field Reserved
Address: 0x02 Default Value: 0x00 LP_Valid Reserved Reserved Fault
Data Type: field. USAGE: Register 0x02 allows user determine motion occurred since last time read. then user should read registers 0x03 accumulated motion. also tells motion buffers have overflowed, fault detected, current resolution setting. Field Name Description Motion since last report motion Motion occurred, data ready reading Delta_X Delta_Y registers This indicator complementary value contained registers 0x2C 0x2D. register 0x2C 0x2D have complementary values register 0x2C 0x2D contain complementary values Motion overflow, and/or buffer overflowed since last report overflow overflow occurred Indicates that RBIN and/or XY_LASER shorted GND. fault detected fault detected Resolution counts inch (cpi). Resolution values approximate.
LP_Valid
Fault
Notes Motion: Reading this register freezes Delta_X Delta_Y register values. Read this register before reading Delta_X Delta_Y registers. Delta_X Delta_Y read before motion register read second time, data Delta_X Delta_Y will lost. Avago Technologies RECOMMENDS that registers 0x02, 0x03 read sequentially. Motion burst mode also. Internal buffers accumulate more than eight bits motion either internal buffers overflows, then absolute path data lost set. This cleared once some motion been read from Delta_X Delta_Y registers, buffers full scale. Since more data present buffers, cycle reading Motion, Delta_X Delta_Y registers should repeated until motion (MOT) cleared. Until cleared, either Delta_X Delta_Y registers will read either positive negative full scale. motion register been read long time, take read cycles clear buffers, cpi, cycles. Alternatively, writing Motion_Clear register (register 0x12) will clear stored motion once.
Delta_X Access: Read Field
Address: 0x03 Default Value: 0x00
Data Type: Eight complement number. USAGE: movement counts since last report. Absolute value determined resolution. Reading clears register.
Motion -128 -127 +126 +127
Delta_X
Delta_Y Access: Read Field
Address: Default Value: 0x00
Data Type: Eight complement number. USAGE: movement counts since last report. Absolute value determined resolution. Reading clears register.
Motion -128 -127 +126 +127
Delta_Y
SQUAL Access: Read Field
Address: 0x05 Default Value: 0x00
Data Type: Upper bits 10-bit unsigned integer. USAGE: SQUAL (Surface Quality) measure number valid features visible sensor current frame. following formula find total number valid features. Number features SQUAL register value maximum SQUAL register value 169. Since small changes current frame result changes SQUAL, variations SQUAL when looking surface expected. graph below shows sequentially acquired SQUAL values, while sensor moved slowly over white paper. SQUAL nearly equal zero there surface below sensor. SQUAL remains fairly high throughout Z-height range.
SQUAL Value (White Paper) Z=0mm, Circle@7.5" diameter, Speed-6ips
SQUAL Value (counts)
Counts
Figure Squal Values 800cpi (White Paper)
Mean SQUAL (White Paper) SQUAL Vaalue (counts) -0.8 -0.6 -0.4 -0.2 Distance Lens Reference Plane Surface, (mm) 800dpi, Circle@7.5" diameter, Speed-6ips Avg-3sigma Avg+3sigma
Figure Mean squal (White Paper)
Pixel_Sum Access: Read Field
Address: 0x06 Default Value: 0x00
Data Type: High bits unsigned 16-bit integer. USAGE: This register used find average pixel value. reports upper byte 16-bit counter which sums pixels current frame. described full divided 256. find average pixel value, following formula: Average Pixel Register Value Register Value/3.51 maximum register value 900/256 truncated integer). minimum pixel value change every frame.
Maximum_Pixel Access: Read Field
Address: 0x07 Default Value: 0x00
Data Type: number. USAGE: Maximum Pixel value current frame. Minimum value maximum value maximum pixel value vary with every frame. Reserved Reserved Address: 0x08 Address: 0x09
Configuration_bits Access: Read/Write Field LASER_ MODE
Address: 0x0a Default Value: Test Reserved Reserved Reserved
Data Type: field USAGE: Register 0x0a allows user change configuration sensor. Shown below bits, their default values, optional values. Field Name LASER_MODE Description Must always zero LASER Shutter Mode Shutter mode (LASER always Shutter mode (LASER only when illumination required) System Tests tests perform system tests, output Data_Out_Upper Data_Out_Lower registers. NOTE: test will fail SROM loaded. Perform hardware reset before executing this test. Reload SROM after test completed. NOTE: test will fail laser fault condition exists. NOTE: Since part system test test, SROM will overwritten with default values when test done. configuration changes from default needed operation, make changes AFTER system test run. system test takes 200ms (@2MHz) complete. NOTE: access Synchronous Serial Port during system test. resolution counts inch. Resolution values approximate. Must always
Test
Extended_Config Access: Read/Write Field Busy Reserved
Address: 0x0b Default Value: 0x08 Reserved Reserved Serial_ NAGC Fixed_FR
Data Type: field USAGE: Register 0x0b allows user change configuration sensor. Shown below bits, their default values, optional values. Field Name Busy Description Read-only bit. Indicates safe write more following registers: Frame_ Period_Max_Bound_Upper Frame_Period_Max_Bound_Lower Frame_Period_Min_ Bound_Upper Frame_Period_Min_Bound_Lower Shutter_Max_Bound_Upper Shutter_Max_Bound_Lower After writing register, least frames must pass before writing again above registers. This used lieu timer since actual frame rate known when running auto mode. writing registers allowed write registers Must always Disable serial port pull-up current sources SCLK, MOSI current sources yes, current sources Disable AGC. Shutter will value Shutter_Maximum_Bound registers. active yes, disabled Fixed frame rate (disable automatic frame rate control). When this set, frame rate will determined value Frame_Period_Maximum_Bound registers. automatic frame rate fixed frame rate
Serial_NPU
NAGC
Fixed_FR
Data_Out_Lower Access: Read Field
Address: 0x0c Default Value: Undefined
Data_Out_Upper Access: Read Field DO15
Address: 0x0d Default Value: Undefined DO13 DO12 DO11 DO10
Data Type: Sixteen word USAGE: Data these registers come from system self test SROM test. data read either order. Data_Out_Upper System test results: SROM Test Result: 0xA9 0xBE Data_Out_Lower 0xD5 0xEF
System Test: This test initiated Configuration_Bits register. performs several tests verify that hardware functioning correctly. Perform hardware reset just prior running test. SROM contents register settings will lost. SROM Content: Performs SROM contents. test initiated writing particular value SROM_ Enable register.
Shutter_Lower Access: Read Field
Address: 0x0e Default Value: 0x85 Address: 0x0f Default Value: 0x00
Shutter_Upper Access: Read Field
Data Type: Sixteen unsigned integer. USAGE: Units clock cycles. Read Shutter_Upper first, then Shutter_Lower. They should read consecutively. shutter adjusted keep average maximum pixel values within normal operating ranges. shutter value checked automatically adjusted value needed every frame when operating default mode. When shutter adjusts, changes 1/16 current value. shutter value manually setting mode Disable using Extended_Config register writing Shutter_Max_Bound registers. Because automatic frame rate feature related shutter value also appropriate enable Fixed Frame Rate mode using Extended_Config register. Shown below graph sequentially acquired shutter values, while sensor moved slowly over white paper.
Shutter Value (White Paper) Z=0mm, Circle@7.5" diameter, Speed-6ips
Shutter Value (counts)
Counts
Figure Shutter Values 800cpi (White Paper)
Mean Shutter (White Paper) 800dpi, Circle@7.5" diameter, Speed-6ips -0.8 -0.6 -0.4 -0.2 Distance from Lens Reference Plane Surface, (mm)
Shutter Value (counts)
Avg-3sigma Avg+3sigma
Figure Mean Shutter (White Paper)
maximum value shutter dependent upon setting Shutter_Max_Bound_Upper Shutter_ Max_Bound_Lower registers.
Frame_Period_Lower Access: Read Field
Address: 0x10 Default Value: Undefined
Frame_Period_Upper Access: Read Field FP15
Address: 0x11 Default Value: Undefined FP12 FP11 FP10
FP13
Data Type: Sixteen unsigned integer. USAGE: Read these registers determine current frame period calculate frame rate. Units clock cycles. formula Frame Rate Clock Frequency/Register value read from registers, read Frame_Period_Upper first followed Frame_Period Lower. frame rate manually, disable automatic frame rate mode Extended_Config register write desired count value Frame_Period_Max_Bound registers. following table lists some Frame_Period values popular frame rates with 2MHz clock.
Motion_Clear Access: Write Data Type: Any.
Address: 0x12 Default Value: Undefined
USAGE: Writing value this register will cause Delta_X, Delta_Y, internal motion registers cleared. this fast reset motion counters zero without resetting entire chip.
Frame_Capture Access: Read/Write Field
Address: 0x13 Default Value: 0x00
Data Type: field. USAGE: Writing 0x83 this register will cause next available complete frames pixel values stored SROM RAM. Writing this register required before using Frame Capture burst mode read pixel values (see Synchronous Serial Port section more details). Writing this register will stop navigation cause firmware loaded SROM overwritten. hardware reset required restore navigation, firmware must reloaded using PROM Download burst method. This register also used read frame capture data. same data available reading Pixel_Burst register using burst mode available reading this register normal fashion. data pointer automatically incremented after each read 1536 pixel values frames) obtained reading this register 1536 times row. Both methods share same pointer such that reading pixel values from this register will increment pointer causing subsequent reads from Pixel_Burst register (without initiating frame dump) start current pointer location. This register will return zeros read before frame capture data ready. Frame Capture description Synchronous Serial Port section more information. This register will retain last value written. Reads will return zero frame capture data. SROM_Enable Access: Write Field Address: Default Value: 0x00
Data Type: 8-bit number. USAGE: Write this register start either PROM download SROM test. Write 0x1D this register, wait least frame period, write 0x18 this register before downloading PROM firmware SROM_Load register. download will successful unless this sequence followed. Synchronous Serial port section details. Write 0xA1 start SROM test. Wait plus frame period, then read result from Data_Out_Lower Data_Out_Upper registers. Navigation halted port should used during this test. Reserved Address: 0x15
Configuration Access: Read/Write Field Reserved Reserved
Address: 0x16 Default Value: Reserved Reserved Reserved Force_ disable Reserved
Data Type: field USAGE: Write this register Field Name Force_disable Description Must LASER_NEN functions normal LASER_NEN output high. useful product test. Address: 0x17-0x18
Reserved
Frame_Period_Max_Bound_Lower Access: Read/Write Field FBM7 FBM6
Address: 0x19 Default Value: 0x90 FBM5 Address: 0x1A Default Value: 0x65 FBM3 FBM2 FBM1 FBM0
Frame_Period_Max_Bound_Upper Access: Read/Write Field FBM15 FBM1
FBM13
FBM13
FBM11
FBM10
FBM9
FBM8
Data Type: 16-bit unsigned integer. USAGE: This value sets maximum frame period (the MINIMUM frame rate) which selected automatic frame rate control, sets actual frame period when operating manual mode. Units clock cycles. formula Frame Rate Clock Frequency Register value read from registers, read Upper first followed Lower. write registers, write Lower first, followed Upper. frame rate manually, disable automatic frame rate mode Extended_Config register write desired count value these registers. Writing Frame_Period_Max_Bound_Upper Lower registers also activates values following registers: Frame_Period_Max_Bound_Upper Lower Frame_Period_Min_Bound_Upper Lower Shutter_Max_Bound_Upper Lower data written these registers will saved will take effect until write Frame_Period_Max_ Bound_Upper Lower complete. After writing this register, complete frame times required implement settings. Writing above registers before implementation complete chip into undefined state requiring reset. "Busy" Extended_Config register used lieu timer determine when safe write. Extended_Config register more details. following table lists some Frame_Period values popular frame rates (clock rate 2MHz). addition, three bound registers must also follow this rule when non-default values: Frame_Period_Max_Bound Frame_Period_Min_Bound Shutter_Max_Bound.
Frame_Period_Min_Bound_Lower Access: Read/Write Field FBm7
Address: 0x1B
Default Value: 0x7E FBm6 FBm5 FBm3 FBm2 FBm1 FBm0
Frame_Period_Min_Bound_Upper Access: Read/Write Field FBm15
Address: 0x1C
Default Value: 0x0E FBm1 FBm13 FBm13 FBm11 FBm10 FBm9 FBm8
Data Type: 16-bit unsigned integer. USAGE: This value sets minimum frame period (the MAXIMUM frame rate) which selected automatic frame rate control. Units clock cycles. formula Frame Rate Clock Rate Register value read from registers, read Upper first followed Lower. write registers, write Lower first, followed Upper, then execute write Frame_Period_Max_Bound_Upper Lower registers. minimum allowed write value 0x0E7E; maximum 0xFFFF. Reading this register will return most recent value that written However, value will take effect only after write Frame_Period_Max_Bound_Upper Lower registers. After writing Frame_Period_Max_ Bound_Upper, wait least frame times before writing Frame_Period_Min_Bound_Upper Lower again. "Busy" Extended_Config register used lieu timer determine when safe write. Extended_Config register more details. addition, three bound registers must also follow this rule when non-default values: Frame_Period_Max_Bound Frame_Period_Min_Bound Shutter_Max_Bound.
Shutter_Max_Bound_Lower Access: Read/Write Field
Address: 0x1D Default Value: 0x20 Address: 0x1E Default Value:
Shutter_Max_Bound_Upper Access: Read/Write Field SB15
SB13
SB12
SB11
SB10
Data Type: 16-bit unsigned integer. USAGE: This value sets maximum allowable shutter value when operating automatic mode. Units clock cycles. Since automatic frame rate function based shutter value, value these registers limit range frame rate control. read from registers, read Upper first followed Lower. write registers, write Lower first, followed Upper, then execute write Frame_Period_Max_Bound_Upper Lower registers. shutter manually, disable Extended_Config register write desired value these registers. Reading this register will return most recent value that written However, value will take effect only after write Frame_Period_Max_Bound_Upper Lower registers. After writing Frame_Period_Max_Bound_ Upper, wait least frame times before writing Shutter_Max_Bound_Upper Lower again. "Busy" Extended_Config register used lieu timer determine when safe write. Extended_Config register more details. addition, three bound registers must also follow this rule when non-default values: Frame_Period_Max_Bound Frame_Period_Min_Bound Shutter_Max_Bound. SROM_ID Access: Read Field Address: 0x1F Default Value: Version dependent
Data Type:8-Bit unsigned integer. USAGE: Contains revision downloaded Shadow firmware. firmware been successfully downloaded chip operating SROM, this register will contain SROM firmware revision, otherwise will contain 0x00. Note: hardware revision available reading Revision_ID register (register 0x01).
LP_CFG0 Access: Read/Write Field Match
Address: 0x2C Default Value: 0x7F
Data Type: 8-bit unsigned integer USAGE: This register used laser current matching parameter. used together with register 0x2D where register 0x2D must contain complement register 0x2C order laser current programmed. Writing this register causes fault test performed XY_LASER pin. test checks stuck stuck high conditions. During test, LASER_NEN will driven high XY_LASER will pulse high 12us pulse 12us (times typical). Both pins will return normal operation fault detected. Field Name Match Description Match sensor VCSEL characteristics. table specification VCSEL use. Controls adjusting laser current. step equivalent (1/192)*100% 0.5208% drop relative laser current. Refer table below example relative laser current settings. Relative Laser Current 100% 99.8% 98.96% 98.3% 97.92% 3.90% 3.38% 33.85%
LP6- 0000 0000 0000 0000 0000 1111 1111 1111
LP_CFG1 Access: Read/Write Field LPC7 LPC6
Address: 0x2D Default Value: 0x80 LPC5 LPC3 LPC2 LPC1 LPC0
Data Type: 8-bit unsigned integer USAGE: value this register must complement register 0x2C laser current programmed, otherwise laser current 33.85%. Registers 0x2C 0x2D written order after power reset SROM download.
Reserved
Address: 0x2f-0x3C
Observation Access: Read/Write Field Reserved
Address: 0x3D Default Value: 0x00 Reserved Reserved Reserved
Data Type: field USAGE: Each some process action regular intervals, when event occurs. user must clear register writing 0x00, wait appropriate delay, read register. active processes will have their corresponding bit(s). This register used part recovery scheme detect problem caused EFT/B ESD. Field Name Description Chip running SROM code Chip running SROM code pulse detected pulse detected once frame once frame
Reserved
Address: 0x3E
Inverse_Product_ID Access: Read Field NPID7 NPID6
Address: 0x3F Default Value: 0xE3 NPID5 NPID NPID3 NPID2 NPID1 NPID0
Data Type: Inverse 8-Bit unsigned integer USAGE: This value inverse Product_ID, located inverse address. used test port.
Pixel_Burst Access: Read Field
Address: Default Value: 0x00
Data Type: Eight unsigned integer USAGE: Pixel_Burst register used high-speed access pixel values from complete frame. Synchronous Serial Port section details. Motion_Burst Access: Read Field Address: 0x50 Default Value: 0x00
Data Type: Various, depending data USAGE: Motion_Burst register used high-speed access Motion, Delta_X, Delta_Y, SQUAL, Shutter_ Upper, Shutter_Lower, Maximum_Pixel registers. Synchronous Serial Port section details. SROM_Load Access: Write Field
Address: Default Value:
Data Type: Eight unsigned integer USAGE: SROM_Load register used high-speed programming ADNS-6000 from external PROM microcontroller. Synchronous Serial Port section details.
ADNV 6330
Single-Mode Vertical-Cavity Surface Emitting Laser (VC-SEL)
This advanced class VCSELs engineered Avago Technologies provide laser diode with single longitudinal single transverse mode. contrast most oxide-based single-mode VCSELs, this class Avago Technologies VCSELs remains within single mode operation over wide range output power. ADNV6330 significantly lower power consumption than LED. excellent choice optical navigation applications.
Features
Advanced Technology VCSEL chip Single Mode Lasing operation Non-hermetic plastic package 832-865 wavelength Notes: Because sealed, protective kapton tape should removed until just prior assembly into ADNS-6120 ADNS-6130-001 lens.
(11)
Bin# Letter Subcon Code Source
cable wire connections (2X)
Dimension millimeters
Figure Suggested ADNV-6330 Mounting Guide
Figure Outline Drawing ADNV-6330 VCSEL
Thickness
Absolute Maximum Ratings:
Parameter Forward current Peak Pulsing current Power Dissipation Reverse voltage Laser Junction Temperature Operating case Temperature Storage case Temperature Lead Soldering Temperature (Human-body model)
Notes: Duration 100ms, duty cycle 10µA reflow profile (Figure
Comments:
Rating Units Volts Stresses greater than those listed under"Absolute Maximum Ratings" cause permanent damage device. These stress ratings only functional operation device these other condition beyond those indicated extended period time affect device reliability. maximum ratings reflect eye-safe operation. safe operating conditions listed power adjustment procedure section ADNS-6000 laser sensor datasheet. inherent design this component causes sensitive electrostatic discharge. threshold listed above. prevent ESD-induced damage, take adequate precautions when handling this product.
Comments:
VCSELs sorted into bins specified power adjustment procedure section ADNS-6000 laser sensor datasheet. Appropriate binning resistor register data values used application circuit achieve target output power.
Danger:
When driven with current temperature range greater than specified power adjustment procedure section, safety limits exceeded. VCSEL should then treated Class IIIb laser potential hazard.
Optical/Electrical Characteristics 45°C):
Parameter Peak Wavelength Maximum Radiant Power Wavelength Temperature coefficient Wavelength Current coefficient Beam Divergence Threshold current Slope Efficiency Forward Voltage Symbol d/dT d/dI FW@1/e^2 Min. 0.065 0.21 Typ. Max. Units nm/mA
Notes: Maximum output power under condition. This recommended operating condition does meet safety requirements. 500uW output power.
Typical Characteristics
Forward Voltage Forward Currents
Forward Voltage
Forward Current (mA)
Figure Forward Voltage Forward Current
Optical Power, (mW) Forward Current, (mA)
Figure Optical Power Forward Current
Junction Temperature rise current Temperature rise I(mA)
Figure Junction Temperature Rise Forward Current
Figure Recommended Reflow Soldering Profile
ADNS-6120 ADNS-6130-001
Laser Mouse Lens
ADNS-6120 ADNS-6130-001 laser mouse lens designed with Avago Technologies laser mouse sensors illumination subsystem provided ADNS-6230-001 VCSEL assembly clip ADNV6330 Single-Mode Vertical-Cavity Surface Emitting Lasers (VCSEL). Together with VCSEL, ADNS-6120 ADNS-6130-001 laser mouse lens provides directed illumination optical imaging necessary proper operation laser mouse sensor. ADNS-6120 ADNS6130-001 laser mouse lens precision molded optical component should handled with care avoid scratching optical surfaces.
Part Number ADNS-6120 ADNS-6130-001
Description Laser Mouse Round Lens Laser Mouse Trim Lens
Figure ADNS-6120 laser mouse round lens outline drawings details
Figure ADNS-6130-001 laser mouse trim lens outline drawings details
MOUSE SENSOR
ADNS-6120 OBJECT SURFACE
Figure Optical system assembly cross-section diagram
Mechanical Assembly Requirements
specifications reference Figure Optical System Assembly Diagram Parameters Distance from Object Surface Lens Reference Plane Distance from Mouse Sensor Surface Object Surface Symbol Min. 2.18 Typical 10.65 Max. 2.62 Units Conditions ADNS-6120 ADNS-6130-001 Sensor must contact with lens housing surface
Figure Avago Technologies's logo locations
Lens Design Optical Performance Specifications
specifications based Mechanical Assembly Requirements. Parameters Design Wavelength Lens Material* Index Refraction Symbol 1.5693 Min. Typical 1.5713 1.5735 Max. Units Conditions
*Lens material polycarbonate. Cyanoacrylate based adhesives should used they will cause lens material deformation.
Mounting Instructions ADNS-6120 ADNS-6130001 Laser Mouse Lenses Base Plate
IGES format drawing file with design specifications laser mouse base plate features available. These features useful maintaining proper positioning alignment ADNS-6120 ADNS-6130-001 laser mouse lens when used with Avago Technologies Laser Mouse Sensor. This file obtained contacting your local Avago Technologies sales representative.
Figure Illustration base plate mounting features ADNS-6120 laser mouse round lens
Figure Illustration base plate mounting features ADNS-6130-001 laser mouse trim lens
ADNS-6230-001
Laser Mouse VCSEL Assembly Clip
ADNS-6230-001 VCSEL Assembly Clip designed provide mechanical coupling ADNV-6330 VCSEL ADNS-6120 ADNS-6130-001 Laser Mouse Lens. This coupling essential achieve proper illumination alignment required sensor operate wide variety surfaces.
Figure Outline Drawing ADNS-6230-001 VCSEL Assembly Clip
product information complete list distributors, please site: www.avagotech.com Avago, Avago Technologies, logo trademarks Avago Technologies, Pte. United States other countries. Data subject change. Copyright 2007 Avago Technologies Pte. rights reserved. Obsoletes AV01-0110EN AV02-0116EN February 2007

Laser Mouse Bundles Avago Technologies' ADNB-6001 ADNB-6002 laser

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