Single Chip 8-Bit 9-Bit Converter MB40168/MB40178 DESCRIPTIO

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Single Chip 8-Bit 9-Bit Converter MB40168/MB40178 DESCRIPTIO

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DS04-28501-2E
Single Chip 8-Bit 9-Bit Converter
MB40168/MB40178
DESCRIPTION
Fujitsu MB40168 MB40178 high speed, power single chip converters designed video processing applications. converter resolution bits while converter 9bit resolution. They fabricated Fujitsu's advanced bipolar technology, housed 48-pin plastic shrink 44-pin plastic package.
FEATURES
Resolution A/D: bits D/A: bits Conversion Rate A/D: Max. MSPS D/A: Max. MSPS Linearity Error A/D: Max. 0.3% D/A: Max. 0.2% On-chip reference voltage generator (resistor divided method) clamp circuit Analog Input Voltage without clamp circuit 1.95 VP-P clamp circuit Analog Output Voltage
(Continued)
PACKAGES
pin, Plastic SH-DIP pin, Plastic
(DIP-48P-M01)
(FPT-44P-M11)
This device contains circuitry protect inputs against damage high static voltages electric fields. However, advised that normal precautions taken avoid application voltage higher than maximum rated voltages this high impedance circuit.
MB40168/MB40178
(Continued) Digital Input/Output Interface Power Supply Voltage Power Dissipation Package Options
Levels single power supply Typ. 48-pin Plastic Shrink DIP/ 44-pin Plastic Package
ASSIGNMENTS
MB40168
(TOP VIEW)
D.GND (TOP VIEW) DACLK (LSB) (LSB) DACLK D.GND D.GND A.GND A.OUT COMP (MSB) (LSB) (MSB) ADCLK D.GND A.GND A.GND D.GND A.GND CLMP OUTC (MSB) (LSB) (FPT-44P-M11) (MSB) ADCLK D.GND VCCA
A.GND A.OUT COMP D.GND A.GND CLMP OUTC A.GND
(DIP-48P-M01)
MB40168/MB40178
MB40178
(TOP VIEW)
D.GND (TOP VIEW) DACLK (MSB) (MSB) DACLK D.GND D.GND A.GND A.OUT COMP (LSB) (LSB) (MSB) ADCLK D.GND A.GND A.GND D.GND A.GND CLMP OUTC (LSB) (LSB) (FPT-44P-M11) (MSB) ADCLK D.GND VCCA
A.GND A.OUT COMP D.GND A.GND CLMP OUTC A.GND
(DIP-48P-M01)
MB40168/MB40178
DESCRIPTION
Symbol VCCD VCCA DGND AGND ADCLK VINC QFP-44 SH-DIP-48 Name Function Digital Power Supply pins Analog Power Supply pins Digital Ground These pins should connected analog ground application system. Analog Ground These pins should connected analog ground application system. Digital Output pins. level. Clock Input pin. level. Reference Voltage Input pin. Input) Sync Clamp Circuit Analog Input pin. 1.95 VP-P). When clamp circuit used, this connected ground. Clamp Circuit Analog Output pin. used adding capacitor more) between VCLMP VOVTC pins. When clamp circuit used, this left open. Clamp Voltage Output (3.05V Output). When clamp circuit used, this left open. Analog Signal Input pin. Middle Reference Voltage Monitor pin. (Mid this pin). Normally this left open. Reference Voltage Input pin. Reference Voltage Output pin. (Resistor Divider, connecting this pin, Voltages generated. When reference voltage used, this left open. Reference Voltage Input Phase Compensation Capacitor pin. (Capacitor greater than should connected between this Analog Ground.) Analog Signal Output Clock Input pin. level. Digital Data Input pins. level.
VOUTC VCLMP VINA VREF VRIN COMP AOUT DACLK
11*2
MB40168 (MSB: pin, LSB: pin), MB40178 (MSB: pin, LSB: pin) MB40168 (MSB: pin, LSB: pin), MB40178 (MSB: pin, LSB: pin)
MB40168/MB40178
BLOCKDIAGRAM
VCCD VCCA
VINA
ADCLK
(MSB)
Encoder
Latch Buffer
(LSB)
VINC VOUTC 0.6VCCA 50mV VCLMP VREF VRIN Reference resistor 0.6VCCA COMP Clamp Reference voltage generator
DACLK (LSB) (MSB) Input buffer
Master Slave register
Buffer
Current switch
R-2R Ladder resistor network
AOUT
DGND
AGND
MB40168/MB40178
ABSOLUTE MAXIMUM RATINGS
Parameter Power supply voltage Analog input voltage Reference voltage Clamp circuit input voltage Digital input voltage Storage temperature Symbol VCCA, VCCD VINA VRT, VRB, VRIN VINC VIND TSTG Rating -0.5 -0.5 -0.5 -0.5 -0.5 +125 Unit
Note: Permanent device damage occur above Absolute Maximum Ratings exceeded. Functional operation should restricted conditions detailed operational sections this data sheet. Exposure absolute maximum rating conditions extended periods affect device reliability.
MB40168/MB40178
RECOMMENDED OPERATING CONDITIONS
Parameter Power supply voltage Clamp circuit input voltage Analog input voltage
Symbol VCCA, VCCD VINC VINA VCCA VRIN
Value Min. 4.75 VCCA 2.75 2.65 -400 22.5 10.5 22.5 10.5 Typ. 5.00 VCCA Max. 5.25 VCCA 3.25
Unit
reference voltage
Bottom
reference voltage Digital input high voltage Digital input voltage Digital output high current Digital output current
VRIN
VIHD VILD fCLKAD fCLKDA tWHAD tWHDA tWLAD tWLAD CCLMP CCOMP
Clock frequency
Minimum high clock pulse width Minimum clock pulse width time Hold time Clamp capacitance Phase compensation capacitance Ambient operating temperature
VCCA VCCD must used same voltage level. VINC must have amplitude VCLMP. must have 2.0V±0.1V.
MB40168/MB40178
ELECTRICAL CHARACTERISTICS
Characteristics
Analog Block (VCCA VCCD 4.75 5.25 Parameter resolution resolution linearity error linearity error Analog input equivalent impedance Analog input capacitance Analog input high current Analog input current Reference output voltage Clamp voltage reference current reference current Clamp circuit input current Full scale output voltage Zero scale output voltage Output impedance Supply current Symbol LEAD LEDA RINA CINA IIHA IILA VREF VCLMP IRIN IINC VOFS VOZS Condition accuracy VCCA VCCD RINA -VRB IIHA IILA Value Min. 0.6VCCA -8.5 -600 VCCA-20mV 2.934 Typ. 0.15 0.6VCCA VREF -5.5 -200 VCCA 3.004 Max. 0.6VCCA+ -3.0 3.072 Unit bits bits
fINA VINA VINA VREF, VRB, VRIN shorted together VRIN 3.000 VINC VCCA 5.00 VCCD 5.00 VRIN 3.000
MB40168/MB40178
Digital Block (VCCA VCCD 4.75 5.25 Parameter Digital output high voltage Digital output voltage Digital input high voltage Digital input voltage Digital input high current Digital input curent Symbol VOHD VOLD VIHD VILD IIHD IILD Condition -400 VIHD VILD Value Min. -100 Typ. Max. Unit
CHARACTERISTICS
(VCCA VCCD 4.75 5.25 Parameter Maximum conversion rate Digital output delay time Analog output delay time Analog output rise time Analog output fall time Settling time Symbol fSAD fSDA tset tset Condition Terminating resistor AOUT Value Min. Typ. Max. Unit MSPS MSPS
MB40168/MB40178
LINEARITY ERROR CONVERSION
Ideal Characteristic
Step Output Code 11111111 11111110 11111101 10000001 10000000 01111111 00000010 00000001 00000000 3.006V 4.996V
VINA
Note: values typical values under conditions that VCCA VCCD 5.000V 3.000V.
Actual Characteristic
Step Output Code 11111111 11111110 11111101 10000001 10000000 01111111 00000010 00000001 00000000 VINA LE129 LE128 LE127
LE253
MB40168/MB40178
OUTPUT VOLTAGE CHARACTERISTIC CONVERTER BLOCK
Input (VCCA) VOFS
Output A.OUT 5.000V 5.000V
VOZS (VRIN)
3.004V 3.000V
CALCULATION OUTPUT VOLTAGE WHEN IDEAL CONVERSION PERFORMED
511-N (VCCA VRIN)
AOUTN VCCA
Digital code 511) VOFS VCCA VOZS VCCA (VCCA VRIN)
MB40168/MB40178
EQUIVALENT CIRCUITS BLOCK
Analog Input Equivalent Circuit
VCCA
VCCA
VINA
VINA CINA IBIAS RINA
A.GND
A.GND circuits
A.GND
CINA: Junction Capacitance non-linear emitter follower RINA: Linear resistance model input current comparator switching VINA VRB: "H": VRB: This voltage Pin, itself. IBIAS: Constant input bias current Base-Collector junction diode emitter follower transistor
Clamp Input Equivalent Circuit
VCCA
2.0mA
50mV +VBE
VINC
850k
A.GND
VOUTC CCLMP
VCLMP
MB40168/MB40178
Digital Input Equivalent Circuit
VCCD 6.5k
3.2k
3.2k
Clock Input ADCLK
1.4V
D.GND
Digital Output Load Circuit
tested
Test point
15pF
D.GND
NOTE:
includes floating capacitance probe jig.
MB40168/MB40178
EQUIVALENT CIRCUITS BLOCK
Digital Input Equivalent Circuit
VCCD
Digital Input DACLK
1.4V
D.GND
Analog Output Equivalent Circuit
VCCA A.OUT A.GND
Reference Voltage Generator Equivalent Circuit
VCCA Buffer VREF A.GND
MB40168/MB40178
TYPICAL CONNECTION CIRCUITS
Example Video Signal Input VINC
VCCA Video Signal Input VINC
VCCD
VOUTC VCLMP MB40168/MB40178
VINA
AGND
DGND
Example Video Signal Input VCLMP VINA Pins
VCCA VINC
VCCD
External Circuit
VOUTC MB40168/MB40178 VCLMP
Video Signal Input 2SA933 AGND DGND
VINA
AGND
MB40168/MB40178
CLAMP CIRCUIT OPERATION
Clamp Circuit
Clamp Voltage (typ.) VCCA VCCA
Bias Circuit
VINC
AGND VOUTC 3.05
CCLMP VCLMP
VINA
Converter
Signal Level VINA Signal Level VINC VCCA
AGND
VCLMP 3.05 VREF
Note: When Clamp Circuit applied signals should connected follows: VINC: Connect GND. VOUTC: Leave open. VCLMP: Leave open.
MB40168/MB40178
TYPICAL CONNECTION CIRCUIT(Example)
System Analog Ground Clock Input Digiral Input (DAC) DGND DACLK (LSB) AGND VCCD VCCA AOUT COMP VRIN VREF DGND System Analog Power Supply Analog (DAC)
(MSB) Open Open Open (LSB) Digiral Output (DAC) Clock Input (MSB) ADCLK DGND
MB40168
AGND VCCD VCCD VCCA VCCA VINA VCLMP VOUTC VINC VCCA VCCD AGND Analog Input (ADC) Open
MB40168/MB40178
NOTES LAYOUT
Power Supply Lines
device's power supply lines (VCCA, VCCD, AGND DGND) should laid analog lines should separated possible from other digital lines order reduce noise. Also track widths these lines should wide possible reduce parasitic impedance.
Coupling Capacitors
device's power supply lines VCCA VCCD reference voltage pins VRIN, VREF, VRB, should decoupled analog ground means approx. capacitors which should placed close possible these pins.
Digital Output Load
load digital outputs should kept possible prevent noise power supply lines caused digital output switching. long wiring, load becomes large then buffer with small input capacitance should inserted reduce load capacitance.
OTHER NOTES OPERATION
When using converter with VRIN connected VREF pin, converter's must also connected VREF because otherwise internal reference voltage generation circuitry cannot output When using converter with resolution (LSB) should grounded.
MB40168/MB40178
PACKAGE DIMENSIONS
pin, Plastic SH-DIP (DIP-48P-M01)
43.69 -0.30 +.008 1.720 -.012
+0.20
INDEX-1 13.80±0.25 (.543±.010) INDEX-2
5.25(.207) 3.00(.118)
+0.50
0.51(.020)MIN 0.25±0.05 (.010±.002)
1.00 +.020 .039 1.778±0.18 (.070±.007) 1.778(.070)
0.45±0.10 (.018±.004)
15.24(.600)
15°MAX
40.894(1.610)REF
1994 FUJITSU LIMITED D48002S-3C-3
Dimensions (inches).
(Continued)
MB40168/MB40178
pin, Plastic (FPT-44P-M11)
14.40±0.40 (.567±.016) 10.00±0.20 (.394±.008)
2.35(.093)MAX 0.05(.002)MIN (STAND OFF)
Details part
0.15(.006)
INDEX
8.00 (.315)
11.60±0.30 (.457±.012)
0.20(.008) 0.18(.007)MAX 0.53(.021)MAX
Details part LEAD
0.80(.0315)TYP
0.30±0.10 (.012±.004)
0.16(.006)
0.15±0.05 (.006±.002) 0~10° 1.40±0.30 (.055±.012)
0.10(.004)
1994 FUJITSU LIMITED F44018S-1C-1
Dimensions (inch).
MB40168/MB40178
FUJITSU LIMITED
further information please contact:
Japan FUJITSU LIMITED Corporate Global Business Support Division Electronic Devices KAWASAKI PLANT, 4-1-1, Kamikodanaka Nakahara-ku, Kawasaki-shi Kanagawa 211-88, Japan Tel: (044) 754-3753 Fax: (044) 754-3329 North South America FUJITSU MICROELECTRONICS, INC. Semiconductor Division 3545 North First Street Jose, 95134-1804, U.S.A. Tel: (408) 922-9000 Fax: (408) 432-9044/9045 Europe FUJITSU MIKROELEKTRONIK GmbH Siebenstein 6-10 63303 Dreieich-Buchschlag Germany Tel: (06103) 690-0 Fax: (06103) 690-122 Asia Pacific FUJITSU MICROELECTRONICS ASIA PTE. LIMITED #05-08, Lorong Chuan Tech Park Singapore 556741 Tel: (65) 0770 Fax: (65) 0220
Rights Reserved. contents this document subject change without notice. Customers advised consult with FUJITSU sales representatives before ordering. information circuit diagrams this document presented examples semiconductor device applications, intended incorporated devices actual use. Also, FUJITSU unable assume responsibility infringement patent rights other rights third parties arising from this information circuit diagrams. FUJITSU semiconductor devices intended standard applications (computers, office automation other office equipment, industrial, communications, measurement equipment, personal household devices, etc.). CAUTION: Customers considering products special applications where failure abnormal operation directly affect human lives cause physical injury property damage, where extremely high levels reliability demanded (such aerospace systems, atomic energy controls, floor repeaters, vehicle operating controls, medical devices life support, etc.) requested consult with FUJITSU sales representatives before such use. company will responsible damages arising from such without prior approval. semiconductor devices have inherently certain rate failure. must protect against injury, damage loss from such failures incorporating safety design measures into your facility equipment such redundancy, fire protection, prevention over-current levels other abnormal operating conditions. products described this document represent goods technologies subject certain restrictions export under Foreign Exchange Foreign Trade Control Japan, prior authorization Japanese government should required export those products from Japan.
F9703 FUJITSU LIMITED
Printed Japan

Single Chip 8-Bit 9-Bit Converter MB40168/MB40178 DESCRIPTIO

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