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BIPOLAR Image Processing Converter with built-in clamp circu
Top Searches for this datasheetDS04-28203-4E BIPOLAR Image Processing Converter with built-in clamp circuit) (1-channel, 8-bit low-power model MB40568 DESCRIPTION MB40568 all-parallel (flash type) converter 8-bit video applications, uses high-speed bipolar process technology low-power consumption high-speed conversion. This converter capable converting analog signals into digital signals rate MSPS (megasamples second). Additional circuitry including clamp circuit reference voltage generator circuits build make MB40568 ideally suited video signal processing. FEATURES Resolution: bits Linearity error: ±0.15 typ. Maximum conversion rate: MSPS min. Analog input voltage: VP-P (clamp circuit) (without clamp circuit) Digital input/output level: Levels Power supply voltage: single power supply Power dissipation: typ. PACKAGES 22-pin Plastic SK-DIP 24-pin Plastic (FPT (DIP-22P-M04) (FPT-24P-M02) MB40568 ASSIGNMENTS (Top view) D.GND (LSB) (MSB) D.GND (DIP-22P-M04) A.GND VCCD VCCA VINA VCLMP VOUTC VINC VCCA VCCD A.GND D.GND (LSB) (MSB) D.GND A.GND (FPT-24P-M02) (Top view) A.GND VCCD VCCA VREF VINA VCLMP VOUTC VINC VCCA VCCD DESCRIPTIONS Symbol D.GND A.GND VCCD Function Ground Should connected analog system ground. Digital signal output Clock input Ground Should connected analog system ground. Power supply voltage input Also functions VCCA power supply, should same voltage level VCCA pin. Power supply voltage input Also functions VCCD power supply, should same voltage level VCCD pin. Clamp circuit input clamp circuit diode-clamp type sync chip clamp circuit. Should shorted ground clamp circuit used. Clamp circuit output capacitor least should connected between this VCLMP pin. Should left open clamp circuit used. VCCA VINC VOUTC (Continued) MB40568 (Continued) Symbol VCLMP Function Clamp voltage output capacitor least should connected between this VOUTC pin. Should left open clamp circuit used. Analog signal input Analog reference voltage model, this internally connected reference circuit. Always sure that capacitor connected immediately next between this ground. capacitor must least with excellent frequency characteristics. Reference voltage monitor midpoint resistance between VCCA VRB. Should left open normal use. Reference voltage output Should left open when reference voltage source used. Analog reference voltage input When internal reference voltage source used, this should shorted VREF pin. this case, always sure that capacitor connected immediately next between this ground. capacitor must least with excellent frequency characteristics. When external reference voltage source used, this will carry current therefore necessary voltage source with sufficient sync capacity. capacitor connection should also used similar that used with internal reference voltage sources. VINA VREF MB40568 BLOCK DIAGRAMS SK-DIP VINA VCCA VCCA Encoder Latch Buffer (MSB) (LSB) D.GND D.GND VINC VOUTC VCLMP A.GND A.GND Clamp Circuit Reference MB40568 VINA VCCA VCCA VCCD VCCD Encoder Latch Buffer (MSB) (LSB) VREF D.GND D.GND A.GND A.GND VINC VOUTC VCLMP Clamp Circuit Reference MB40568 ABSOLUTE MAXIMUM RATINGS (See WARNING) Parameter Power supply voltage Digital input voltage Analog input voltage Analog reference voltage* Clamp circuit input voltage Storage temperature Package VCCA WARNING: Permanent device damage occur above Absolute Maximum Ratings exceeded. Functional operation should restricted conditions detailed operational sections this data sheet. Exposure absolute maximum rating conditions extended periods affect device reliability. Symbol VCCA, VCCD VIND VINA VINC Tstg Rating -0.5 +7.0 -0.5 +7.0 -0.5 -0.5 -0.5 +125 Unit RECOMMENDED OPERATING CONDITIONS Parameter Power supply voltage*1 Analog input voltage Analog reference voltage*2 Clamp circuit input voltage* Clamp capacitance Digital high-level output voltage Digital low-level output voltage Clock pulse width high-level Clock pulse width low-level Operating temperature Symbol VCCA, VCCD VINA VINC CCLMP Value Min. 4.75 2.75 -400 22.5 22.5 Typ. 5.00 Max. 5.25 VCCA 3.25 Unit VCCA VCCD must used same voltage level. Package VCCA VINC must have amplitude VCCA VCLMP. MB40568 ELECTRIC CHARACTERISTICS Characteristics Analog Characteristics (VCCA VCCD 4.75 5.25 +70°C) Symbol RINA CINA IIHA IILA IINC Reference voltage VREF Clamp voltage Reference current VCCA VCCD 5.00 +25°C Digital Characteristics (VCCA VCCD 4.75 5.25 +70°C) Parameter Digital high-level output voltage Digital low-level output voltage Digital high-level input voltage Digital low-level input voltage Maximum input current High-level input current Digital low-level input current Power supply current VCCA VCCD 5.00 +25°C Symbol VIHD VILD IIHD IILD Value Min. -100 Typ. Max. Unit VIHD VILD Remarks -400 VCLMP -0.1 +0.1 Value Min. -600 Typ. ±0.15 -200 Max. ±0.3 Unit bits Accuracy RINA VCCA IIHA IILA Remarks Parameter Resolution Linearity error* Equivalent analog input resistance Analog input capacitance Analog high-level input current Analog low-level input current Clamp circuit input current fINA 1MHz VINA VCCA VINA VINC SK-DIP22P package SOP24P package Short between VREF SOP24P package -8.5 -5.5 -3.0 MB40568 Switching Characteristics (VCCA VCCD 4.75 5.25 +70°C) Parameter Maximum conversion rate Digital output delay time Symbol Value Min. Typ. Max. Unit MSPS TIMING DIAGRAM SAMPLEN SAMPLEN SAMPLEN VINA DATAN DATAN DATAN MB40568 TYPICAL CHARACTERISTIC CURVES Power supply current Temperature Maximum conversion rate Temperature Maximum conversion rate (MHz) Power supply current (mA) 5.00 5.25 5.00 4.75 Ambient temperature (°C) Reference voltage Temperature Ambient temperature (°C) Reference current Temperature 3.20 5.00 3.00 Reference current (mA) Reference voltage VREF 3.10 5.00 VREF-VRB Short 3.00 2.90 2.80 2.70 Ambient temperature (°C) Ambient temperature (°C) (Continued) MB40568 (Continued) Digital high-level output voltage Temperature Digital low-level output voltage Temperature Digital high-level output voltage Digital low-level output voltage 4.75 -400 4.75 Ambient temperature (°C) Clamp voltage Temperature Ambient temperature (°C) Linerity error Temperature 3.40 3.30 5.00 5.00 Clamp voltage VCLMP Linearity error 3.20 -0.2 3.10 3.00 -0.4 2.90 Ambient temperature (°C) Ambient temperature (°C) Clock pulse width Power supply voltage +25°C Digital output delay time Power supply voltage Digital output delay time (ns) Clock pulse width (ns) tPHL tPLH 4.50 4.75 5.25 Power supply voltage 5.50 4.50 4.75 5.25 Power supply voltage 5.50 (Continued) MB40568 (Continued) Digital output delay time Temperature Clock pulse width Temperature Digital output delay time (ns) 5.00 Clock pulse width (ns) 5.00 tPHL tPLH Ambient temperature (°C) S/Nq (RMS Signal/RMS Noise) Clock frequency Ambient temperature (°C) S/Nq (RMS Signal/RMS Noise) Analog input frequency +70°C +25°C 5.00 S/Nq (dB) S/Nq (dB) 5.00 fCLK +25°C Clock frequency (MHz) Analog input frequency (MHz) MB40568 EQUIVALENT CIRCUIT Analog Input Equivalent Circuit VCCA VINA VCCA VINA CINA IBIAS RINA CIRCUITS A.GND A.GND CINA Non-linear Emitter-Follower Junction Capacitance RINA Linear Resistance Model Input Current Transition Comparator Switching Infinite value VINA when High Voltage terminal. IBIAS Constant Input Bias Current base-collector junction diode emitter-follower transistor Equivalent Circuit Clamp Circuit Block VCCA VINC A.GND VOUTC VCLMP CCLMP MB40568 Equivalent Circuit Reference Circuit Block VCCA Buffer A.GND Digital Input Equivalent Circuit VCCD Clock input VREF D.GND Load Circuit Output Buffer output Measurement point D.GND Note: including scope capacitance MB40568 LINEARITY ERROR Ideal Conversion Characteristics STEP OUTPUT CODE 11111111 11111110 11111101 10000001 10000000 01111111 00000010 00000001 00000000 3.006 4.996 values typical values under conditions that VCCA VCCD 5.000 3.000 MB40568 Actual Conversion Characteristics STEP OUTPUT CODE 11111111 11111110 11111101 10000001 10000000 01111111 00000010 00000001 00000000 VINA Linearity error LE128 LE127 LE129 LE253 MB40568 CLAMP CIRCUIT OPERATION MB40568's internal clamp circuit peak-detection type circuit, which clamps compound synchronized signals using lowest sync point clamp voltage (VCLMP) (see illustration below). clamp voltage (typical). clamp circuit used, signal pins should handled follows: name VINC VOUTC VCLMP Clamp Circuit Description Connect Leave open Leave open VCCA VCCA Video signal VINC A.GND VOUTC VCLMP Bias circuit CCLMP VINA converter (Pin No.: SK-DIP22P) Signal level VINC Signal level VINA VCCA A.GND VCLMP MB40568 TYPICAL CONNECTION EXAMPLES On-Chip Input Transistor Utilized VCCA VCCD Video signal input VINC VOUTC VCLMP MB40568 VINA A.GND D.GND (Pin No.: SK-DIP22P) MB40568 Input Transistor Clamp Circuit Externally External circuit VCCA VINC VOUTC VCLMP MB40568 Video signal input 2SA933 VINA VCCD A.GND D.GND (Pin No.: SK-DIP22P) MB40568 ORDERING INFORMATION Part number MB40568P-SK MB40568PF Package Plastic SK-DIP (DIP-20P-M04) Plastic (FPT-24P-M02) Remarks MB40568 PACKAGE DIMENSIONS 20-pin Plastic SK-DIP (DIP-22P-M04) 27.18 -0.30 1.070 +.008 -.012 +0.20 INDEX-1 INDEX-2 6.60±0.25 (.260±.010) 4.36(.172)MAX 0.51(.020)MIN 0.25±0.05 (.010±.002) 0.46±0.08 (.018±.003) +0.50 +.020 +0.50 3.00(.118)MIN 0.86 .034 1.27(.050) 1.27 .050 2.54(.100) +.020 7.62(.300) 15°MAX 1994 FUJITSU LIMITED D22008S-4C-3 Dimensions (inches) (Continued) MB40568 (Continued) 24-pin Plastic (FPT-24P-M02) 15.24 -0.20 .600 -.008 +0.25 +.010 2.80(.110)MAX 0.05(.002)MIN (STAND OFF) 7.60±0.30 10.20±0.40 (.299±.012) (.402±.016) INDEX 9.20±0.30 (.362±.012) 1.27(.050)TYP 0.45±0.10 (.018±.004) 0.15 -0.02 +.002 .006 -.001 +0.05 0.50±0.20(.020±.008) Details part 0.20(.008) 0.10(.004) 0.60(.024) 0.18(.007)MAX 0.68(.027)MAX 13.97(.550)REF 1994 FUJITSU LIMITED F24008S-4C-4 Dimensions (inches) FUJITSU LIMITED further information please contact: Japan FUJITSU LIMITED Corporate Global Business Support Division Electronic Devices KAWASAKI PLANT, 4-1-1, Kamikodanaka Nakahara-ku, Kawasaki-shi Kanagawa 211-88, Japan Tel: (044) 754-3763 Fax: (044) 754-3329 North South America FUJITSU MICROELECTRONICS, INC. Semiconductor Division 3545 North First Street Jose, 95134-1804, U.S.A. Tel: (408) 922-9000 Fax: (408) 432-9044/9045 Europe FUJITSU MIKROELEKTRONIK GmbH Siebenstein 6-10 63303 Dreieich-Buchschlag Germany Tel: (06103) 690-0 Fax: (06103) 690-122 Asia Pacific FUJITSU MICROELECTRONICS ASIA PTE. LIMITED #05-08, Lorong Chuan Tech Park Singapore 556741 Tel: (65) 281-0770 Fax: (65) 281-0220 Rights Reserved. contents this document subject change without notice. Customers advised consult with FUJITSU sales representatives before ordering. information circuit diagrams this document presented examples semiconductor device applications, intended incorporated devices actual use. Also, FUJITSU unable assume responsibility infringement patent rights other rights third parties arising from this information circuit diagrams. FUJITSU semiconductor devices intended standard applications (computers, office automation other office equipment, industrial, communications, measurement equipment, personal household devices, etc.). CAUTION: Customers considering products special applications where failure abnormal operation directly affect human lives cause physical injury property damage, where extremely high levels reliability demanded (such aerospace systems, atomic energy controls, floor repeaters, vehicle operating controls, medical devices life support, etc.) requested consult with FUJITSU sales representatives before such use. company will responsible damages arising from such without prior approval. semiconductor devices have inherently certain rate failure. must protect against injury, damage loss from such failures incorporating safety design measures into your facility equipment such redundancy, fire protection, prevention over-current levels other abnormal operating conditions. products described this document represent goods technologies subject certain restrictions export under Foreign Exchange Foreign Trade Control Japan, prior authorization Japanese government should required export those products from Japan. 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