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Advanced Micro Devices Communication Products Division Austin, Texas


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QSLACIFP Software ASLAC Interface Boards (Rev Single-DUT (For with Am79Q02/021/031)
Advanced Micro Devices Communication Products Division Austin, Texas
QSLACIFP
HARDWARE
Introduction
ASLACIF board originally designed evaluation tool ASLAC product family. made especially versatile allow board design accommodate diversity interfaces present ASLAC product family. That versatility re-programmability allow ASLACIF board platform provide improved evaluation tools AMD's other SLAC products. This document describes ASLACIF board QSLAC interface software That software called QSLACIFP (the indicates QSLAC interface). ASLAC Interface Board (ASLACIF board) serves connect interface QSLAC Wandel Goltermann PCM-4. digital interface PCM-4 accomplished through 8-bit parallel interface option installed PCM-4. also possible standard 2.048Mbps serial interface PCM-4. boards this done using provided adapter card that allows connection coaxial cables ASLACIF board. board, adaptor necessary, BNCs provided ASLACIF board. ASLACIF board also connects Micro Processor Interface (MPI) QSLAC compatible personal computer. interface through standard serial port (COM1 COM2) found back special boards required inside addition, board provides user control over QSLAC hardware reset through
Implementation
majority logic ASLACIF board implemented inside Field Programmable Gate Arrays (FPGAs). These arrays in-circuit re-configurable: their programming information downloaded from This makes possible provide future changes enhancements logic simply providing file software download into FPGAs. logic FPGAs generates digital signals QSLAC. This logic uses First First (FIFO) memories external FPGAs buffer information from additional FIFOs provided allow data sent from This feature implemented FPGA logic software this time. Firmware microcontroller used implement interface between port FPGAs both FPGA configuration control over logic implemented FPGAs.
QSLACIFP
Power Requirements
ASLACIF Single board requires 5VDC approximately 275mA. ASLACIF Board requires 5VDC approximately 340mA.
Interface
port connects DB-9 connector ASLACIF board using supplied cable. nine adaptor required some PCs. connection made COM1 COM2 whichever being used mouse. software section this document more details. software automatically configures port proper data rate, parity, etc. Several Light Emitting Diodes (LEDs) connected micro-controller indicate status interface. After software configures FPGAs, normal state "Config Done" "Awaiting Cmd" LEDs other LEDs will off. sending commands "Awaiting Data" "Sending Data" LEDs will flash. Push-button switch resets microcontroller does effect programming FPGAs contents registers within them.When release button, microcontroller goes back waiting commands from older boards with microcontroller firmware, "Config Done" will stay when release button even though contents FPGAs effected. This firmware error. firmware, this corrected: microcontroller continually polls state FPGA state always indicates state FPGAs.
PCM-4 Interface Setup PARALLEL INTERFACE
This method connecting PCM-4 board allows ASLACIF board logic complete control over DXA(B)/DRA(B) serial data streams. PCLK frequency used well clock slot setting. supplied ribbon cable used connect PCM-4 parallel interfaces headers ASLACIF board. headers marked PCM-4 Digital carry transmit (from DXA/B) data bytes these connect "64kbit/s Parallel Input" (part number 984/00.07) PCM-4. headers marked "From PCM-4 Digital Out" carry receive DRA/B) data bytes these connect "64kbit/s Parallel Output" (part number 984/00.08) PCM-4. PCM-4 Parallel Output board there switches which must correct positions. access these switches, have remove board from PCM-4. Both switches must "CONTR" position. these switches proper position, interface will operate occasional measurements will occur. These switches define source clock: "CONTR" means contradirectional, i.e. clock signal
QSLACIFP
traveling opposite direction data traveling. clock traveling from ASLACIF board PCM-4, data traveling from PCM-4 ASLACIF board. addition, must PCM-4 General Parameters screens follows: Digital Configuration: Select (64/64kbit/s) Select (Digital Loop OPEN/AUX.SIGN.). Frame Selection: settings this screen matter. Digital Interface: Select (Clock Ext. 8KHz).
PCM-4 Interface Setup SERIAL INTERFACE
This method connecting PCM-4 board does require non-standard options PCM-4; 2.048Mbps serial interface used. serial stream from PCM-4 passed through FPGA logic DXA(B) pins from DRA(B) pins PCM-4. PCLK frequency limited 2.048MHz clock rate PCM-4. PCM-4 front panel controls used desired timeslot; must also QSLACIFP software program QSLAC matching timeslot setting. Clock slot settings must boards physical interface PCM-4 connectors made through supplied adapter board that plugs into headers ASLACIF board. boards connectors provided ASLACIF board. either case boards clearly marked with corresponding connector names numbers PCM-4. addition, must PCM-4 General Parameters screens follows: Digital Configuration: Select (TX/RX 2.048Mbit/s) Select (Digital Loop OPEN/AUX.SIGN.). Frame Selection: Select (All time slots telephone) Select (All time slots telephone) Digital Interface Select (Line Code: NRZ) Select (Output Impedance Ohms) Select (Clock: Internal 2.048MHz clock) Digital Interface: Select (Line Code: NRZ) Select (Input Impedance 120/75 Ohms).
QSLACIFP
Noise Board Interface
DB-25 female connector ASLACIF board mates directly with DB-25 male connector Noise Board(LNB). signals that through this interface buffered ASLACIF board. signals routed through removable jumpers ASLACIF board allow signals easily disconnected should that needed special test situations. These jumpers implemented component carrier next connector. Power ground connections also available component carrier termination networks, pull-up resistors etc. pull-up resistor provided signals guarantee that signal high when neither ASLAC transmitting. boards, jumper located proto-typing area many need moved connect this resistor. boards only support interface. boards support two.
QSLACIFP
SOFTWARE
Personal Computer Requirements
software requires compatible with ideal configuration being `386/'486 20MHz faster machine with graphics mouse. software will `286 machines machines with graphics will slow graphical user interface distorted. software makes extensive point click Graphical User Interface (GUI) present great many controls (buttons, selection lists, etc.) screen. graphics will enlarge font used these controls control itself thereby causing controls partly overlap many cases. This very unsightly, still functional. mouse essential using software efficient manner. possible without using "Tab" "Shift-Tab" keys move from control control "Enter" activate control. serial (COM) port must dedicated communicating with ASLACIF board. software runs under under Windows full screen mode.
Installation
software consists files which must installed together directory your choice. directory name "QSLACIFP" used following example. Follow following steps: Create directory: \QSLACIFP Move into directory: \QSLACIFP Copy files from floppy your hard-disk: COPY A:*.* Note that some computers floppy drive "B:". following line your AUTOEXEC.BAT file: QSLACIFP=C:\QSLACIFP (Change "C:\QSLACIFP" full path directory where have actually installed files. also want this directory your PATH variable. your modified AUTOEXEC.BAT file environment variable your information this what files contain: QSLACIFP.EXE QSLAC_P.UIR executable code. user interface resource file. binary file which defines appearance operational characteris-
QSLACIFP
tics panels controls them. This QSLAC programming menus. IF_PCM.UIR GENERIC.UIR SEQPNL.UIR CMDS.TXT This panels controlling interface MPI. This rest panels. This Sequence panel. ASCII text file used program look table relate command code text that describes what command does. Contains programming information both FPGAs single board. Contains ASCII text describing revision history software. displayed when running software clicking "What's New" button.
FPGADFLT.TEK WHATSNEW.TXT
Starting Program
Typing "QSLACIFP" will start program directory where installed files added that directory your PATH. also program from another directory specifying full path. program cannot find environment variable QSLACIFP, message printed program terminates. step install procedure previous section. program defaults supporting dual operation. This physically possible board used. board used, only used, since only connector available. goes well, screen pops with information about which port program attempting communicate with ASLACIF board. this point have options quitting program continuing program defaults using COM2 ASLACIF board. consequences having this port conflict with your mouse port explained this panel corrective action take after quitting program. command line options discussed latter this section. continue program, dialog asks wish initialize FPGAs. Make sure power applied ASLACIF board. Click "YES" button power been removed from ASLACIF board since last time FPGAs were initialized. FPGAs contain static which volatile, i.e. contents destroyed when power removed. option initializing FPGAs provided that quit restart program without disturbing signals ASLACIF board supplying QSLAC. After clicking "YES" button please wait approximately seconds data downloaded into
QSLACIFP
FPGAs.1 When done another will pop-up indicating download successful. board connected ASLACIF board power, port time-out error message will appear followed message "FPGA Config ERROR: Done/PrgmL line high", program will give another chance initialize FPGAs.
Command Line Options
When starting program there several command line arguments which used. These combined. Each option begins with dash "-".Note that options must separated from program name from each other spaces. This because scans command line: each sequence characters separated spaces seen separate option that passed program. Typing "QSLACIF will cause screen appear which describes command line options. Typing "QSLACIF -demo" will allow software operate without ASLACIF board being connected. this case "ReConfig Brd" button made inactive. demo mode operations which would read something from QSLAC always return options "-com1" "-com2" allow specify which port software will communicate with ASLACIF board. this command line option specified, COM2 used default. "-rs" option (restore settings) option used when resuming work after quitting program, perhaps AmSLAC examine other data computer. causes variables program that track programming ASLACIF board registers QSLAC initialized reading file "LASTSET.BIN". This file automatically created every time quit program. When "-rs" option used values displayed various controls user interface reflect settings before quit. ASLACIF board QSLAC have been disturbed since then, then they also reflect current operation board QSLAC. "-rs" option, controls assume their default values. "-serial" option used when using serial interface PCM-4. Hardware section this document details physical connections PCM-4 General Parameter settings. effect software load different control panel. Also, software programs several multiplexors FPGA logic route signals needed serial interface.
Download times were measured with 486DX2-66MHz processor. Your system take more less time.
QSLACIFP
Regarding Panels:
title showing name program it's revision number date appears screen. Below this seven buttons which cause other control panels pop-up. Note that this program only panel active time panels cannot moved re-sized. Controls panels cause sub-panel partially covering original panel, only panel active that time. Panels dismissed (removed) from screen clicking "Dismiss" button located upper right corner each panel. Some panels have buttons which will cause other panels These buttons have labels which three dots (.); those without dots will immediately execute function when clicked. Many panels contain selection list controls. They allow make choice from several options: current selection will displayed. Clicking mouse within will cause list choices appear. then make your choice clicking items list.
Prgm QSLAC Button
This pops panel will most, QSLAC Programming panel. From here programming commands sent QSLAC MPI. This panel most subordinate panels will have rows small buttons upper left corner. Each four buttons left corresponds Channel Enable Register QSLAC; each these buttons toggled individually. When these buttons changed, command sent into QSLAC program Channel Enable register. state these buttons thereby gives visual indication which channels will effected commands then send, provided that command that dependent channel enable register. QSLAC data sheet explains which commands channel specific which not, i.e. have some global function. sub-panels dealing with only registers having purely global functions (i.e. Config register), these channel enable buttons present. buttons right define which commands will sent These buttons toggle individually, that commands sent either both LNBs. Note that upon selecting both LNBs, command sent both QSLACs program Channel Enable registers both identically. Display Select buttons mutually exclusive; these select what displayed panel. values displayed last values programmed into QSLAC channel selected. When read done, display selection button automatically match enabled channel. more than channel enabled, data displayed that lowest numbered channel that enabled. This corresponds behavior QSLAC. modify displayed data indicator lighted panel reminder that data displayed longer reflects current value programmed
QSLACIFP
into QSLAC. This indicator goes when value written QSLAC. event that display selection selection same, upon doing write display reverts un-modified value avoid displaying data panel that would inconsistent with actual QSLAC programming. Three reset buttons provided: corresponding QSLAC; Reset Normal Command; Software Reset Command. button causes 60usec wide pulse QSLAC pin. these reset variables displayed program their default (post reset) values defined QSLAC specification. Time Slot controls allow selection highway timeslot. Time slots numbered starting maximum timeslot value that entered function PCLK frequency. Note that these controls program registers QSLAC; other controls panel control which highway-timeslot routed to/from PCM-4 FPGA logic. This discussed more detail Panel section. Beware that timeslot channel specific, highway clockslot applies four channels. Operating Conditions Operating Functions Registers displayed binary values. patterns clicking button below display field. This pops panel containing controls explanations individual bits. must click Write button pattern written into QSLAC. following discussion applies filter coefficient panels. each panels display field with "Read Coeff" button below Clicking button will cause read operation done hexadecimal code read from part will displayed display field. slide switch control causes program enter loop which will continuously send read command display value read. looping stopped when slide control returned position panel dismissed. Pre-defined coefficients setting filter transfer function unity zero provided testing purposes. panels contain additional features. When gain coefficient read back, program performs calculations convert into decibel value which also displayed. Gains entered decimal, format. Three "radio buttons"1 adjacent entry field allow selection format data wish enter.The computer then computes corresponding decimal/dB value displays text display field right. When computer calculates CSDs, exact dB/decimal value also displayed that error relative what entered will apparent. Clicking "Write Coeff" button writes appropriate command data bytes ASLACIF board.
This seems common software engineering terminology this type control. Like mechanically linked station selector buttons old-fashioned radio they mutually exclusive: when click one, previous selection un-selected.
QSLACIFP
"AISN" panel similar filter panels discussed above. also controls bits bit. "Load AmSLAC file" button will search directory where installed QSLACIF program AmSLAC output files. These have names with extension ".ARF". panel pops displaying names files found. click file name then "Select" button load file. Only files produced AMSLAC4 have correct format. Other directories searched typing directory path into file name field panel, clicking file list. program reads selected file, automatically sends necessary commands data bytes program coefficients found AmSLAC file. addition, Operating Function Register automatically modified enable programmed coefficients, Operating Conditions register modified disable loopback modes loss. display fields updated reflect values read from AmSLAC file.
Sequence Definition/Replay Panel
This panel appears along with QSLAC Programming panel. Normally, when button clicked QSLAC Programming Panel, corresponding command sent QSLAC. With controls Sequence Panel, create sequence commands memory then send entire sequence QSLAC pressing button. sequence also stored disk file read back into program later date. This makes repetitive testing easier helps ensure consistency programming QSLAC. following buttons Sequence Panel: Start starts definition sequence. After have clicked this button, command selected from panel appended sequence displayed bottom panel. commands sent ASLACIF board while this occurring. Channel Enable buttons select buttons QSLAC panel disabled while sequence being defined. Channel Enable register commands included into sequence using explicit "Wrt Chan Reg" Reg" buttons panel. This allows define write operation that sets bits desire. Stop stops definition sequence. After have clicked this button, command sent from panel sent ASLACIF board. sequence have defined remains memory display bottom panel. append clicking `Start' button. Clear erases sequence currently memory. Pressing Clear starting over only correcting error sequence. There facilities editing sequence. Save saves sequence into disk file. prompted file name. extension suggested. Load retrieves sequence from disk file. prompted file name.
QSLACIFP
Write sends entire sequence ASLACIF board where temporarily stored FIFO logic sends commands QSLAC DCLK rate spacing that currently selected. (See `PCM' panel.) chip select signals generated according Select buttons programming panel. Thus, sequence programmed into both QSLACs simultaneously.If there read commands sequence, these skipped more than selected because data contention would occur common line. only enabled, reads performed values read displayed sequence. Prior actual read, each byte displayed `-'. channel specific commands sequence will effect those channels currently selected channel enable register defined QSLAC panel unless have placed commands into sequence write Channel Enable Register. Top, Dwn, Bot: these buttons allow scrolling display through sequences that longer than display. display right these buttons shows much total sequence visible position visible portion relative total sequence. While appending sequence, bottom sequence displayed that command seen added. Sequences have number commands, limited memory available program.
View File Button
This button intended used view AmSLAC output files without leaving program. defaults list files having ".ARF" extensions found install directory, browse other directories well text file read. There limit 1000 lines, however. Once file opened remains open till open different file quit program. Dismiss View File panel, then come back open file left
Button
This pops panel which concerned with interface MPI. controls this panel relate registers within FPGA logic which control various signals generated ASLACIF board. There possible formats this panel; which appears depends command line option "-serial". default parallel interface PCM-4. This provides more complete control over PCLK rate timeslots clockslots. "-serial" option used when interfacing Single-DUT ASLACIF board PCM-4 using standard PCM-4 serial interface. this mode PCM-4 provides PCLK which limited 2.048MHz. ASLACIF board does control timeslot selection, that PCM-4. There capability clock slots with "-serial" option. PCLK frequency control allows changing frequency applied PCLK when "-serial" mode use. frequencies available cover range 128KHz 8.192MHz including multiples 1.536MHz 1.544MHz.
QSLACIFP
(For this work ASLACIF board must have 24.576MHz 12.352MHz oscillator modules installed.) When "-serial" option use, PCLK control effect, since clock being provided from PCM-4. Beware that default QSLAC obtains it's MCLK from PCLK expects frequency 8.192MHz. deviate from this must program QSLAC appropriately avoid erroneous results. MCLK frequency controls allows setting frequency clock applied MCLK QSLAC. Beware that default QSLAC obtains it's MCLK from PCLK unless programmed obtain from MCLK pin. QSLAC must also programmed MCLK frequency that coming must also this through Prgm QSLAC panel. DCLK frequency control controls clock that used shift data into QSLAC. timing signal also controlled. control determines number DCLK cycles that stays low, High determines number DCLKs between successive chip selects when sending command followed reading writing more data bytes. (The actual time cycle less than what control says order meet QSLAC timing requirements.) These parameters sent FPGA logic until Send button pressed. Each these panels also contain some controls routing data within FPGA logic. This used select data PCM-4; PCM-4 data both; loop-back data and/or DRB. This external loopback should confused with various loop-back modes that programmed within QSLAC. selected source digital data PCM-4. parallel interface use, then controls provided selecting timeslot/ clockslot transmit clock edge.It also possible loop back digital data from PCM-4 back PCM-4 (DtoD). serial interface use, timeslot/ clockslot controls PCM-4 loop back controls present. controls that select data sources pins allow routing combination data from PCM-4, either and/or DRB. must program timeslots that data contention does occur. Time Slot/ Clock Slot controls operate FPGA logic confused with Time Slot Clock Slot registers within QSLAC. transmit direction, these controls panel refer data stream from DXA(B) QSLAC. They tell FPGA logic where data stream should acquire bits data converted into parallel form digital input PCM-4. receive direction, these controls panel refer data stream DRA(B) QSLAC. They tell FPGA logic where data stream should insert bits data that came from parallel output PCM-4. Obviously make this actually work with QSLAC, timeslot/clock slot values programed here must match those programmed time slot/clock slot registers QSLAC.
QSLACIFP
Xmit Edge control controls which edge PCLK FPGA logic using shift data should program QSLAC edge control match. This pops panel which allows enable disable those lines QSLAC which normally have constantly changing signals them: PCLK, DCLK, MCLK, forced state. DRA, high state. This affects both LNBs. program starts with these lines active.
ReConfig Button
This button will re-initialize FPGAs. FPGA outputs will high amount time this takes. registers within FPGA then re-written software that they contain same values displayed various controls. This button inactive program started with -demo option.
About Button
Pressing this button pops screen where read descriptions changes made software since previous revision. addition, will include warnings about possible problems encounter well helpful information such location useful signals ASLACIF board. There more than screen full information; screen scrolled same View File screen.
QSLACIFP

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