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Advantages of ISP-Based CPLDs

(1) (2) Source: Altera Application Note 85 (In-System Programming Times), April 1997, version 1. Source: Xilinx Application Note XAPP068 In-System Programming Times, January 1997, version 1.1.

Advantages of ISP-Based CPLDs
The Altera® MAX® 9000 and MAX 7000S in-system programmable devices offer designers flexibility, advanced features, and high performance at a low price. Combining these features with the most complete development tools environment offers designers the best solution for their design needs. This technical brief focuses on the programming time, performance, die size, and power consumption advantages of MAX 9000 and MAX 7000S devices. When choosing an in-system programmable device, it is important to evaluate the complete solution. In an effort to show the benefits of MAX 9000 and MAX 7000S devices, Altera Applications recently compared several aspects of the Altera and Xilinx in-system programmable device families. Programming Times Altera MAX 9000 and MAX 7000S devices can be programmed quickly in both production and development environments. In contrast, the device programming times for Xilinx XC9500 devices can be 10 to 50 times higher in development environments than in production environments. According to the Xilinx Application Note XAPP068 In-System Programming Times, this increase is due to the overhead spent in the real-time generation of programming vectors from the JEDEC bitmap, the bandwidth limitations for outputting JTAG vectors, and the time required to erase the device. Table 1 shows the in-system programming times for Xilinx XC9500 and Altera MAX 7000S devices with comparable densities. Table 1. MAX 7000S & XC9500 In-System Programming Times
Notes:
(1) (2) Source: Altera Application Note 85 (In-System Programming Times), April 1997, version 1. Source: Xilinx Application Note XAPP068 In-System Programming Times, January 1997, version 1.1.
Performance When evaluating device performance, it is important to use comparable operating conditions. Altera Applications recently compared the operating frequencies of MAX 7000S and XC9500 devices using equivalent parameters (see Table 2).
M-TB-028-01 ®
ALTERA MEGAFUNCTION PARTNERS PROGRAM
Table 2. Equivalent Performance Parameters
Altera Parameter fCNT fACNT Description Maximum internal global clock frequency Maximum internal array clock frequency Parameter fCNT fSYSTEM Xilinx Description Operating frequency for 16-bit counters Internal operating frequency for generalpurpose system designs spanning multiple function blocks
Device EPM7032S EPM7064S EPM7128S EPM7160S EPM7192S EPM7256S XC9536 XC9572 XC95108 XC95144 XC95180 XC95216 tSU (ns) 4 5 5 6 6 6 4.5 5.5 5.5 5.5 6.5 6.5 tCO (ns) 3.5 4 4 4.5 4.5 4.5 4.5 5.5 5.5 5.5 6.5 6.5 fCNT (MHz) 178.6 151.5 151.5 125 125 125 125 125 125 125 111 111 fSYSTEM (MHz) 178.6 151.5 151.5 125 125 125 100 83 83 83 67 67
Die Size Altera aggressively pursues the most advanced manufacturing processes, enabling designers to benefit from the highest performance devices at the lowest price. For example, Altera has migrated its 128-macrocell device offerings from a 0.8-micron, dual-layer metal process in 1992, to a 0.5-micron, triple-layer metal process in 1997. Migrations allow Altera to continue providing extremely competitive prices. In contrast, the Xilinx XC9500 device family is manufactured on a 0.6-micron, dual-layer metal process. Figure 1 compares the die sizes of the XC95108, EPM7128E, and EPM7128S devices.
Altera Corporation
Figure 1. Die Size Comparison
XC95108 EPM7128E EPM7128S
Relative Die Size: Date Code:
In addition, Altera plans to manufacture the next-generation product-term based family, Michelangelo, on a 0.35-micron, quad-layer metal process beginning in early 1998. Thus, Altera continues to aggressively pursue the most efficient manufacturing process. Power Consumption The Altera MAX 7000S device family offers a power-efficient interconnect structure. In fact, MAX 7000S devices consume less power than XC9500 devices when operating under similar conditions (see Figure 2). Figure 2. MAX 7000S & XC9500 Power Consumption
250 200 ICC Supply Current (mA) 150 100
EPM7128S, Note (5) XC95108, Note (2)
Note (1)
EPM7128S, Note (3) XC95108, Note (4)
50 0 0 25 Frequency (MHz) 50
Notes: (1) Source: Xilinx 1996 Data Book and Altera 1996 Data Book. (2) Power consumption for an XC95108 device set for high performance. (3) Power consumption for an EPM7128S device with the Turbo Bit logic option turned on. (4) Power consumption for an XC95108 device set for low performance. (5) Power consumption for an EPM7128S device set with the Turbo Bit logic option turned off.
Altera Corporation
References The following documents provide more detailed information. The part numbers are in parentheses.
MAX 9000 Programmable Logic Device Family Data Sheet (A-DS-M9000-04) MAX 7000 Programmable Logic Device Family Data Sheet (A-DS-M7000-04) In-System Programmability Handbook (M-HB-ISP-01) In-System Programmability CD-ROM (M-CD-ISP-02)
You can request these documents from:
Altera Literature Services at (888) 3-ALTERA World-wide web site at http://www.altera.com Your local Altera sales representative
Altera Corporation