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Target Applications: Communications Family: FLEX 10K, FLEX 8000 F


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MegaCore Function Parameterized Generator/Checker
Target Applications:
Communications Family: FLEX 10K, FLEX 8000 FLEX 6000 Vendor:
Features
Innovation Drive Jose, 95134 Tel. (408) 544-7000 http://www.altera.com
MegaCorefunction, general-purpose cyclic redundancy code (CRC) generator checker Optimized FLEX® device architecture High-speed operation, over many configurations Fully parameterized, including: length generator polynomial Input data width, from width polynomial initial value Built-in support for: Inverting output data Reflecting (reversing order) input output data Risk-free evaluation with OpenCorefeature available with MAX+PLUS
General Description
MegaCore function general-purpose generator checker that validates data frames ensures that data corruption during transmission detected. function fully parameterized, therefore used virtually design that requires checker. Figure
Figure Symbol
WIDTH= SHIFT="NO" REFIN="NO" REFOUT="NO" WPAR=1
POLY[ XOROUT[ CLOCK ACLR SLOAD RUN_NSHIFT INIT[ DATA_IN[ ENABLE
CRC_OUT[
Functional Description
function validates data streams redundant encoding. Similar parity checking, encoding method generating code verify integrity data stream. However, while parity checking uses indicate even parity, encoding uses multiple bits, therefore more likely catch errors data stream.
Altera Corporation
A-SB-030-01
ALTERA MEGAFUNCTION PARTNERS PROGRAM
MegaCore
MegaCore Function Parameterized Generator/Checker
CRCs particularly effective reasons:
CRCs provide excellent protection against common errors such burst errors, which consecutive bits data stream corrupted during transmission. original data first part transmission, which makes systems that CRCs easy understand implement.
Because function fully parameterized, virtually algorithm implemented using parameters available with this function. maximize flexibility, function also allows designers port values, e.g., initial register values init[] input. designer define size function's generator polynomial meet design specifications. larger polynomial length, greater chance transmission error detection. vector generation program, available with function, same parameters function generates vector files verify operation.
Performance
Table lists sample function performance logic cell usage.
Table Sample MegaCore Function Performance Logic Cell Usage
Configuration with FLEX Devices Note
CRC-32 generator polynomial CRC-16/CCITT generator polynomial 32-bit wide Input 8-bit wide input 1-bit wide input 16-bit wide input 8-bit wide input 1-bit wide input Notes:
When calculating performance, fastest speed grade from FLEX 10K, FLEX 8000, FLEX 6000 device families used. size performance function will vary depending logic synthesis settings, device fitting, chosen polynomial.
Size (LEs) Note
Performance (MHz) Note
>125 >125
Performance (Mbits/s)
>125 1200 >125
MegaCore Function Parameterized Generator/Checker Data Sheet more information.
Reference
Williams, Ross Painless Guide Error Detection Algorithms. Version Hazelwood Park, Australia: Rocksoft Ltd, 1996. This document explains CRCs their table-driven implementations, also provides generic parameterized model algorithm. more information, Rocksoft world-wide site http://www.rocksoft.com.
Innovation Drive Jose, 95134 (408) 544-7000 http://www.altera.com
Copyright 1997 Altera Corporation. Altera, FLEX, FLEX 10K, FLEX 8000, FLEX 6000, MAX, MAX+PLUS, MAX+PLUS OpenCore, MegaCore trademarks and/or service marks Altera Corporation United States other countries. Other brands products trademarks their respective holders. specifications contained herein subject change without notice. Altera assumes responsibility liability arising application information, product, service described herein except expressly agreed writing Altera Corporation. Altera customers advised obtain latest version device specifications before relying published information before placing orders products services. rights reserved.
Altera Corporation

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