Logarithmic Response CMOS Image Sensor with On-Chip Calibration S

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Logarithmic Response CMOS Image Sensor with On-Chip Calibration S

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IEEE JOURNAL SOLID-STATE CIRCUITS, VOL. AUGUST 2000
Logarithmic Response CMOS Image Sensor with On-Chip Calibration
Spyros Kavadias, Member, IEEE, Bart Dierickx, Danny Scheffer, Andre Alaerts, Dirk Uwaerts, Bogaerts
Abstract-CMOS image sensors with logarithmic response attractive devices applications where high dynamic range required. Their strong point high dynamic range. Their weak point sensitivity pixel parameter variations introduced during fabrication. This gives rise considerable fixed pattern noise (FPN) that deteriorates image quality unless pixel calibration used. present work technique remove employing on-chip calibration introduced, where effect threshold voltage variations pixels cancelled. image sensor based active pixel structure with five transistors been designed, fabricated, tested. sensor consists pixels measuring fabricated 0.5- CMOS process. measured dynamic range while 2.5% output signal range. Index Terms-Active pixel sensor, CMOS image sensor, fixed pattern noise correction, logarithmic response.
INTRODUCTION RECENT YEARS CMOS image sensors have started attract attention field electronic imaging that previously dominated charge-coupled devices (CCD's). reason only related economic considerations also potential realizing devices with imaging capabilities achievable with CCD's. applications where scene light intensity varies over wide range, dynamic range characteristic that makes CMOS image sensors attractive comparison with CCD's. example typical scene encountered outdoor environment where light intensity varies over wide range, example, decades (120 dB). Image sensors with logarithmic response offer solution such applications. logarithmic-response image sensors photocurrent resistor with logarithmic current-voltage characteristic. This resistor implemented with transistor operating weak inversion region [1]. resulting voltage logarithmically related light intensity, therefore signal compression performed pixel level. Such sensors usually exhibit dynamic range beyond major drawback logarithmic sensors their sensitivity device parameter variations. most critical parameter threshold voltage transistors. These variations fabrication process they introduce offset signal each pixel. These offsets give rise fixed pattern noise (FPN). This appears time-invariant additive noise every image, corrupt
Manuscript received August 1999; revised February 2000. authors with IMEC, 3001 Leuven, Belgium (e-mail: kavadias@ imec.be; dierickx@imec.be; scheffer@imec.be; alaertsa@imec.be; uwaerts@ imec.be; bogaertj@imec.be). Publisher Item Identifier 0018-9200(00)06446-5.
image quality. employing off-chip cancellation using external memory, offsets removed. integrating sensors greatly reduced means offset subtraction using correlated double sampling. this case, photocurrent integrated photodiode capacitance over frame period resulting pixel output stored. Then, through action switch, collected charge removed, thus resetting pixel. subtracting pixel levels offsets introduced from threshold voltage variations removed. However, logarithmic sensors each pixel provides continuous conversion light intensity into voltage there concept "reset level." Therefore, offsets cannot removed on-chip unless different procedure devised. other hand, integrating sensors dynamic range increased employing compression techniques. sensor with wide dynamic range using stepped-reset-gate voltage technique been presented [2], achieving 0.24%. this approach signal compression achieved pixel. limited number methods suppress on-chip calibration logarithmic sensors have appeared literature. [3], suppression performed programming offset inside three-transistor pixel exploiting carrier degradation. This resulted acceptable 5-mV peak-to-peak FPN, driving signals with high voltages necessary together with long stressing times, thus making this scheme difficult utilize. Another approach [4], been introduced where offset stored capacitor each pixel using calibration process that based reference current. 3.3% decade reported expense relatively large pixels technology). this work sensor with on-chip in-pixel calibration presented. calibration method been introduced together with simulation results. Here, calibration method analyzed results from sensor that utilizes this method given. advantage this device that offsets suppressed while transistor count pixel kept low. sensor based five transistor pixels realized 0.5- CMOS technology employing pixels. pixel pitch photodiode employs structure that results pixels with high fill factor parasitic capacitance [7]. basic principle offset removal calibration each pixel against reference current place normal diode photocurrent. pixel levels become available that correspond photocurrent known reference current respectively. With this method, offsets threshold voltage variations removed double-sampling technique. This performed column amplifiers where special care been taken order minimize additional offsets [8].
0018-9200/00$10.00 2000 IEEE
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where gate source voltages respectively threshold voltage. Parameters process dependent with depending also dimensions voltage thermal voltage reverse current photodiode, photocurrent good approximation voltage output node
Fig. Pixel schematic. Current sources same column. common pixels
sensor includes output stage with digitally programmable gain that provides video signal cables, digital bits. following sections present calibration technique, implementation sensor, measurement results. Section principle analysis calibration technique given. Section provides implementation details pixels, calibration, column amplifiers. Section measurement results given revealing improvements achieved with calibration technique together with limitations. Finally, Section provides summary. ON-PIXEL CALIBRATION integrating sensors availability output levels every pixel allows offset removal double sampling. other hand, logarithmic sensors continuous conversion light into voltage does allow offset removal double sampling unless appropriate second pixel level introduced stimulating pixel with signal other than photocurrent. sensor discussed here, second pixel level useful offset removal obtained instead photocurrent known current applied. will shown below, difference between corresponding pixel levels free from offsets MOSFET threshold voltage variations. active pixel performing such operation shown Fig. together with connectivity. metal lines indicated common pixels lying same column, each therefore, there current source load photodiode. When column. Transistor switched pixel connected column line operates driver source follower biased Then, Transistor used calibration source connects photosensitive node gate calibration readout sensor proceed follows. First, selected pulsing high corresponding signal indicated Fig. Thus, only pixel each column connected corresponding column line. While keeping output pixel sampled stored adjaconducts photocurrent cent column amplifier. Because which limited small values, operates weak inversion. approximated current that flows through
threshold voltage where transconductance parameter. This equation relates logarithmically pixel output with light intensity which sampled proportional photocurrent. After pulsed high additional current flows stored, Provided that much higher than phothrough operates strong inversion output tocurrent, This voltage where transconductance parameter again sampled column amplifier subtracted from result
where threshold voltages pixel transistors have effect. soon result above computation available output every column amplifier, readout selected begins. This done consecutively connecting output each column amplifier sensor's output. soon whole read, next selected, calibrated, read. From implied that offsets threshold voltage variations pixel array removed. This most important source FPN. However, offsets variations other parameters still present. Variations reverse current, doping densities, gate-oxide thickness most important reasons that give rise parameter variations still affecting result (4). III. IMPLEMENTATION sensor based pixel described above been designed, fabricated using standard CMOS technology with 0.5- minimum feature size, finally, tested. consists array pixels with dimensions column amplifiers, calibration current sources, vertical horizontal shift registers column selection, output stage, 8-bit flash analog-to-digital converter (ADC). This section describes actual implementation pixels, calibration sources, column amplifiers. Then, general architecture sensor given.
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Fig. Implementation calibration source capacitor
Fig. using transistor
Pixel Structure pixel schematic similar shown Fig. order obtain high fill factor while keeping photodiode capacitance small, special structure used [7]. sensor made twin-well p-substrate process. photodiode formed from junction n-well with p-substrate. source drain diffusions located higher doped p-well. Because difference doping between p-well lighter doped epitaxial layer underneath well, there small effective electrostatic barrier about meV. This barrier absent n-well/p junction photodiode. electrons which generated light epitaxial layer will diffuse until they reach photodiode where they collected. this photodiode collects almost electrons which generated substrate underneath pixel. only limiting factor opaque metallization layers. photodiode node capacitance been measured using test structure. When calibration current longer applied, pixel voltage returns level determined photocurrent expressed with short time constant. time constant photodiode node proportional total capacitance inversely proportional photocurrent weakly inverted. This fact that long weak inversion transconductance proportional current switched flowing through transistor terminals. Soon after enters weak inversion region operation off, that region that mainly determines transient photodiode node. Even light levels where photocurrent order some femtoamperes, effective time constant milliseconds. Such time constant allows operation with rates like frames/s required video signal. This short time constant also benefits capturing time-varying signals. Calibration Source Pixel Operation order avoid introduction extra offsets vari, must constant from ations reference current column column. solution that been adopted present design realization current source with switched capacitor because capacitors well-reproducible devices CMOS technology. pixel schematic together with calibration source shown Fig. current source transistor This realized with capacitor
Fig. Simulation results pixel output during calibration various light intensities differing decade from each other. Each column biased with light intensities reverse current photodiode responsible decreased sensitivity. sampling instants also indicated.
transistor operates switch controlled complementary signal Fig. shows simulation pixel output during calibration. After selection complete first pixel level sampled stored. Then, pulsed high short period time. nanoseconds later, second pixel level sampled. Monte Carlo simulations confirmed that difference these levels free from offsets threshold voltage variations. Here, must point that second pixel level differs asfrom that given (3). This happens because (3), sumed operating strong inversion conducting constant current. With current implementation calibration source actual case somehow different. analytical expression pixel output during calibration process cannot derived. This obtained only simulation. However, provides good insight order estimate parameters that affect signal. Column Amplifiers column amplifier must perform following tasks: sample second sample store first pixel level compute amplify their difference. This must level done while introducing minimum offset otherwise column-wise introduced. schematic column amplifier shown Fig. first stage provides column current followed sampling capacitor. amplifier follows, next stage circuit computation difference appearing (4). This part circuit been presented introduces very small offset. Here will briefly described. operation column amplifier divided states. driving pulses shown Fig. together with pixel
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Fig. Schematic column amplifier. Node column output (indicated also Fig. Switch controlled from horizontal shift register selects column connected output (sens_out). current source output line together with transistor selected column amplifier make source follower.
process dependent parameters. voltage other terminal capacitor during first state equal pixel increased threshold voltage Thereoutput appears across fore, voltage difference terminals Then, second state follows, nanoseconds after that pulsed high short time period. This shown signal Figs. First, second level sampled. Now, s_ampl setting gain amplifier
open loop gain operational amplifier where chosen order shown Fig. Capacitor values obtain zero frequency gain output amplifier then
Fig. Simplified timing diagram driving pulses column amplifiers. output pixel calibration pulse also plotted.
output. First, long first pixel level sampled. This voltage (2). During this period gain amplifier keeping s_ampl high (switch closed). also closed forcing gate transistor Switches potential such current through equal easily found that this potential current through
Effectively amplifier delivers amplified difference pixel levels. During second state, switches closed while opened, thus operates driver source follower biased current source edge sensor's output (sens_out). output this source follower found
threshold voltages where respectively, channel widths lengths corresponding transistors middle term depends process-varying parameters. With ratios transistors right choice influence this term kept resulting reduction column-wise FPN. Also zero frequency gain
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Fig. General architecture completed chip.
Fig. Response sensor function light intensity sensor level. gain output amplifier Monochromatic light with wavelength been used.
Fig. Chip photograph. completed sensor packaged standard 68-pin package.
amplifier determined mainly capacitor ratio that wellreproducable among columns. General Architecture Fig. shows general architecture chip. Fig. shown photograph chip. consumes silicon area output stage with appropriate timing provides video signals through outputs. suitable driving 40-pF load other load which standard input impedance monitor. amplifier with digitally controlled gain included, programmable 2-bit word. offset analog outputs adjusted digitally 4-bit word allowing implementation automatic gain control. 8-bit digital output provided from flash ADC. timing signals driving shift registers output stage provided externally. MEASUREMENT RESULTS DISCUSSION Fig. shows response function light intensity sensor. sensor sensitive more than decades (120 light intensity which design objective. Sensitivity observed even light intensities order lux. which corresponds small pixel capacitance even those light levels
Fig. Image with wide intrascene dynamic range captured with sensor.
sensor still operational capable capturing time-varying scenes, rate frames/s. lower part curve limited reverse current photodiode while upper part observe saturation limitations imposed measurement equipment. However, vicinity saturation expected available output voltage swing considered. Fig. shows image with wide intrascene dynamic range captured using digital output. observe that image degraded blooming smear. Both temporal noise have been measured. Temporal noise measured monitoring signal from certain pixel under constant illumination. This noise value 0.75% total signal swing room temperature. estimated standard deviation pixel output across array when sensor exposed uniform illumination. This measured 2.5% total signal swing. contribution column-wise estimated calculating standard deviation mean value over each column. This results 0.7% signal swing. Table summarizes most important charactersistics sensor.
KAVADIAS al.: LOGARITHMIC RESPONSE CMOS IMAGE SENSOR
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TABLE CHARACTERISTICS MEASURED IMAGE SENSOR
Clearly, most remaining nonuniformities present pixels. calibration removes offsets threshold voltage variations across pixel array. However, expected, other sources offsets still present. these offsets process-dependent. These attributed photodiode response light, reverse-current variations, sensitivity each pixel. uniformly bright scene neglecting moment effect reverse currents, currents arising from photodiodes across pixel array perfectly equal because photodiodes perfectly matched mainly doping nonuniformities. Including again effect reverse currents these variations become wider. These effects pronounced because small dimensions photodiode. Also, sensitivity pixels which relative output change change impinging light power plays important role. Again, process-induced variations, sensitivity constant across pixel array. calibration process performed current regime different than actual operating conditions, thus second-order sources will still present. This does allow removal residual offsets. Therefore, with presented calibration technique cannot reduced further given process pixel size. Such source body-effect nonuniformity between pixels. body effect responsible between change threshold voltages transistors operation phases. threshold voltages equal ones appearing different biasing between sampling points. From Fig. concluded that this voltage difference limited approximately threshold voltage shifts evaluated using simple MOST model result that they neglected first-order analysis presented Section However, they still consist second-order source because their dependence substrate doping through gamma factor. nonuniform doping concentration across pixel array gives rise nonuniform threshold-voltage shifts. These voltage shifts small compared with actual voltages involved discussed already most importantly, modern CMOS technologies control doping very good, making gamma-factor nonuniformities negligible. Even presence remaining 2.5% total signal swing, reduction that been achieved considerable improvement. logarithmic sensor typical variation pixel output threshold voltage variation across
Fig.
Image captured with logarithmic sensor with calibration.
wafer usually order [1], [9]. This roughly corresponds voltage swing caused when light power changed decade. With such levels images useless unless external calibration performed. Fig. shows image captured with logarithmic sensor without calibration. sensor used here (Fuga 15d), similar pixel count (512 512) pixels with dimensions 12.5 12.5 scene similar shown Fig. direct comparison. Image quality much poorer this attributed calibration process that performed image Fig. SUMMARY Logarithmic-response image sensors handle high ranges light intensities they suffer from sensitivity variations pixel parameters introduced during fabrication. continuous nature light conversion into voltage, doublesampling techniques order suppress directly applicable case linear sensors. This effect increased compared with sensors having linear response, making uncalibrated images useless. this paper, logarithmic-response image sensor with 120-dB dynamic range been presented employing on-chip calibration technique. makes pixels with five transistors, thus high resolution achievable while keeping total chip area reasonable. chip realized using CMOS technology with 0.5- minimum feature size. calibration performed sampling pixel output levels, level corresponding reference current level corresponding photocurrent. subtracting these levels significant suppression achieved. This method removes variations threshold voltages across pixel array. used photodiode structure allows obtain high fill factor while keeping total pixel capacitance small. This fact very important implications device operation. Even
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light levels, calibration process effective. camera operates even when light power sensor level column amplifiers have been designed order introduce minimum offset, thus keeping column-wise low. They capable sampling pixel levels, computing amplifying their difference. resulting column-wise 0.7% total signal swing while total 2.5%. remaining variations pixel parameters attributed device parameters other than threshold voltages. sensor incorporates 8-bit digital output analog outputs driving 40-pF load. Although image quality good integrating linear response sensors, still acceptable variety applications, such applications where high dynamic range involved requiring compact, low-cost system with high resolution, cosmetic quality image being major issue, example, machine vision applications. REFERENCES
Dierickx, Scheffer, Meynants, Ogiers, Vlummens, "Random addressable active pixel image sensors," Proc. SPIE Advanced Focal Plane Arrays Electronic Cameras, Europto Berlin 1996, vol. 2950, 2-7. Decker, McGrath, Brehmer, Sodini, CMOS imaging array with wide dynamic range pixels column-parallel digital output," IEEE Solid-State Circuits, vol. SC-33, 2081-2091, Dec. 1988. Ricquer Dierickx, "Active pixel CMOS image sensor with on-chip nonuniformity correction," Proc. IEEE Workshop ChargeCoupled Devices Advanced Image Sensors, Dana Point, Apr. 20-22, 1995. Loose, Meier, Schemmel, "CMOS image sensor with logarithmic response self calibrating fixed pattern noise correction," Proc. SPIE Advanced Focal Plane Arrays Electronic Cameras, vol. 3410, Bernard, Ed., 1998, 117-127. "Self-calibrating logarithmic CMOS image sensor with single chip camera functionality," Proc. IEEE Workshop Charge-Coupled Devices Advanced Image Sensors, Karuizawa, Japan, June 1999, 191-194. Kavadias, Dierickx, Scheffer, "On-chip offset calibrated logarithmic response image sensor," Proc. IEEE Workshop ChargeCoupled Devices Advanced Image Sensors, Karuizawa, Japan, June 1999, 68-71. Dierickx, Meynants, Scheffer, "Near 100% fill factor CMOS active pixels," Proc. IEEE Workshop Charge-Coupled Devices Advanced Image Sensors, Brugge, Belgium, 1997, "Offset-free offset correction active pixel sensors," Proc. IEEE Workshop Charge-Coupled Devices Advanced Image Sensors, Brugge, Belgium, 1997, R13. Ricquer Dierickx, "Random addressable CMOS image sensors industrial applications," Sensors Actuators vol. 29-35, 1994.
Bart Dierickx received M.S. Ph.D. degrees electronic engineering from Catholic University Leuven, Belgium, 1983 1990, respectively. Until recently IMEC, Leuven, heading group specialized CMOS image design. co-founded company FillFactory, Mechelan, Belgium, which spin-off this activity.
Danny Scheffer graduated electrical engineering from Technical University, Eindhoven, Netherlands, 1993. 1994 joined IMEC, Leuven, Belgium, where currently working design development CMOS image sensors. experience field CCD's, large format CMOS image sensors, optical characterization CMOS processes, infrared imaging.
Andre Alaerts born Leuven, Belgium, August 1956. received electronic engineering degree 1978 from Group High School, Leuven. started working ESAT group been with IMEC, Leuven, since 1986. experience development optimization color filter technology IMEC Project Manager different color filter projects. Coordinator color filter depositing wafers third parties. also experience design development CMOS imager driving systems. expert optical measurements CMOS imagers. tasks also include general support members group, packaging, mechanical design, testing test structures, maintenance lab.
Dirk Uwaerts received industrial engineering degree from Groep High School, Leuven, Belgium, 1977. Project Test Measurement Engineer Image Sensors Research Group, IMEC, Leuven. currently involved electro-optical characterization image sensors Project Manager several projects that apply CMOS image sensors space.
Spyros Kavadias (S'91-M'97) graduated from Physics Department, University Athens, Athens, Greece, 1990. completed Ph.D. degree Microelectronics Institute, NSCR Demokritos, Athens, 1996 field integrated detectors X-rays charged particles. Since 1997 been with IMEC, Leuven, Belgium, working development CMOS image sensors readout electronics infrared sensors. current interests areas mixed mode design CMOS sensor applications, CMOS image sensors infra-read imaging with bolometer arrays.
Bogaerts received M.S. degree electrical engineering (microelectronics) 1997 from Katholieke Universiteit Leuven, Belgium. currently working Ph.D. student IMEC, supported Flemish Institute Support Scientific Technological Research Industry (IWT). research interests include CMOS image sensors radiation effects optical sensors.

Logarithmic Response CMOS Image Sensor with On-Chip Calibration S

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