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AN2232C-01 Command Processor MPSSE Host Emulation Modes
Future Technology Devices International Ltd. 2005
AN2232C-01 Command Processor MPSSE Host Emulation Modes
Command Processor MPSSE Host Emulation
Overview
FT2232C incorporates command processor called Multi-Protocol Synchronous Serial Engine (MPSSE). purpose MPSSE command processor communicate with devices which synchronous protocols (such JTAG SPI) efficient manner. FT2232C's Host Emulation mode also uses MPSSE technology make chip emulate standard 8048/8051 host bus. MPSSE Command Processor unit controlled using SETUP command. Various commands used clock data into chip, well controlling other lines. disabled MPSSE held reset will have effect rest chip. When enabled, will take commands data from data written pipe chip. This done simply using normal WRITE command, data were being writen port. data read will passed back normal pipe. This done using normal READ command, data were being read from port.
Future Technology Devices International Ltd. 2005
Data Clock Definition
Data Clock Definition
Data Defintion
Data bits defined according following table:
Data
Bit0 Bit1 Bit2 Bit3 Bit4 Bit5 Bit6 Bit7 Bit8 Bit9 Bit10 Bit11
Signal
TCK/SK TDI/DO TDO/DI TMS/CS GPIOL1 GPIOL2 GPIOL3 GPIOL4 GPIOH1 GPIOH2 GPIOH3 GPIOH4
FT2232C
ADBUS0 ADBUS1 ADBUS2 ADBUS3 ADBUS4 ADBUS5 ADBUS6 ADBUS7 ACBUS0 ACBUS1 ACBUS2 ACBUS3
Type
Output Output Input Output Input/Output Input/Output Input/Output Input/Output Input/Output Input/Output Input/Output Input/Output
Description
Clock Signal Output Serial Data Serial Data Select Signal General Purpose General Purpose General Purpose General Purpose General Purpose General Purpose General Purpose General Purpose
Future Technology Devices International Ltd. 2005
AN2232C-01 Command Processor MPSSE Host Emulation Modes
Clock Operation
clock will current state TCK/SK twice. This means that clock low, then clock will high then clock cycle. clock were high, then clock will then high clock cycle.
Future Technology Devices International Ltd. 2005
Command Definitions
Command Definitions
Commands
device detects command will send back bytes 0xFA, followed command byte. data sequence then this used determine what that first pattern that error detected. error have occurred before this (for example sending wrong amount data after write command) will only trigger when rogue command high.
Future Technology Devices International Ltd. 2005
AN2232C-01 Command Processor MPSSE Host Emulation Modes
Data Shifting Command Overview
data shifting commands made following definitions
Data
Definition
TCK/SK write mode else byte mode TCK/SK read first else first write TDI/DO read TDO/DI write TMS/CS
write commands TDI/DO take effect when bits '0'. Read TDO/DI will operate with TMS/CS output TDI/DO output own.
Future Technology Devices International Ltd. 2005
Command Definitions
3.3.1
First
Clock Data Bytes Clock Edge First Read)
TCK/SK starts '1'. 0x10, LengthL, LengthH, Byte1 Byte65536 (max) This will clock bytes TDI/DO from 65536 depending Length bytes. length 0x0000 will byte, length 0xFFFF will 65536 bytes. data sent first. first byte placed TDI/DO then TCK/SK clocked. data will change next rising edge TCK/SK pin.
Future Technology Devices International Ltd. 2005
AN2232C-01 Command Processor MPSSE Host Emulation Modes
3.3.2
Clock Data Bytes Clock Edge First read)
TCK/SK starts '0'. 0x11, LengthL, LengthH, Byte1 Byte65536 (max) This will clock bytes TDI/DO from 65536 depending Length bytes. length 0x0000 will byte length 0xFFFF will 65536 bytes. data sent first. first byte placed TDI/DO then TCK/SK clocked. data will change next falling edge TCK/SK pin.
Future Technology Devices International Ltd. 2005
Command Definitions
3.3.3
Clock Data Bits Clock Edge First Read)
TCK/SK starts '1'. 0x12, Length, Byte1 This will clock bits TDI/DO from depending Length byte. length 0x00 will length 0x07 will bits. data sent first. data byte placed TDI/DO then TCK/SK clocked. data will change next rising edge TCK/SK pin.
Future Technology Devices International Ltd. 2005
AN2232C-01 Command Processor MPSSE Host Emulation Modes
3.3.4
Clock Data Bits Clock Edge First Read)
TCK/SK starts '0'. 0x13, Length, Byte1 This will clock bits TDI/DO from depending Length byte. length 0x00 will length 0x07 will bits. data sent first. data byte placed TDI/DO then TCK/SK clocked. data will change next falling edge TCK/SK pin.
Future Technology Devices International Ltd. 2005
Command Definitions
3.3.5
Clock Data Bytes Clock Edge First Write)
0x20, LengthL, LengthH This will clock bytes TDO/DI from 65536 depending Length bytes. length 0x0000 will byte length 0xFFFF will 65536 bytes. first clocked will first byte data will sampled rising edge TCK/SK pin.
Future Technology Devices International Ltd. 2005
AN2232C-01 Command Processor MPSSE Host Emulation Modes
3.3.6
Clock Data Bytes Clock Edge First Write)
0x24, LengthL, LengthH This will clock bytes TDO/DI from 65536 depending Length bytes. length 0x0000 will byte length 0xFFFF will 65536 bytes. first clocked will first byte data will sampled falling edge TCK/SK pin.
Future Technology Devices International Ltd. 2005
Command Definitions
3.3.7
Clock Data Bits Clock Edge First Write)
TDO/DI sampled just prior rising edge 0x22, Length This will clock bits TDO/DI from depending Length byte. length 0x00 will length 0x07 will bits. data will shifted that first from downwards depending number bits shift (i.e. length will have data sampled byte sent back PC). data will sampled rising edge TCK/SK pin.
Future Technology Devices International Ltd. 2005
AN2232C-01 Command Processor MPSSE Host Emulation Modes
3.3.8
Clock Data Bits Clock Edge First Write)
TDO/DI sampled just prior falling edge 0x26, Length This will clock bits TDO/DI from depending Length byte. length 0x00 will bit, length 0x07 will bits. data will shifted that first from downwards depending number bits shift (i.e. length will have data sampled byte sent back PC). data will sampled falling edge TCK/SK pin.
Future Technology Devices International Ltd. 2005
Command Definitions
3.3.9
Clock Data Bytes First
positive edge, positive edge 0x30, LengthL, LengthH, Byte1, Byte65536 (max) negative edge, positive edge 0x31, LengthL, LengthH, Byte1 Byte65536 (max) positive edge, negative edge 0x34, LengthL, LengthH, Byte1 Byte65536 (max) negative edge, negative edge 0x35, LengthL, LengthH, Byte1 Byte65536 (max)
Future Technology Devices International Ltd. 2005
AN2232C-01 Command Processor MPSSE Host Emulation Modes
3.3.10 Clock Data Bits First
positive edge, positive edge 0x32, Length, Byte negative edge, positive edge 0x33, Length, Byte positive edge, negative edge 0x36, Length, Byte negative edge, negative edge 0x37, Length, Byte
Future Technology Devices International Ltd. 2005
Command Definitions
3.4.1
First
Clock Data Bytes Clock Edge First Read)
TCK/SK starts 0x18, LengthL, LengthH, Byte1, Byte65536 (max) This will clock bytes TDI/DO from 65536 depending Length bytes. length 0x0000 will byte length 0xFFFF will 65536 bytes. data sent first. first byte placed TDI/DO then TCK/SK clocked. data will change next rising edge TCK/SK pin.
Future Technology Devices International Ltd. 2005
AN2232C-01 Command Processor MPSSE Host Emulation Modes
3.4.2
Clock Data Bytes Clock Edge First Read)
TCK/SK starts '0'. 0x19, LengthL, LengthH, Byte1, Byte65536 (max) This will clock bytes TDI/DO from 65536 depending Length bytes. length 0x0000 will byte length 0xFFFF will 65536 bytes. data sent first. first byte placed TDI/DO then TCK/SK clocked. data will change next falling edge TCK/SK pin.
Future Technology Devices International Ltd. 2005
Command Definitions
3.4.3
Clock Data Bits Clock Edge First Read)
TCK/SK starts '1'. 0x1A, Length, Byte1 This will clock bits TDI/DO from depending Length byte. length 0x00 will length 0x07 will bits. data sent first. data byte placed TDI/DO then TCK/SK clocked. data will change next rising edge TCK/SK pin.
Future Technology Devices International Ltd. 2005
AN2232C-01 Command Processor MPSSE Host Emulation Modes
3.4.4
Clock Data Bits Clock Edge First Read)
TCK/SK starts '0'. 0x1B, Length, Byte1 This will clock bits TDI/DO from depending Length byte. length 0x00 will length 0x07 will bits. data sent first. data byte placed TDI/DO then TCK/SK clocked. data will change next falling edge TCK/SK pin.
Future Technology Devices International Ltd. 2005
Command Definitions
3.4.5
Clock Data Bytes Clock Edge First Write)
0x28, LengthL, LengthH This will clock bytes TDO/DI from 65536 depending Length bytes. length 0x0000 will byte length 0xFFFF will 65536 bytes. first clocked will first byte data will sampled rising edge TCK/SK pin.
Future Technology Devices International Ltd. 2005
AN2232C-01 Command Processor MPSSE Host Emulation Modes
3.4.6
Clock Data Bytes Clock Edge First Write)
0x2C, LengthL, LengthH This will clock bytes TDO/DI from 65536 depending Length bytes. length 0x0000 will byte length 0xFFFF will 65536 bytes. first clocked will first byte data will sampled falling edge TCK/SK pin.
Future Technology Devices International Ltd. 2005
Command Definitions
3.4.7
Clock Data Bits Clock Edge First Write)
TDO/DI sampled just prior rising edge 0x2A, Length This will clock bits TDO/DI from depending Length byte. length 0x00 will length 0x07 will bits. data will shifted down that first from upwards depending number bits shift (i.e. length will have data sampled byte sent back PC). data will sampled rising edge TCK/SK pin.
Future Technology Devices International Ltd. 2005
AN2232C-01 Command Processor MPSSE Host Emulation Modes
3.4.8
Clock Data Bits Clock Edge First Write)
TDO/DI sampled just prior falling edge 0x2E, Length This will clock bits TDO/DI from depending Length byte. length 0x00 will length 0x07 will bits. data will shifted down that first from upwards depending number bits shift (i.e. length will have data sampled byte sent back PC). data will sampled falling edge TCK/SK pin.
Future Technology Devices International Ltd. 2005
Command Definitions
3.4.9
Clock Data Bytes First
positive edge, positive edge 0x38, LengthL, LengthH, Byte1, Byte65536 (max) negative edge, positive edge 0x39, LengthL, LengthH, Byte1, Byte65536 (max) positive edge, negative edge 0x3C, LengthL, LengthH, Byte1, Byte65536 (max) negative edge, negative edge 0x3D, LengthL, LengthH, Byte1, Byte65536 (max)
Future Technology Devices International Ltd. 2005
AN2232C-01 Command Processor MPSSE Host Emulation Modes
3.4.10 Clock Data Bits First
positive edge, positive edge 0x3A, Length, Byte negative edge, positive edge 0x3B, Length, Byte positive edge, negative edge 0x3E, Length, Byte negative edge, negative edge 0x3F, Length, Byte
Future Technology Devices International Ltd. 2005
Command Definitions
3.5.1
Commands
Clock Data TMS/CS Read)
0x4A 0x4B, Length, Byte1 This will send data bits down TMS/CS using TCK/SK, depending which lower bits have been set. 0x4A 0x4B TMS/CS with first TCK/SK edge TCK/SK TMS/CS with first TCK/SK edge TCK/SK
Byte1 passed TDI/DO before first TCK/SK TMS/CS held static duration TMS/CS clocking. read operation will take place.
Future Technology Devices International Ltd. 2005
AN2232C-01 Command Processor MPSSE Host Emulation Modes
3.5.2
Clock Data TMS/CS with Read
0x6A 0x6B 0x6E 0x6F Length, Byte1 This will send data bits down TMS/CS using TCK/SK, depending which lower bits have been set. 0x6A 0x6B 0x6E 0x6F TMS/CS with first TCK/SK edge, read edge TCK/SK TMS/CS with first TCK/SK edge, read edge TCK/SK TMS/CS with first TCK/SK edge, read edge TCK/SK TMS/CS with first TCK/SK edge, read edge TCK/SK
Byte1 passed TDI/DO before first TCK/SK TMS/CS held static duration TMS/CS clocking. TDO/DI sampled duration TMS/CS byte containing data passed back TMS/CS clocking.
Future Technology Devices International Ltd. 2005
Command Definitions
3.6.1
Read Data Bits High Bytes
Data Bits Byte
0x80, 0xValue, 0xDirection This will setup direction first lines force value bits that output. Direction byte will make that output.
Future Technology Devices International Ltd. 2005
AN2232C-01 Command Processor MPSSE Host Emulation Modes
3.6.2
Data Bits High Byte
0x82, 0xValue, 0xDirection This will setup direction high lines force value bits that output. Direction byte will make that output.
Future Technology Devices International Ltd. 2005
Command Definitions
3.6.3
Read Data Bits Byte
0x81 This will read current state first pins send back byte.
Future Technology Devices International Ltd. 2005
AN2232C-01 Command Processor MPSSE Host Emulation Modes
3.6.4
Read Data Bits High Byte
0x83 This will read current state high pins send back byte.
Future Technology Devices International Ltd. 2005
Command Definitions
3.7.1
Loopback Commands
Connect TDI/DO TDO/DI Loopback
0x84 This will connect TDI/DO output TDO/DI input loopback testing.
Future Technology Devices International Ltd. 2005
AN2232C-01 Command Processor MPSSE Host Emulation Modes
3.7.2
Disconnect TDI/DO TDO/DI Loopback
0x85 This will disconnect TDI/DO output from TDO/DI input loopback testing.
Future Technology Devices International Ltd. 2005
Command Definitions
3.8.1
Clock Divisor
TCK/SK Divisor
0x86, 0xValueL, 0xValueH This will clock divisor. TCK/SK always duty cycle 50%, except between commands where will remain initial state. initial state using Data Bits Byte command. example, JTAG mode would issue:$80 Data Bits Byte TCK/SK, TDI/DU low, TMS/CS high TCK/SK, TDI/DU, TMS/CS output, TDO/D1 GPIOL1 input
clock will then start low. When MPSSE sent command clock bits bytes) will make clock high then back again clock period. TMS/CS commands, command would used read, command TMS/CS with read. clocking data TDI/DU with read TDO/D1, command would used bytes bits. read from TDO/D1 with data sent TDI/DU command would used bytes bits. scan same time command would used bytes bits. TCK/SK frequency worked using following algorithm TCK/SK period 12MHz +[(0xValueH 256) 0xValueL] example: Value 0x0000 0x0001 0x0002 0x0003 0x0004 0xFFFF TCK/SK 91.553
Future Technology Devices International Ltd. 2005
AN2232C-01 Command Processor MPSSE Host Emulation Modes
Instructions Host Emulation Mode
Overview
Host Emulation mode makes chip emulate with: multiplexed address data extended address signals lines that used extra wait IRQs. These defined I/O0 I/O1.
Future Technology Devices International Ltd. 2005
Instructions Host Emulation Mode
Host Emulation Mode Read Short Address
0x90, 0xAddrLow This will read byte.
Future Technology Devices International Ltd. 2005
AN2232C-01 Command Processor MPSSE Host Emulation Modes
Host Emulation Mode Read Extended Address
0x91, 0xAddrHigh, 0xAddrLow This will read byte.
Future Technology Devices International Ltd. 2005
Instructions Host Emulation Mode
Host Emulation Mode Write Short Address
0x92, 0xAddrLow, 0xData This will write byte.
Future Technology Devices International Ltd. 2005
AN2232C-01 Command Processor MPSSE Host Emulation Modes
Host Emulation Mode Write Extended Address
0x93, 0xAddrHigh, 0xAddrLow, 0xData This will write byte.
Future Technology Devices International Ltd. 2005
Instructions both MPSSE Host Emulation Modes
Instructions both MPSSE Host Emulation Modes
Send Immediate
0x87 This will make chip flush buffer back
Future Technology Devices International Ltd. 2005
AN2232C-01 Command Processor MPSSE Host Emulation Modes
Wait High
0x88 This will cause controller wait until GPIOH1 (MPSSE) I/O1 (MCU Host Emulation) high. Once detected high, will move process next instruction. only this will disable controller line never goes high.
Future Technology Devices International Ltd. 2005
Instructions both MPSSE Host Emulation Modes
Wait
0x89 This will cause controller wait until GPIOH1 (MPSSE) I/O1 (MCU Host Emulation) low. Once detected low, will move process next instruction. only this will disable controller line never goes low.
Future Technology Devices International Ltd. 2005
AN2232C-01 Command Processor MPSSE Host Emulation Modes
History, Disclaimer, Contact Information
Document Revision History
AN2232C-01 Version Initial document created March 2004. AN2232C-01 Version Initial document created April 2004. Overview rewritten Signal names made consistent FT2232C signal names added data definition table command names updated TCK/SK Divisor expanded. Further examples added. Command Clock Data Bytes Clock Edge First Read) missing
AN2232C-01 Version format December 2005. Minor corrections.
Future Technology Devices International Ltd. 2005
History, Disclaimer, Contact Information
Disclaimer
Future Technology Devices International Limited 2002 2005 Neither whole part information contained product described this manual, adapted reproduced material electronic form without prior written consent copyright holder. This product documentation supplied as-is basis warranty their suitability particular purpose either made implied. Future Technology Devices International Ltd. will accept claim damages howsoever arising result failure this product. Your statutory rights affected. This product variant intended medical appliance, device system which failure product might reasonably expected result personal injury. This document provides preliminary information that subject change without notice.
Future Technology Devices International Ltd. 2005
AN2232C-01 Command Processor MPSSE Host Emulation Modes
Contact Information
Head Office Glasgow, Future Technology Devices International Limited Scotland Street Glasgow United Kingdom Tel: 2777 Fax: 2758 E-Mail (Sales): sales1@ftdichip.com E-Mail (Support): support2@ftdichip.com E-Mail (General Enquiries): admin1@ftdichip.com Site URL: http://www.ftdichip.com Shop URL:
Branch Office Taiwan Future Technology Devices International Limited (Taiwan) 16-1, Sec. Mincyuan East Road Neihu District Taipei Taiwan Tel: +886 8791 3570 Fax: +886 8791 3576 E-Mail (Sales): tw.sales@ftdichip.com E-Mail (Support): tw.support@ftdichip.com E-Mail (General Enquiries): tw.admin@ftdichip.com Site URL: http://www.ftdichip.com
Branch Office Hillsboro, Oregon, Future Technology Devices International Limited (USA) 5285 Elam Young Parkway Suite B800 Hillsboro, 97124-6499 Tel: (503) 547-0988 Fax: (503) 547-0987 E-Mail (Sales): us.sales@ftdichip.com E-Mail (Support): support2@ftdichip.com E-Mail (General Enquiries): admin1@ftdichip.com Site URL: http://www.ftdichip.com
Agents Sales Representatives Please visit Sales Network page FTDI site contact details distributor(s) your country.
Future Technology Devices International Ltd. 2005
Index
Index
-00x10 0x11 0x12 0x13 0x18 0x19 0x1A 0x1B 0x20 0x22 0x24 0x26 0x28 0x2A 0x2C 0x2E 0x30 0x31 0x32 0x33 0x34 0x35 0x36 0x37 0x38 0x39 0x3A 0x3B 0x3C 0x3D 0x3E 0x3F 0x4A 0x4B 0x6A 0x6B 0x6E 0x6F 0x80
0x81 0x82 0x83 0x84 0x85 0x86 0x87 0x88 0x89 0x90 0x91 0x92 0x93 0xFA
-AALEWR#
-BBad Commands mode
-CCLK Divisor Clock Clock Divisor Command Processor Contact
-DD0 Data Bits Data Shifting commands Disclaimer Document Revision History Duty Cycle
Future Technology Devices International Ltd. 2005
AN2232C-01 Command Processor MPSSE Host Emulation Modes
-EE-mail
-SSend Immediate SETUP Command
-FFT2232C
-TTCLK
-GGPIO11 GPIO12 GPIO13 GPIO14 GPIO21 GPIO22 GPIO23 GPIO24
-XXOR
-IIRQ
-JJTAG
-LLSB
-MMCU Host Emulation MPSSE Multi-Protocol Synchronous Serial Engine
-OOSC
-RRD#
Future Technology Devices International Ltd. 2005
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