Mailbox heart communicating with 73M2921. Mailbox used perform three f
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Using Mailbox 73M2921
Mailbox heart communicating with 73M2921. Mailbox used perform three functions; General Register Access (GRA) function, Configuration Register Access (CRA) function, Memory Block Transfer (MBT) function. 73M2921 controlled through combination General Registers Configuration Registers. Memory Block Transfer allows code modification interrogation. code modified interrogated word increments through MBT. order utilize full potential 73M2921 important that embedded designer have good understanding Mailbox Register. This document describes Mailbox functions provides example code. Consult data sheet additional information Mailbox.
General Register Access
Register access perormed through parallel data bus. Since internal registers require operations, access must done steps. only register which accessed directly from controller reading writinng consecutive direct addresses. other registers accessed through Mailbox register muli-step operations. Mailbox Register there bytes separated into Control Data byte (UA[1:0] Control byte UA[1:0] Data byte). Control byte broken down into segments follows: Control Byte Microprocessor General Register Access
Register Address Bits
Reserved Memory Block Transfer Register address 00000b reserved (CR0 location)
data byte (Address 11b) sent. Data byte contains data written null (00h) read performed. Order important data byte triggers internal interrupt 73M2921 firmware, indicating mail present. response either polled interrupt driven. interrupt-driven response, 73M2921 issues interrupt when response data available. which time microprocessor reads bytes (Control, Data) from 73M2921. data received from 73M2921 also broken into Control Data byte. Control byte broken down into segments follows:
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73M2921
Application Notes
Control byte Microprocessor General Register Access
Register Address Bits
Unsolicited Response. data response last command. Memory Block Transfer Register Address shadows last operation.
read mode Data byte will hold requested data. When writing 73M2921 response Data byte will ERROR. polled mode operation, data ready, Control Data byte will both zero. When Control byte non-zero, then data available. Reading valid data clears 73M2921 next command. reads writes general registers well will immediate response.
General Register Access Read/Write Flow Chart
Write_Mailbox Raw_MB_Write Read_Mailbox
Clear Read/Write Control byte
Save DPTR
Read/Write Control byte
Call raw_mb_write
Reset response flag
Clear Data byte
EXIT
Send Control byte mailbox
Call raw_mb_write
Send Data byte mailbox
data from mailbox
2921 ack?
EXIT
no2920 flag
Restore DPTR
EXIT
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73M2921
Application Notes
General Register Access Read/Write Example Code
mailboxh 0102h mailboxl 0103h Used extensively write "general" registers. Write_Mailbox Writes 2921 mailbox. register Data write_mailbox: acc.5 ;Clr 'R'ead/'W'rite write. call raw_mb_write Used extensively read from "general" registers. Read_Mailbox Reads from 2921 mailbox. register Returns: Data read_mailbox: setb acc.5 ;Set 'R'ead/'W'rite read. b,#0 ;Make sure data field 'null'. call raw_mb_write a,mbox_data ;Get data from mailbox. mbt_buffer: byte buffer into external RAM. Lowest level mailox routine. raw_mb_write: push ;Save DPTR. push push ;Save 'r0', assumes we're using register bank zero. resp_pending ;Reset response flag. dptr,#mailboxh ;Get mailbox control byte address. movx @dptr,a ;Send address mailbox. dptr ;Point mailbox data address. ;Get data 'Acc'. movx @dptr,a ;Send data mailbox. r0,#tmr_1ms_2 ;Set wait msec. a,#10 @r0,a wrmblp: resp_pending,got_response a,@r0 wrmblp setb no2921 response from 2921, error out. sjmp wrexit got_response: no2921
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73M2921
Application Notes
wrexit: ;Restore 'r0'. ;Restore DPTR.
Configuration Register Access
Configuration Register Access (CRA) function allows microprocessor directly interrogate and/or modify configuration registers. There configuration registers 73M2921, Byte selects Configuration Register Access. Both these bits must CRA. Reading writing Mailbox Control Byte Configuration Register Access
Reserved use. Memory Block Transfer
Mailbox Data Byte Register Access Mailbox Data Byte Register Access
Register address bits(D7-D5). 101b. 110b.
Configuration Register Access Write
write enabled setting bits 4,and Mailbox Control byte. Mailbox Data byte determines which control register will accessed. Bits Mailbox Data byte register address bits. address 101b. 110b. Mailbox Data byte must well. procedure write follows: Write Procedure: Mailbox Control Byte Configuration Register Access write (write address 10b). Mailbox Data Byte Configuration Register Access address 11b, write either access access CR2). will respond through Mailbox (the response defined). Write high byte CR1/CR2 address 10b. Write byte CR1/CR2 address 11b. will respond through Mailbox (the response defined).
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73M2921
Application Notes
Configuration Register Access Write Example Code
this example, will written CR2. a,#051h ;Set Mailbox Control Byte b,#0B0h ;Set Mailbox Data Byte call raw_mb_write a,#44h ;write high byte b,#00h ;write byte call raw_mb_write
Configuration Register Access Read
rarely necessary read from Configuration registers. However, option. read enabled setting bits 4,and Mailbox Control byte. Mailbox Data byte determines which control register will accessed. Bits Mailbox Data byte register address bits. address 101b. 110b. Mailbox Data byte must well. procedure read follows: Read Procedure: Mailbox Control Byte Configuration Register Access write (write address 10b). Mailbox Data Byte Configuration Register Access address 11b, write either access access CR2). will respond through Mailbox (the response defined). Read high byte CR1/CR2 address 10b. Read byte CR1/CR2 address 11b.
Memory Block Transfer
This function allows microprocessor directly interrogate and/or modify internal DSP-related functions. Setting (MBT) Control byte enables Memory Block Transfer mode. Reading write commands. function will read/write only word bits) memory time. Again, response from 73M2921 polled interrupt driven. Unsolicited interrupts disabled during MBT. response defined equal 00h. Error response defined equal 01h. following commands support RAM: Mailbox Control Byte Memory Block Transfer
Reserved 73M2921 response. Memory Block Transfer
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73M2921
Application Notes
Memory Block Transfer Write
microprocessor sends write command (MSB 40h, 01h). 73M2921 responds microprocessor then sends address through mailbox (MSB first). 73M2921 responds microprocessor then sends data through mailbox (MSB first). 73M2921 responds Write Procedure: Microprocessor sends Control Byte: Microprocessor sends Data Byte: 73M2921 echoes Control Byte: 73M2921 responds Microprocessor sends address MSB: Microprocessor sends address LSB: 73M2921 echoes Control Byte: 73M2921 responds Microprocessor sends data MSB: Microprocessor sends data LSB: 73M2921 echoes Control Byte: 73M2921 responds
Mailbox (10b) Mailbox (11b) Mailbox (10b) Mailbox (11b) Mailbox (10b) addr. Mailbox (11b) addr. Mailbox (10b) Mailbox (11b) Mailbox (10b) data Mailbox (11b) data Mailbox (10b) Mailbox (11b)
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73M2921
Application Notes
Memory Block Transfer Write Flowchart
MBT_Write
Load Acc.A Load Acc.B
Call raw_mb_write
Recall address
Call raw_mb_write
data from buffer
Call raw_mb_write
EXIT
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73M2921
Application Notes
Memory Block Transfer Write Example Code
MBT_Write Memory Block Transfer 2921 DPTR Address MBT_BUFFER Data mbt_write: push ;Save address. push a,#040h ;MBT Write b,#001h ;Put count into 'B', always call raw_mb_write ;Write mailbox ;Recall Address. call raw_mb_write ;Write mailbox. dptr,#mbt_buffer ;Send 2921. movx a,@dptr ;Get data from buffer. dptr movx a,@dptr ;Get data from buffer. ;Send 2921. call raw_mb_write ;Write mailbox. mbt_exit:
Memory Block Transfer Read
microprocessor sends read command (Control Byte 60h, Data Byte 01h). 73M2921 responds (Control Byte echo 60h, Data Byte 00h). microprocessor then sends 16-bit address through mailbox (MSB first). 73M2921 responds echoing Control Byte mailbox. read data sent mailbox. microprocessor then polls next interrupt. interrupt, mailbox contains echo Control Byte. mailbox contains read data. Read Procedure: Microprocessor sends Control Byte: Microprocessor sends Data Byte: 73M2921 echoes Control Byte: 73M2921 responds Processor sends address: Processor sends address: 73M2921 echoes Control Byte: 73M2921 sends data MSB: Microprocessor polls interrupt 73M2921 echoes Control Byte: 73M2921 sends data LSB:
Mailbox (10b) Mailbox (11b) Mailbox (10b) Mailbox (11b) Mailbox (10b) addr. Mailbox (11b) addr. Mailbox (10b) Mailbox (11b) data Mailbox (10b) Mailbox (11b) data
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73M2921
Application Notes
Memory Block Transfer Read Flowchart
MBT_Read
Read flag Delay Recall address Save Address Call raw_mb_write Load Acc.A Load Acc.B rest done interrupt level. Call raw_mb_write EXIT
Memory Block Transfer Read Example Code
MBT_Read Memory Block Transfer from 2921 DPTR Address Count Words MBT_BUFFER Data mbt_read: a,#2 call delay ;Give time breath. push push call setb call a,#060h b,#001h raw_mb_write mbtr raw_mb_write ;Save address. ;MBT Read ;Put count into 'B', always write mailbox. ;Set read. ;Recall Address. ;Write mailbox. ;The rest done interrupt level.
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73M2921
Application Notes
Mailbox Interrupt Flow Chart
Mailbox_Int
Wait fore next byte (interrupt driven) Turn mailbox interrupt reset interrupt flag
Save Control byte from 73M2921
Save register information
Save Data byte from 73M2921
mailbox Control byte
Reset Read Flag
Save mailbox data
Inform foreground response
Read flag set?
Restore register info reenable
EXIT Save data
Mailbox Interrupt Example Code
Mailbox_Int Mailbox Interrupt 2910 mailbox_int: exf2,mbi ;Jump/EXF2 interrupt. reti ;No, return. mbi: ;Turnoff mailbox interrupts. exf2 ;Reset interrupt flag. push ;Save registers. push push push dptr,#mailboxh ;Get mailbox address movx a,@dptr ;Get control field from 2921 dptr ;Point data field mbox_control,a ;Solicited response. save control movx a,@dptr ;Get data mbox_data,a ;Save data mbtr,mailbox_int_exit ;Jump/Not Memory block transfer. .read operation.
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73M2921
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movx movx dptr,#mbt_buffer @dptr,a exf2,$ exf2 dptr,#mailboxh a,@dptr dptr mbox_control,a ;Save data. ;Save MSB. ;Wait next byte data. ;Reset interrupt. ;Get mailbox address. ;Get control field from 2921. ;Point data field. ;Solicited response. .save control. ;Get data. ;Save LSB.
movx a,@dptr dptr,#mbt_buffer+1 movx @dptr,a mbtr mailbox_int_exit: setb resp_pending setb reti set_mbt_buf: push push dptr,#mbt_buffer movx @dptr,a dptr movx @dptr,a
;Inform foregound response. ;Restore registers.
;Re-enable mailbox interrupts.
;Save data. ;Get address BUFFER. ;Recall data. ;Put data buffer.
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