AP1632 additional file Using (SPI) Interface Multimaster Sys
|
|
|
Top Searches for this datasheet
AP163201.EXE available
AP1632
additional file
Using (SPI) Interface Multimaster System
C165 C167, internal High-Speed Synchronous Serial Interface implemented providing serial communication between C167 C165 other microcontrollers with transfer rate Mbaud. demo software multimaster full-duplex system which given time microcontroller configured master while others slave mode.
Andreas Hettmann Siemens Cupertino
Semiconductor Group
06.96, Rel.
Using (SPI) Interface Multimaster System
3.5.1 3.5.2 Introduction General operation hardware environment demo. demo software descrition Main program. System initialization initialization. service routine Routines data transmission. Send data Receive data. Running light. scan routine. Creating microcontroller executable files. Know problems Source codes compiling tools
demo software: code 4.1.1 Main program SSC.C. 4.1.2 System initialization INIT_SYS.C 4.1.3 initialization INIT_SSC.C18 4.1.4 interrupt service routine KEY_INT.C 4.1.5 Running light RUNLIGHT.C 4.1.6 scan routine SSC_SCAN.C 4.1.7 receive interrupt service routine RX_INT.C. 4.1.8 transmit routine TX_SSC.C 4.1.9 transmit interrupt service routine TX_INT.C. 4.1.10 header file SSC.H System register initialization, code INIT_167.SRC. Linker locator control file SSC.ILO Locator output file SSC.MAP. Miscellaneous files compiling display board schematic.
AP1632 ApNote Revision History Actual Revision Rel.01 Previous Revison: none Page Page Subjects changes since last release) actual Rel. prev. Rel.
Semiconductor Group
AP1632 06.96
Using (SPI) Interface Multimaster System
Introduction
C165 C167, internal High-Speed Synchronous Serial Interface implemented providing serial communication between C167 C165 other microcontrollers with transfer rate MBaud clock. very flexible configuration options this interface used wide range applications from simple external shift registers expand number parallel ports primitive pulse width modulation (PWM) high-end protocol driven microcontroller networks. complete list options configuring refer C165 C167 User's Manual, edition 8/94, section Shown demo software multimaster full-duplex system which given time microcontroller configured master while others slave mode. This demo software been created show example High-Speed Synchronous Interface non-trivial application support solving user specific demands concerning SSC. limitations Port2 (only P2.0-P2.7 available) C165 recommended this software with C167 based boards only. General operation hardware environment demo
LEDs)
Codi
C167
ShitCl ansm Recei Recei ansm
boar sofw ied)
SCLK
Push Buton
C167
C167
Push Buton Boar
Boar
Boar
Figure Hardware demonstration software shown fig. C167 based boards connected full-duplex operation lines SCLK (SSC Shift Clock), MTSR (Master Transmit Slave Receive) MRST (Master Receive Slave Transmit). Every board identified combination jumpers display board providing 4-bit board These used creating decoding messages specify source destination board. After starting program, current board value displayed center part display.
Semiconductor Group
AP1632 06.96
Push Buton
SCLK
SCLK
Using (SPI) Interface Multimaster System
Following board configured slave indicated running light. Pushing button display board forces controller create message sent requiring master status board when current master providing Shift Clock. there master system (e.g. after start-up boards) controller waits certain time automatically becomes master when clock applied. display shows center part (binary) number added board resulting board remote controlled board. Remote controlled boards remaining slave mode accessed ascending order additional single clicks providing wrap-around. Double-clicking masters button will result toggling direction running LEDs remote controlled board. Additionally, there word data transfer performed between specified memory areas master slave which only detected using monitor software view memory recording data flow using digitizing scope single-shot mode. brief graphical overview activities shown chart fig.2
VE,show unni oggl ecton upon ecei ecei ofdat PRESSED
STER,sw boar show fxed patern ofcur boar ofboar exceeded
oggl diecton ofLED boar STER oggl diecton ofLED ofcur boar ansf
REPEA REPEA
Figure Flow software from user's view
Semiconductor Group
AP1632 06.96
Using (SPI) Interface Multimaster System
START
LED. Boar dependi fashi unni
SLAVE
ASTER
Boar boar
Figure Functions display different operating modes
demo software
software divided into several modules each performing very specific actions described following sections. Main program
Because software event-controlled (interrupts), main program consist only system initialization routine call loop containing IDLE instruction. Each time IDLE executed powered down while peripherals like timers remain running. This state held until interrupt occurs (e.g. from scan, running LED). After executing system initialization used state variables on-chip devices like timers, configured. also chapter 4.1.1. System initialization
system initialization routine INIT_SYS executed only once during start-up performs initialization global variables loading configuration registers used on-chip peripherals. These devices configured following: Port2 output driving display Timer2 used master mode provide slave boards periodically with clock Timer5 used slave mode running pattern (one shift timer overflow) Timer0 counter P3.0 detect pushed PEC0 transfer word from receive buffer receive data buffer memory PEC2 transfer words from receive buffer auto-incremented receive data buffer location memory with fixed baudrate defined header file SSC.H slave move (see also chapter 3.3) code listing INIT_SYS.C 4.1.2.
Semiconductor Group
AP1632 06.96
Using (SPI) Interface Multimaster System
initialization
Prior initialization required disable clearing configuration register SSCCON. Then pins used (MRST, MTSR SCLK) have configured whether output input depending desired mode SSC. master mode, SCLK providing shift clock master transmit MTSR outputs while master receive input (Port3 direction register DP3). slave mode, three port pins configured input (SCLK receives shift clock from current master, MTSR slave receive line MRST only switched output when slave transmits data master avoid collisions this line). order these alternate functions Port3, bits output latch because ANDed with alternate function. demo software, configured data width (SSCBM), transmit receive first (SSCHB), shift transmit data leading edge (SSCPH), idle clock line (SSCPO) ignoring errors (SSCTEN,SSCREN,SSCPEN,SSCBEN), resulting initialization value 0x805F slave mode 0xC05F master mode (fig.3). Configuring enabling done simply writing this value into SSCCON takes only instruction. code listing initialization file, INIT_SSC.C, 4.1.3.
SSCCON
EN=0 AREN
SSCBM
SABLE erori tSSC ASTER orSLAVE ENABLE SSCEN
tans tans edge eadi cock
Figure Configuring demo software
Semiconductor Group
AP1632 06.96
Using (SPI) Interface Multimaster System
service routine
service routine interrupt service routine called Timer0 overflow interrupt caused pressing spike this line. Spikes bursts induced contact material less than about filtered routine SCAN cause erroneous action software. shown flowchart (fig. below first assumption about pressed single click which would cause transmission master request become master already master, switching remote slave boards explained chapter But, pressed again within time frame after releasing, this recognized double click forces software master mode send command remote controlled slave board toggle direction running LEDs slave mode toggle direction on-board display. code listing interrupt service routine, KEY_INT.C, 4.1.4.
PRES
SINGLE CLICK
eased alze start (300 sec) PRES
DOUBLE CLICK
SINGLE CLICK
ected
DOUBLE CLICK
SLAVE
STATUS MAST
recti
Figure Interrupt Service Routine
Semiconductor Group AP1632 06.96
Using (SPI) Interface Multimaster System
COMMAND NAME IDLE DIR_CHG
VALUE (0h) (5h)
DESCRIPTION dummy command SSC_SCAN, sent master command 'toggle direction running LEDs', sent master current remote controlled slave request become master, sent slave acknowledge MASTER_REQ, sent master
MASTER_REQ (7h) (2h) Figure Agenda protocoll commands used communication Routines data transmission
Since serial data collected shift register transmitting receiving synchronized performed same time. pins MRST MTSR assigned input output shift register according operating mode (master slave) there need external hardware switch pins master slave mode.
Semiconductor Group
AP1632 06.96
Using (SPI) Interface Multimaster System
3.5.1 Send data Transmitting data performed simply writing data value into Transmit Buffer SSCTB. shift register empty, that means, last transmission already finished, contents SSCTB copied immediately shift register. master mode, transmission starts instantly supplying shift clock SCLK shifting data MTSR while slave mode data remains unchanged shift register until remote master applies shift clock. Data then shifted MRST. modes, after copying data from SSCTB shift register, transmit interrupt indicates request data transmitted. This especially used transferring words after command DIR_CHG when transmit interrupt causes PEC1 transfer data from memory array SSCTB without interrupt service routine. code routines TX_SSC.C TX_INT.C 4.1.8 4.1.9.
HEADER
URCE
TRANSM NTERRU R_CHG: tansf TX_BUFFER untlPEC count tansm uptt uptser ediect TX_I outne TX_BUFFER .16] DATA TRANSM
DESTI NATI
TX_BUFFER TRANSM
R_CHG tansm diect 1;pr epar tansf
SSTRB ansm Bufer RECEI
seraldat ShitRegi Recei
ASTER_REQ TRANSM DONE SSCBSY 0)OR EXPI entm ASTER
Figure Transmitting Data
Semiconductor Group
ansm
AP1632 06.96
Using (SPI) Interface Multimaster System
3.5.2 Receive data mentioned, receiving data always synchronized with transmitting data. selected number bits received data automatically transferred from shift register into receive buffer SSCRB. software then notified receive interrupt copy value SSCRB into software buffer before next data word received. demo software, initially receive interrupt directed PEC0 which transfers received word into RX_BUFFER[0] then calls
ansm
SSCRB Recei Bufer RECEI
ShitRegi R_CHG oggl diecton uptdiect ecei epar tansf colect seraldat Recei
RECEI NTERRUPT:
count
RX_BUFFER RECEI
RX_BUFFER .16] RECEI
HEADER
ansf RX_BUFFER untlPEC count
HEADER CORRUPT
URCE
uptt ediect ecei RETURN FROM NTERRUPT
DESTI NATI
scar ecei
ASTER_REQ send becom SLAVE tSSC SLAVE poli unni
becom ASTER tSSC ASTER unni poli
RETURN FROM NTERRUPT
Figure Receiving Data
Semiconductor Group AP1632 06.96
Using (SPI) Interface Multimaster System
interrupt service routine RX_INT because PEC0 counter been decremented command DIR_CHG decoded, receive interrupt then directed PEC2 which will transfer consecutive words from SSCRB RX_BUFFER. After that, RX_INT called again (PEC2 counter receive interrupt redirected PEC0 prepare receiving next word. Depending received command, several actions will take place shown diagram Fig. code listing RX_INT refer chapter 4.1.7. Running light
running light controlled interrupt service routine RUNLIGHT which called each time after Timer5 overflow occurred, that means, after delay time left right step passed. current status obtained from global variable, rotated right left depending direction variable written back global variable Port2 where LEDs connected Because Timer5 capable self reload, Timer5 control timer registers have reloaded feature appropriate delay time restart timer. graphical description fig. code routine RUNLIGHT.C found chapter 4.1.5.
(ocalvarabl
obalvari
regi
LEFT
obalvar
Port
contnues countng)
Figure Timer interrupt service routine running light
Semiconductor Group
AP1632 06.96
Using (SPI) Interface Multimaster System
scan routine
master mode, scan routine called expired Timer2 causing interrupt performs periodical transmitting dummy words. This must done because transmitting master supplies slaves with shift clock order make transmitting MASTER_REQ slave possible. After master starts transmitting, Timer2 reloaded started obtain constant scanning. code listing this routine, SSC_SCAN.C, 4.1.6. Creating microcontroller executable files
running demo, code files assembly startup file have compiled, linked, located converted into format monitor software capable upload into microcontroller. When using BSO/Tasking compiler Hitop debugger light (Hitex), make file (SSC.MAK; starting make process executing MAKE.BAT) been prepared control compiling. make file executed from bottom file upwards depending file dates (newer source files will converted, unaltered source files with existing converted files remain untouched). control linking modules creating interrupt vector table file SSC.ILO used containing information module related interrupt numbers, classes memory locations reserved areas used user. graphical overview compiling tools MAKE utility obtaining microcontroller executable files shown fig. Note that paths environment variables compiling tools have calling SETPATH.BAT (see listing 4.5). Before loading program code from SSC.HTX into microcontroller memory, controller booted executing BOOT.BAT, which causes BTDL.EXE load files BOOT.BSL (boot software, sets system registers required values depending hardware, e.g. memory waitstates, system stack size prepares controller load monitor) EVA167.HEX (monitor software) into microcontroller's memory make communication between based debugging software microcontroller possible. monitor software been slightly changed (not possible using `light' version) ensure matching hardware values boot file monitor. Then debugging software started executing HIT1.BAT (edit this file different port transfer speed configurations). After loading (SSC.HTX symbol file SSC.SYM) starting demo software Hitop debugger, recommended leave debugger because extensive timers software interfere with communication between debugger which results error message "Could send command".
Semiconductor Group
AP1632 06.96
Using (SPI) Interface Multimaster System
SSC. T_SSC. T_SSC. /KEY_I /RX_I /TX_I TX_SSC. /SSC_SCA sec.4. SSC. sec.4. -Com pier C166 T_167. sec.4.
ssem A166
nker L166
SSC.LO sec.4.
Locat L166 SSC. SSC. sec.4.
EEE695- EEE166
HEXConver HEX166
SSC. bolPr ozessor SP166TA
SSC. elHEX
Fies ebugger sec.3.
SSC.
SSC.
Figure Making C16x controller executable files
Semiconductor Group
AP1632 06.96
Using (SPI) Interface Multimaster System
Known problems
normally operates speeds MBaud. Long signal lines improper design cause transmission fail higher baud rates because output driver lines meet only standard requirements compatibility. During software development demo available C167 boards operated correctly only approximately kBaud when connected together more board system. Only system consisting C167 boards worked correctly maximum transfer rate.
Semiconductor Group
AP1632 06.96
Using (SPI) Interface Multimaster System
4.1.1 Source codes compiling tools demo software: code Main program SSC.C
program ssc.c name Andreas Hettmann Siemens, Cupertino/CA date 5'96 function demo #pragma mod167 #include <reg167.h> #include "ssc.h" extern void INIT_SYS (void); register definitions definitions
external routines
#pragma global make next definitions useable external modules unsigned STATUS; word STATUS actual status board (slave, unsigned BOARD_ID; word BOARD_ID board jumpered P3.1-4 unsigned BITMASK; word BITMASK running actual output state DIR; current direction running LEDs KEY_IDLE; KEY_IDLE input level, pressed unsigned RX_BUFFER TRANSFER_CNT], TX_BUFFER TRANSFER_CNT]; word array storing transmit data interrupt (mainintno) void Int_MAIN (void); #pragma public interrupt (mainintno) INIT_SYS void Int_MAIN() main task
main task interrupt# prototype definition
initialize devices needed demo program
while infinite loop, program event controlled (interrupts) #pragma IDLE ;enter idle mode, return normal operation interrupt #pragma endasm
Semiconductor Group
AP1632 06.96
Using (SPI) Interface Multimaster System
4.1.2 System initialization INIT_SYS.C
program init_sys.c name Andreas Hettmann Siemens, Cupertino/CA date 5'96 function initializes system #include <reg167.h> #include "ssc.h" extern extern extern extern extern extern extern extern register definitions definitions
DIR; global variables type, defined SSC.C KEY_IDLE; unsigned STATUS; global variables word type, def. SSC.C unsigned BOARD_ID; unsigned BITMASK; unsigned RX_BUFFER TRANSFER_CNT]; (word array) unsigned TX_BUFFER TRANSFER_CNT]; void INIT_SSC (unsigned int); external routine INIT_SSC
void INIT_SYS (void); #pragma global
prototype definition routine make key_stat useable external modules
void INIT_SYS (void) BITMASK LED_START_MASK; KEY_IDLE _getbit
shift light left (init) init pattern input level (not pressed)
_bfld DP3, 0x001E, 0x0000 switch P3.1 P3.4 input mode ONES; switch P2.0 2.15 output mode (LED's) 0x001E; output P2.1 P2.4 BOARD_ID 0x000F; .,get jumper location, shift rightbound store BOARD_ID show panel T6IR T6IE T6CON 0x0000; 0x0047; clear Timer6 request flag disable Timer interrupt load timer register Timer6 counts fc=fcpu/512, timer starts
while ~T6IR 0x1000 0x0420; else 0x03C0; T6CON 0x0000; T6IR _bfld T2IC, 0xFF, T2_INT MASTER_IDLE 0.0128; T2CON 0x00C5; _bfld T5IC, 0xFF, T5_INT LED_STEP;
wait Timer6 overflow flashing LED's P2.5 P2.10 while waiting Timer6 overflow
stop Timer6 clear Timer6 interupt request flag Timer2 priority group level init Timer2 SSC_SCAN count down, fc=fcpu/256, start timer rem.: Timer2 disabled, SSC.H Timer5 priority group level init Timer5 RUNLIGHT
Semiconductor Group
AP1632 06.96
Using (SPI) Interface Multimaster System
_bfld T0IC, 0xFF, T0_INT 0xFFFF; T0REL 0xFFFF; T01CON 0x0049 (char) KEY_IDLE;/* SRCP0 (int) SSCRB; DSTP0 (int) RX_BUFFER [0]; PECC0 0x0000 SSCRIC 0x78; SRCP2 DSTP2 PECC2 (int) SSCRB; (int) RX_BUFFER [1]; 0x200 TRANSFER_CNT; T5CON 0x00C7; count down, fc=fcpu/512, start timer rem.: Timer5 enabled, SSC.H Timer0 priority group level preload timer register load reload register Timer0 counter, input P3.0 (HW) count edge idle level*/ edge PEC0 source receive buffer PEC0 dest word array init PEC0, incr dest, word transfer receive interrupt PEC0
PEC2 source receive buffer PEC2 dest word receive array incr dest, transfer defined words
_bfld SSCTIC, 0xFF, SSC_T_INT transmit interrupt priority group level STATUS SLAVE; initial status board slave
SSCCON reset SSCBR F_CPU 1000000 BAUD_RATE baud rate INIT_SSC SLAVE calls initialization routine
Semiconductor Group
AP1632 06.96
Using (SPI) Interface Multimaster System
4.1.3 initialization INIT_SSC.C
program init_ssc.c name Andreas Hettmann Siemens, Cupertino/CA date 5'96 function initializes #include <reg167.h> #include "ssc.h" void INIT_SSC (unsigned int); #pragma global void INIT_SSC mode unsigned mode; SSCCON ZEROS; _bfld 0x2300, 0x2300 P3.13 (SCLK) register definitions definitions
prototype definition routine
make init_ssc useable external modules local variable, word type stop reset P3.8 (MRST), P3.9 (MTSR)
_bfld ODP3, 0xFFFF, 0x2300 *//* open drain outp only development switch mode branch depending value 'mode' case SLAVE: _bfld DP3, 0x2300, 0x0000 switch MRST,MTSR SCLK input mode SSCCON SSC_EN SSC_SLAVE SSCCON_INIT; init slave (cf. SSC.H) break; exit branch case MASTER: _bfld DP3, 0x2300, 0x2200 switch MRST input; MTSR SCLK output mode
SSCCON SSC_EN SSC_MASTER SSCCON_INIT; init master (cf. SSC.H) break; exit branch
Semiconductor Group
AP1632 06.96
Using (SPI) Interface Multimaster System
4.1.4 interrupt service routine KEY_INT.C
program key_int.c name Andreas Hettmann Siemens, Cupertino/CA date 5'96 function interupt service routine push button #include <reg167.h> #include "ssc.h" extern extern extern extern extern extern register definitions definitions
unsigned STATUS; global variables word type, SSC.C unsigned BOARD_ID; DIR; global variables type, SSC.C KEY_IDLE; void INIT_SSC (unsigned int); external routines void TX_SSC (unsigned int, unsigned int, unsigned int); prototype routines
interrupt (keyintno) void KEY_INT (void); SCAN (void); #pragma global
make key_int useable external modules
interrupt (keyintno) void KEY_INT unsigned stat, board; local variables, word type type button click stat status board board remote board T0IE overhead inhibit Timer0 T0IR overhead clear request flag SCAN SINGLE_CLICK; while SCAN T6IR T6IE T6CON 0.0256; 0x00C7; branch pressed (filter spikes) first assumption: single click wait release clear request flag Timer6 inhibit Timer6 [T6] time wait second click count down, fc=fcpu/512, timer starts
while ~T6IR SCAN DOUBLE_CLICK; T6CON 0x0000; T0IR T0IE overhead overhead
wait second click second click detected double click stop Timer6 clear request flag Timer0 enable Timer0 interrupt
stat STATUS; switch
STATUS into local faster access branch type stroke
Semiconductor Group
AP1632 06.96
Using (SPI) Interface Multimaster System
case SINGLE_CLICK: T2IE SSC_SCAN stat increase status stat NO_OF_BOARDS wrap around stat STATUS stat; actual status global stat SLAVE slave INIT_SSC SLAVE init slave T5IE enable running LEDs else T5IE stop running LEDs BACKGND_PATTERN stat STATUS_SHIFT show actual status LEDs stat MASTER slave _putbit DP3, switch MRST output TX_SSC MASTER_REQ, BOARD_ID, send master T2IE switch SSC_SCAN break; case DOUBLE_CLICK: stat SLAVE status slave ~DIR; toggle direction running LEDs else board stat BOARD_ID; calc remote board board NO_OF_BOARDS board NO_OF_BOARDS; TX_SSC DIR_CHG, BOARD_ID, board send command remote board toggle running direction break; SCAN (void) status T4IR T4IE T4CON 0.0256; 0x00C6;
local variables, word type scans status input value clear request flag Timer4 inhibit Timer4 [T4] scanning time count down, fc=fcpu/512, start timer
while ~T4IR status _getbit T4CON 0x0000; (cnt status) status
while Timer4 expired accumulate values count loop cycles stop Timer4 pressed more than time
Semiconductor Group
AP1632 06.96
Using (SPI) Interface Multimaster System
return P30_ACTIVE KEY_IDLE else return P30_PASSIVE KEY_IDLE
Semiconductor Group
AP1632 06.96
Using (SPI) Interface Multimaster System
4.1.5 Running light RUNLIGHT.C
program runlight.c name Andreas Hettmann Siemens, Cupertino/CA date 5'96 function runlight interrupt service routine #include <reg167.h> #include "ssc.h" register definitions definitions
extern DIR; global variables word type, SSC.C extern unsigned BITMASK; interrupt (t5intno) void RUNLIGHT (void); #pragma global prototype routine
make runlight useable external modules
interrupt (t5intno) void RUNLIGHT (void) unsigned mask; mask BITMASK;
local variable, word type mask current output bitmask into local faster access
shift LEDs depending current direction flag mask _ror mask, else mask _rol mask, LED_STEP 0.0256; reload Timer5 running LEDs output computed bitmask LEDs store value back global variable
mask; BITMASK mask;
Semiconductor Group
AP1632 06.96
Using (SPI) Interface Multimaster System
4.1.6 scan routine SSC_SCAN.C
program ssc_scan.c name Andreas Hettmann Siemens, Cupertino/CA date 5'96 function Master scanning Slave commands #include <reg167.h> #include "ssc.h" register definitions definitions
extern unsigned BOARD_ID; extern void TX_SSC (unsigned int, unsigned int, unsigned int); external routine interrupt (t2intno) void SSC_SCAN (void); #pragma global prototype definition
make ssc_scan useable external modules
interrupt (t2intno) void SSC_SCAN (void) TX_SSC IDLE, BOARD_ID, send command IDLE remote boards rem.: this procedure needed supply slaves with clock periodically ensure slave request received master MASTER_IDLE 0.0128; T2CON 0x00C5;
reload timer count down, fc=fcpu/256, start timer
Semiconductor Group
AP1632 06.96
Using (SPI) Interface Multimaster System
4.1.7 receive interrupt service routine RX_INT.C
program rx_int.c name Andreas Hettmann Siemens, Cupertino/CA date 5'96 function interupt service routine receive #include <reg167.h> #include "ssc.h" extern extern extern extern extern extern register definitions definitions
DIR; global variables word type, SSC.C unsigned STATUS; unsigned BOARD_ID; unsigned RX_BUFFER TRANSFER_CNT]; void TX_SSC (unsigned int, unsigned int, unsigned int); void INIT_SSC (unsigned int); external routines prototype routine
interrupt (rxintno) void RX_INT (void); #pragma global
make rx_int useable external modules
interrupt (rxintno) void RX_INT unsigned rec_word, rx_src, rx_dest, rx_msg; local vars,word type PECC0 0x0000 prepare PEC0 receiving next word
SSCRIC 0x3F 0x3A last transfer SSCRB PEC2 _bfld SSCRIC, 0x3F, 0x38 then switch back PEC0 DSTP2 (int) RX_BUFFER [1]; PEC2 destination word receive array PECC2 0x200 TRANSFER_CNT; increment dest, transfer defined words else (last transfer PEC0) rec_word RX_BUFFER [0]; value into local rx_src (rec_word 0x0F00) rx_dest (rec_word 0x00F8) received address rx_msg rec_word 0x0007; received command
((rec_word 0xF000) HEADER) ((rx_dest ALL) (rx_dest BOARD_ID)) header incorrect received data return; doesn't belong this board return switch rx_msg case DIR_CHG: break; branch command SSCRIC 0x7A; ~DIR; served PEC2 toggle running direction
Semiconductor Group
AP1632 06.96
Using (SPI) Interface Multimaster System
case MASTER_REQ: STATUS SLAVE current master remote board T2IE TX_SSC BOARD_ID, rx_src STATUS SLAVE; status becomes 'slave' INIT_SSC SLAVE init slave T5IE switch running LEDs break; case INIT_SSC MASTER T2IE break; case IDLE: break; word from scanning master rx_dest BOARD_ID
Semiconductor Group
AP1632 06.96
Using (SPI) Interface Multimaster System
4.1.8 transmit routine TX_SSC.C
program tx_ssc.c name Andreas Hettmann Siemens, Cupertino/CA date 5'96 function routines #include <reg167.h> #include "ssc.h" extern unsigned TX_BUFFER TRANSFER_CNT]; void TX_SSC (unsigned int, unsigned int, unsigned int); #pragma global make tx_ssc register definitions definitions
global word array prototype
useable external modules
void TX_SSC cmd, src, dest unsigned cmd, src, dest; DIR_CHG SRCP1
local variables, word type command transmitted dest address destination board command remote board toggle direction running LEDs
(int) TX_BUFFER [1]; PEC1 source word transmit buffer array DSTP1 (int) SSCTB; PEC1 destination transmit buffer PECC1 0x400 TRANSFER_CNT; increment source address, transfer defined words SSCTIC 0x79; transmit interrupt served PEC1 SSCTB TX_BUFFER HEADER dest cmd; build transmit word with header, address command write into transmit register. master mode transmission starts instantly, slave mode transmission starts when remote master transmitting
Semiconductor Group
AP1632 06.96
Using (SPI) Interface Multimaster System
4.1.9 transmit interrupt service routine TX_INT.C
program tx_int.c name Andreas Hettmann Siemens, Cupertino/CA date 5'96 function interupt service routine transmit #include <reg167.h> #include "ssc.h" extern void INIT_SSC (unsigned int); interrupt (txintno) void TX_INT (void); #pragma global interrupt T3IR T3CON register definitions definitions
prototype definition
make tx_int useable external modules
(txintno) void TX_INT clear Timer3 interrupt request flag WAIT_FOR_MASTER 0.0256; [T3] time wait remote master 0x00C6; count down, fc=fcpu/512, start timer wait following events: remote master transmitted word supplying clock board other boards slave mode too, remote master with clock available, timer expires. Sending command neccesary.
while SSCBSY ~T3IR
T3IR INIT_SSC MASTER T2IE T3CON 0x0000; _bfld SSCTIC, 0xFF, SSC_T_INT stop Timer6 next receive interrupt calls interrupt service routine tx_int, transfer PEC1 switch MRST input mode rem.: master mode already assigned, slave mode assures that inactive slave SSCs have high impedance output pins
_putbit DP3,
Semiconductor Group
AP1632 06.96
Using (SPI) Interface Multimaster System
4.1.10 header file SSC.H
#define NO_OF_BOARDS #define #define #define #define #define #define #define #define #define #define #define mainintno keyintno t2intno t5intno rxintno txintno ENABLE_INT T2_INT T5_INT T0_INT SSC_T_INT 0x50 0x20 0x22 0x25 0x2E 0x2D 0x40 boards being supported (max. software hardware hardware hardware hardware hardware main program ssc.c interrupt Timer0 interrupt Timer2 interrupt Timer5 interrupt receive interrupt transmit ILVL 0x09 0x06 0x07 0x08 GLVL 0x00 0x00 0x00 0x00
sets xxxIE
ENABLE_INT ENABLE_INT ENABLE_INT
#define SLAVE #define MASTER
const 'MASTER' defines ONLY status after being slave
#define KEY_NOT_PRESSED #define SINGLE_CLICK #define DOUBLE_CLICK #define P30_PASSIVE #define P30_ACTIVE #define #define #define #define #define #define #define #define #define #define #define #define #define #define #define #define #define #define #define #define LED_STEP MASTER_IDLE WAIT_FOR_MASTER BACKGND_PATTERN STATUS_SHIFT HEADER IDLE DIR_CHG MASTER_REQ TRANSFER_CNT SSC_EN SSC_SLAVE SSC_MASTER SSCCON_INIT F_CPU BAUD_RATE 0xF81F 0x5000 0x00 0x05 0x07 0x02 0x10 0x8000 0x0000 0x4000 0x005F 115200 0x0707
consts routine key_int
const routine scan (key) msec, max. time betw. clicks (dbl click) msec, scanning time detect spikes msec, time step running LEDs msec, scan every slave's requests msec, slave waits remote master background pattern master mode displayed board fits into pattern shifted header transmission dummy command ssc_scan command 'toggle running LEDs' request from slave become master
address broadcasting words transferred data after DIR_CHG enable SSCCON.15 init values register SSCCON (slave) (master) SSC: first, bits data TX/RX MHz, system clock frequency baud rate running starts with this pattern
#define LED_START_MASK
Semiconductor Group
AP1632 06.96
Using (SPI) Interface Multimaster System
System register initialization, code INIT_167.SRC
$DEBUG $SYMBOLS $XREF $SEGMENTED $EXTEND $NOMOD166 $STDNAMES(reg167b.def) ;all C167 SFR's names primary controls program header: program INIT_167.SRC name Harald Lehmann, Siemens, Cupertino/CA date 12'95 function System Initialization large memory model (SEGMENTED) definitions: -NAME init_167_segmented ;Modulname JMP_MAIN ;SW-interrupt MAIN program
system configuration EVA167: externals, publics: stack, PEC, register: -SSKDEF 001b ;128 Words Init_RB REGBANK ;not need just example CGROUPs, DGROUPs: -ROM_C_Group CGROUP Init_sec code: -Init_sec SECTION CODE 'INIT_ROM' Init_proc PROC TASK Init_167_Tsk INTNO Init_167_Int ASSUME DPP3:SYSTEM DPP3,#3d ;system datapage RESET Value ;necessary next instruction
;system configuration SYSCON, BUSCON0, BUSCON1 BUSCON2: SYSCON, #0010000100000100b ;(2104H) ;^^^^||||^^^^^|||+XPER-SHARE: share X-Periph ;^^^^||||^^^^^||+VISIBLE: visible mode XPeriph ;^^^^||||^^^^^|+XRAMEN: XRAM selected ;^^^^||||^++++ don't care ;^^^^||||+ WRCFG: write configuration ;^^^^|||+ CLKEN: ENables system clock output P3.15 ;^^^^||+ BYTDIS: ENable ;^^^^|+ ROMEN: int. DISable ;^^^^+ SGTDIS: segmented memory model ;^^^+ ROMS1: mapping segment ;+++ STKSZ: Words system stack size #0000010010111111b ;(04BFH) ;^^^^||||^^^^++++ MCTC 1111 ;^^^^||||^^^+ RWDC0 delay ;^^^^||||^^+ MTTC0
BUSCON0,
Semiconductor Group
AP1632 06.96
Using (SPI) Interface Multimaster System
;^^^^||||++ BTYP mode: Bit, DEMUX ;^^^^|||+ don't care ;^^^^||+ ALECTL0 lengthening ;^^^^|+ BUSACT0 enables BUSCONx function ;^^^^+ don't care ;^^^+ RDYEN0 DISables READY# function ;^^+ don't care always BUSCON0 BUSCON1, #0000010010111111b ;(04BFH) ;^^^^||||^^^^++++ MCTC 1111 ;^^^^||||^^^+ RWDC0 delay ;^^^^||||^^+ MTTC0 ;^^^^||||++ BTYP mode: Bit, DEMUX ;^^^^|||+ don't care ;^^^^||+ ALECTL0 lengthening ;^^^^|+ BUSACT0 enables BUSCONx function ;^^^^+ don't care ;^^^+ RDYEN0 DISables READY# function ;^^+ don't care address chip select #0000000000000100b ;(0004H) ;^^^^||||^^^^++++ range size ;++++++++++++start address 0000 (1st 64K-block)
ADDRSEL1,
;MOV BUSCON2, #0000010001111101b ;(047DH) EXAMPLE NEEDED! ;^^^^||||^^^^++++ MCTC 1110 ;^^^^||||^^^+ RWDC1 with delay ;^^^^||||^^+ MTTC1 ;^^^^||||++ BTYP mode: 8Bit ;^^^^|||+ don't care ;^^^^||+ ALECTL1 lengthening ;^^^^|+ BUSACT1 enables BUSCONx function ;^^^^+ don't care ;^^^+ RDYEN1 DISables READY# function ;^^+ don't care address chip select ;MOV ADDRSEL2, #0001000000010000b ;(1010H) EXAMPLE NEEDED! ;^^^^||||^^^^++++ range size ;++++++++++++start address 1000 (2nd 4K-block 1M-border) CP,#Init_RB overwrites default value ;NOP necessary next instruction FC00 reset value (Stack Pointer) STKUN FC00 reset value (STacK UNderflow) STKOV,#0FC00H+512 ;STacK OVerflow base +(128 Word 256Bytes) DISWDT EINIT DPP0,#2d TRAP #JMP_MAIN STAY_IDLE: IDLE ;disable watchdog timer ;end initialization ;page data ;jump main program ;IDLE-MODE should never reached, smthg wrong!
Semiconductor Group
AP1632 06.96
Using (SPI) Interface Multimaster System
STAY_IDLE RETV ;NEVERENDING stay IDLE mode forever avoid warning 'missing return'
Init_proc ENDP Init_sec ENDS -END
Semiconductor Group
AP1632 06.96
Using (SPI) Interface Multimaster System
Linker locater control file SSC.ILO
;***** SSC.ILO ***** (for EVA167-monitor HITEX) TASK INIT_167.lno TASK SSC.lno INIT_SYS.lno INIT_SSC.lno TX_SSC.lno TASK KEY_INT.lno TASK SSC_SCAN.lno TASK RUNLIGHT.lno TASK TX_INT.lno TASK RX_INT.lno IRAMSIZE(2048) CLASSES ('INIT_ROM' CLASSES ('CPROGRAM' CLASSES ('CNEAR' CLASSES ('CINITROM' ;CLASSES ('CUSTACK' CLASSES ('CBITS' VECTAB (1000H) INTNO INTNO ;task-name, RESET ;filename [.LNO] ;Task-Name, Int.Name Nr.= SW-INTERRUPT ;filename [.LNO]
INTNO INTNO INTNO INTNO INTNO
;Task-Name, Int.Name Nr.= TIMER0-INTERRUPT ;filename [.LNO] ;Task-Name, Int.Name Nr.= TIMER2-INTERRUPT ;filename [.LNO] ;Task-Name, Int.Name Nr.= TIMER5-INTERRUPT ;filename [.LNO] ;Task-Name, Int.Name Nr.= SSC-TX-INTERRUPT ;filename [.LNO] ;Task-Name, Int.Name Nr.= SSC-RX-INTERRUPT ;filename [.LNO] ;Internal size KBytes C167
(0A100H-0A200H)) (0A300H-0AFFFH)) (0B000H-0B1FFH)) (0B200H-0B3FFH)) (0B400H-0B5FFH)) (0FD00H-0FD01H))
;code INIT_167 source file, start ;code area modules ;byte word variables arrays ;not needed here user stack) ;bit variables
user interrupt vector table location
;Memory reservation EVA167/165 with HITEX Monitor Telemon RESERVE MEMORY (00000H-00221H, 01200H-0A00AH, 0FA00H-0FA3FH, 0FCC0H-0FCDFH))
Semiconductor Group
AP1632 06.96
(SPI) Interface
Locater output file SSC.MAP
SN070076-042 Date: 1996
80166 linker/locator v5.0 Memory
Name Start Length Type Algn Comb Group Class -Reserved. 000000h 000221h 000222h ?INTVECT. 001000h 001003h 000004h ?INTVECT. 001080h 001083h 000004h ?INTVECT. 001088h 00108Bh 000004h ?INTVECT. 001094h 001097h 000004h ?INTVECT. 0010B4h 0010B7h 000004h ?INTVECT. 0010B8h 0010BBh 000004h ?INTVECT. 001140h 001143h 000004h Reserved. 001200h 00A00Ah 008E0Bh Init_sec. 00A100h 00A12Dh 00002Eh CODE WORD PRIV ROM_C_Group. INIT_ROM. SSC_3_PR. 00A300h 00A325h 000026h CODE WORD PUBL CPROGRAM. INIT_SYS_1_PR. 00A320h 00A3FFh 0000E0h CODE WORD PUBL CPROGRAM. INIT_SSC_1_PR. 00A400h 00A425h 000026h CODE WORD PUBL CPROGRAM. TX_SSC_1_PR. 00A426h 00A45Fh 00003Ah CODE WORD PUBL CPROGRAM. KEY_INT_1_PR. 00A460h 00A587h 000128h CODE WORD PUBL CPROGRAM. SSC_SCAN_1_PR. 00A588h 00A5C7h 000040h CODE WORD PUBL CPROGRAM. RUNLIGHT_1_PR. 00A5C8h 00A605h 00003Eh CODE WORD PUBL CPROGRAM. TX_INT_1_PR. 00A606h 00A653h 00004Eh CODE WORD PUBL CPROGRAM. RX_INT_1_PR. 00A654h 00A72Dh 0000DAh CODE WORD PUBL CPROGRAM. RX_INT_2_NB. 00B000h 000000h DATA WORD PUBL C166_DGROUP. CNEAR. TX_INT_2_NB. 00B000h 000000h DATA WORD PUBL C166_DGROUP. CNEAR. SSC_SCAN_2_NB. 00B000h 000000h DATA WORD PUBL C166_DGROUP. CNEAR. KEY_INT_2_NB. 00B000h 000000h DATA WORD PUBL C166_DGROUP. CNEAR. SSC_1_NB. 00B000h 00B049h 00004Ah DATA WORD PUBL C166_DGROUP. CNEAR. C166_BSS. 00B200h 00B209h 00000Ah DATA WORD GLOB CINITROM. Extended Area. 00F000h 00F1FFh 000200h ESFR_AREA.! 00F000h 00F1D7h 0001D8h DATA WORD DATAGRP. Reg. bank 00F600h 00F601h 000002h WORD Reg. bank 00F602h 00F621h 000020h WORD Reg. bank 00F622h 00F641h 000020h WORD Reg. bank 00F642h 00F661h 000020h WORD Reg. bank 00F662h 00F681h 000020h WORD Reg. bank 00F682h 00F6A1h 000020h WORD Reg. bank 00F6A2h 00F6C1h 000020h WORD Reserved. 00FA00h System Stack. 00FB00h 00FA3Fh 00FBFFh
000040h
000100h
Semiconductor Group
(SPI) Interface
Reserved. SFR_AREA1. SSC_2_BI. Area. SFR_AREA.! Interrupt table: 00FCC0h 00FCE0h 00FD00h.00 00FE00h 00FE00h 00FCDFh 00FCFFh 00FD00h.01 00FFFFh 00FFD7h 000020h 000020h 000002h 000200h 0001D8h DATA DATA WORD WORD PUBL DATAGRP. DATAGRP.
CBITS.
Vector Intno Start Intnoname Taskname -0000000h 0000h 000A100h Init_167_Int. Init_167_Tsk. 0000080h 0020h 000A460h KEY_INT_INUM. KEY_INT_TASK. 0000088h 0022h 000A588h SSC_SCAN_INUM. SSC_SCAN_TASK. 0000094h 0025h 000A5C8h RUNLIGHT_INUM. RUNLIGHT_TASK. 00000B4h 002Dh 000A606h TX_INT_INUM. TX_INT_TASK. 00000B8h 002Eh 000A654h RX_INT_INUM. RX_INT_TASK. 0000140h 0050h 000A300h SSC_INUM. SSC_TASK. Error report
141: module INIT_167.lno(init_167): overlapping memory ranges 'SFR_AREA' 'SFR Area' 141: module INIT_167.lno(init_167): overlapping memory ranges 'ESFR_AREA' 'Extended total errors: warnings:
Semiconductor Group
Using (SPI) Interface Multimaster System
Miscellaneous files compiling
FILE MAKE.BAT:
mk166 ssc.mak >error.txt
FILE SSC.MAK:
Makefile "ssc.mak" made A.Hettmann, Siemens, Cupertino, 03/96 This HITEX simulator LIGHT BSO/T. need these kind enviroment: PATH TMPDIR=C:\TEMP
**** CREATE HITEX-FILES This done with Symbol preprocessor C166 V2.31 "SP166TA.EXE" ssc.sym: ssc.695 ssc.695 IEEE695-FILTER ssc.695: ssc.out ieee166 ssc.out ssc.695 HEX-CONVERTER CREATE HEX-FILES ihex166 ssc.out ssc.hex LOCATER CREATE ABSOLUTE OBJEKT-FILE ssc.out: init_167.lno ssc.lno init_ssc.lno key_int.lno rx_int.lno tx_int.lno runlight.lno ssc_scan.lno init_sys.lno tx_ssc.lno ssc.ilo L166 @ssc.ilo NOVECINIT ssc.out LINKER init_167.lno: init_167.obj L166 init_167.obj sg_sfrta.obj init_167.lno ssc.lno: ssc.obj L166 ssc.obj ssc.lno init_ssc.lno: init_ssc.obj L166 init_ssc.obj init_ssc.lno key_int.lno: key_int.obj L166 key_int.obj key_int.lno rx_int.lno: rx_int.obj L166 rx_int.obj rx_int.lno tx_int.lno: tx_int.obj L166 tx_int.obj tx_int.lno runlight.lno: runlight.obj L166 runlight.obj runlight.lno ssc_scan.lno: ssc_scan.obj L166 ssc_scan.obj ssc_scan.lno init_sys.lno: init_sys.obj L166 init_sys.obj init_sys.lno tx_ssc.lno: tx_ssc.obj L166 tx_ssc.obj tx_ssc.lno ASSEMBLER MAINPROGRAM
Semiconductor Group
AP1632 06.96
Using (SPI) Interface Multimaster System
ssc.obj: ssc.src A166 ssc.src CASE ASSEMBLER INIT init_ssc.obj: init_ssc.src A166 init_ssc.src CASE ASSEMBLER INTERRUPT SERVICE ROUTINE key_int.obj: key_int.src A166 key_int.src CASE ASSEMBLER RECEIVE INTERRUPT SERVICE ROUTINE rx_int.obj: rx_int.src A166 rx_int.src CASE ASSEMBLER TRANSMIT INTERRUPT SERVICE ROUTINE tx_int.obj: tx_int.src A166 tx_int.src CASE ASSEMBLER RUNLIGHT INTERRUPT SERVICE ROUTINE runlight.obj: runlight.src A166 runlight.src CASE ASSEMBLER SCAN INTERRUPT SERVICE ROUTINE ssc_scan.obj: ssc_scan.src A166 ssc_scan.src CASE ASSEMBLER SYSTEM INIT init_sys.obj: init_sys.src A166 init_sys.src CASE ASSEMBLER TRANSMIT ROUTINE tx_ssc.obj: tx_ssc.src A166 tx_ssc.src CASE C-COMPILER MAINPROGRAM ssc.src: ssc.c ssc.h C166 ssc.c C-COMPILER INIT init_ssc.src: init_ssc.c ssc.h C166 init_ssc.c C-COMPILER INTERRUPT SERVICE ROUTINE key_int.src: key_int.c ssc.h C166 key_int.c C-COMPILER RECEIVE INTERRUPT SERVICE ROUTINE rx_int.src: rx_int.c ssc.h C166 rx_int.c C-COMPILER TRANSMIT INTERRUPT SERVICE ROUTINE tx_int.src: tx_int.c ssc.h C166 tx_int.c C-COMPILER RUNLIGHT INTERRUPT SERVICE ROUTINE runlight.src: runlight.c ssc.h C166 runlight.c C-COMPILER SCAN INTERRUPT SERVICE ROUTINE
Semiconductor Group
AP1632 06.96
Using (SPI) Interface Multimaster System
ssc_scan.src: ssc_scan.c ssc.h C166 ssc_scan.c C-COMPILER SYSTEM INIT init_sys.src: init_sys.c ssc.h C166 init_sys.c C-COMPILER TRANSMIT ROUTINE tx_ssc.src: tx_ssc.c ssc.h C166 tx_ssc.c ASSEMBLER INIT init_167.obj: init_167.src A166 init_167.src CASE
FILE SETPATH.BAT:
PROMPT "setpath.bat" prepare enviroment PECR167 demo EVAL167 with Tasking Evaluation Package SAB-C167 Harald Lehmann, SIEMENS, cupertino 11'95 CCDEMO=c:\EVAL167\TASKING c166t.lib LOCATE166=CASE prompt $p$g
FILE BOOT.BAT:
\eval167\hitex\btld eva167.hex
FILE BTDL.CFG:
configuration file BTLD bootstrap loader Siemens V1.00 Copyright 1994 Hitex Systementwicklung GmbH supported keywords values: communication port, selection BAUD baudrate, selection 9600/19200/38400 TYPE type processor, selection 8xC166, C165/C167) SYSCON hexadecimal value register SYSCON loaded BUSCON0 hexadecimal value register BUSCON0 loaded BUSCON1 hexadecimal value register BUSCON1 loaded ADDRSEL1 hexadecimal value register ADDRSEL1 loaded BUSCON2 hexadecimal value register BUSCON2 loaded ADDRSEL2 hexadecimal value register ADDRSEL2 loaded BUSCON3 hexadecimal value register BUSCON3 loaded
Semiconductor Group
AP1632 06.96
Using (SPI) Interface Multimaster System
ADDRSEL3 hexadecimal value register ADDRSEL3 loaded BUSCON4 hexadecimal value register BUSCON4 loaded ADDRSEL4 hexadecimal value register ADDRSEL4 loaded default value named busconfiguration registers 0000 BAUD 38400 TYPE C167 SYSCON 2100 ADDRSEL1 BUSCON0 04BF BUSCON1 04BF SYSCON, #0010000100000000b ;(2100H) ;^^^^||||^^^^^|||+XPER-SHARE: share X-Periph ;^^^^||||^^^^^||+VISIBLE: visible mode XPeriph ;^^^^||||^^^^^|+XRAMEN: XRAM deselected ;^^^^||||^++++ don't care ;^^^^||||+ WRCFG: write configuration ;^^^^|||+ CLKEN:1 ENables system clock output P3.15 ;^^^^||+ BYTDIS: ENable ;^^^^|+ ROMEN: int. DISable ;^^^^+ SGTDIS: segmented memory model ;^^^+ ROMS1: mapping segment ;+++ STKSZ: Words system stack size BUSCON0, #0000010010111111b ;(04BFH) ;^^^^||||^^^^++++ MCTC 1111 ;^^^^||||^^^+ RWDC0 delay ;^^^^||||^^+ MTTC0 ;^^^^||||++ BTYP mode: Bit, DEMUX ;^^^^|||+ don't care ;^^^^||+ ALECTL0 lengthening ;^^^^|+ BUSACT0 enables BUSCONx function ;^^^^+ don't care ;^^^+ RDYEN0 DISables READY# function ;^^+ don't care always BUSCON0 BUSCON1, #0000010010111111b ;(04BFH) ;^^^^||||^^^^++++ MCTC 1111 ;^^^^||||^^^+ RWDC0 delay ;^^^^||||^^+ MTTC0 ;^^^^||||++ BTYP mode: Bit, DEMUX ;^^^^|||+ don't care ;^^^^||+ ALECTL0 lengthening ;^^^^|+ BUSACT0 enables BUSCONx function ;^^^^+ don't care ;^^^+ RDYEN0 DISables READY# function ;^^+ don't care address chip select ADDRSEL1, #0000000000000100b ;(0004H) ;^^^^||||^^^^++++ range size ;++++++++++++start address 0000 (1st 64K-block)
Semiconductor Group
AP1632 06.96
Using (SPI) Interface Multimaster System
FILE HIT1.BAT:
\166\hitex\mon\hit_167.exe -b384 -rhit_167.rst used command line parameters HIT_167.EXE: COM1 communication -b384 38400 baud assume reloading recent used files -rhit_167.rst restore file hit_167.rst
Semiconductor Group
AP1632 06.96
Using (SPI) Interface Multimaster System
display board schematic
CONNECTOR EDGE50 (+5V) (+5V) P5.0 P5.1 P5.2 P5.3 P5.4 P5.5 P5.6 P5.7 P5.8 P5.9 VAGND VAREF P2.0 P3.0 P2.1 P3.1 P2.2 P3.2 P2.3 P3.3 P2.4 P3.4 P2.5 P3.5 P2.6 P3.6 P2.7 P3.7 P2.8 P3.8 P2.9 P3.9 P2.10 P3.10 P2.11 P3.11 P2.12 P3.12 P2.13 P3.13 P2.14 P3.14 P2.15 P3.15
CON3 SW-PB CON3
LED_ARRAY4
LED_ARRAY4
LED_ARRAY4
LED_ARRAY4
Title Size Date: File:
TRAINING
Number Revision 31-May-1996 Sheet F:\CLIENT\SCH3\MCB\MCB_FAE3.SCH W.MILLER Drawn
Rem.: Jumpers Board between P2.1 P3.1 (Bit LSB), P2.2 P3.2 (Bit P2.3 P3.3 (Bit P2.4/P3.4 (Bit MSB). When P2.1 through P2.4 log. `1', reading input levels P3.1 through P3.4 results log. positions with jumper log. without jumper. Additionally, there have jumpers CON3 connectors that pushing button results transition P3.0
Semiconductor Group
AP1632 06.96
Other recent searches
TN0201K - TN0201K TN0201K Datasheet
TN0201KL - TN0201KL TN0201KL Datasheet
TMS470R1x - TMS470R1x TMS470R1x Datasheet
TISP7072F3 - TISP7072F3 TISP7072F3 Datasheet
TISP7082F3 - TISP7082F3 TISP7082F3 Datasheet
TISP70xxF3 - TISP70xxF3 TISP70xxF3 Datasheet
PHE448 - PHE448 PHE448 Datasheet
LPC11C22 - LPC11C22 LPC11C22 Datasheet
LB11891V - LB11891V LB11891V Datasheet
DS512 - DS512 DS512 Datasheet
DRV592 - DRV592 DRV592 Datasheet
AVR104 - AVR104 AVR104 Datasheet
Privacy Policy | Disclaimer
© 2012 Datasheet Archive
