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AP1625 additional file Software emulation 2C-bus using time


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AP162501.EXE available
AP1625
additional file
Software emulation 2C-bus using time C166 family
This software emulation 2C-bus using time C166 family generate clock data. 2C-bus used many applications mainly communicate between devices connected bus.
Author: Choon Hock SCPL
Semiconductor Group
2.97, Rel.
Software emulation C-bus using time C166 family
Introduction 2C-bus
C-bus Specifications
Data Transfer Formats Timing Diagram Hardware Connection. Software Description Software Concept. Description Module Subroutines Software Compilation
AP1625 ApNote Revision History Actual Revision Rel. Previous Revision: none Page Page actual Rel. prev. Rel.
Semiconductor Group
AP1625 2.97
Software emulation 2C-bus using time C166 family
Introduction 2C-bus
2C-bus Inter-Integrated Circuit been developed Philips. allows integrated circuits communicate directly with each other simple bi-directional 2wire bus. lines serial clock line (SCL), serial data line (SDA). Nowadays, C-bus becomes standard system which used consumer electronics, telecommunications, industrial electronics. This software module 2Cbus emulation supports single master protocol only. using time generate clock, transmit receive data. clock frequency 2C-bus achieve with C16x microcontroller.
2C-bus Specifications Data Transfer formats
HIGH-to-LOW transition data line (SDA) while clock line (SCL) HIGH indicates START condition. LOW-to-HIGH transition while HIGH defines STOP condition. data line only changed when clock signal line LOW. Therefore, data line must stable during HIGH period clock signal. considered busy after START condition considered free certain time interval after STOP condition. Each information puts line must 8-bit long. data transferred serially with most significant first, followed acknowledge bit. clock pulse acknowledge generated master. transmitting device release line (HIGH high impedance state) during this clock pulse while device that needs acknowledge pull down line during this clock pulse. number data bytes transferred between START STOP condition from transmitter receiver limited. receiver obliged generate acknowledge after each byte data that been received. When receiver does provide acknowledge after having received byte data, data line must left HIGH high impedance state slave. master then generate STOP condition abort transfer. reasons receiver provide acknowledge that receiver performing some real-time function. master receiving data, must signal data slave generating acknowledge last byte data received. Then, slave must release data line allow master generate STOP condition.
Semiconductor Group
AP1625 2.97
Software emulation 2C-bus using time C166 family
complete data transfer format shown Figure After START condition, slave address sent. address bits long followed which data direction (R/W). data direction indicates transmission (WRITE), indicates request data (READ). Figure shows 2C-bus data transfer format writing data from master slave device. Figure shows data transfer format reading data from slave device. data transfer always terminated STOP condition generated master. However, master still wishes communicate bus, generate repeated START condition address same device another slave device without first generating STOP condition. This combined data transfer format shown figure
Start Condition
Address
Data
Data
Stop Condition
AAAAAAAA AAAAAAAAAAAAAAAA AAAA AAAA AAAA AAAAAAAA AAAAAAAAAA AAAAAAAA AAAAAAAAAAAAAAAA AAAA AAAA AAAA AAAA AAAAAAAA AAAAAAAA AAAAAAAA AAAA AAAAAAAA AAAA AAAAAAAA Slave Address AAAA AAAA AAAAAAAAAAAA PAAAA AAAAAAAA AAAAAAAA AAAAAAAA AAAAAAAAAAAAAAAA AAAA Data A/NA AAAA AAAAAAAA AAAAAAAAAAAAAAAA AAAA AAAA AAAA AAAAAAAA AAAA AAAAAAAA AAAAAAAAAAAAAAAA AAAA AAAAAAAAAAAAAAAAAAAA AAAA AAAA AAAAAAAAAAAAAAAAAAAA AAAAAAAAAAAAAAAAAAAAAAAA AAAA AAAAAAAA AAAAAAAA AAAAAAAA AAAAAAAA AAAAAAAA AAAA AAAA AAAAAAAA AAAAAAAA AAAAAAAA
Start-Frame Read- rite-Frame Stop-Frame
Transfer-Frame
AAAAAAAA AAAAAAAA AAAAAAAA from master slave. AAAAAAAA AAAAAAAA AAAAAAAA
AAAAAAAA AAAAAAAA from master slave AAAAAAAA AAAAAAAA form slave master depends AAAAAAAA AAAAAAAA bit.
from slave master.
A/NA Acknowledge.(SDA LOW) acknowledge(SDA HIGH) last data read master.
Figure complete data transfer format 2C-bus
Semiconductor Group
AP1625 2.97
Software emulation 2C-bus using time C166 family
AAAAAAAA AAAAAAAAAAAAAAAAAAA AAAA AAAAAAAA AAAAAAAAAAAAAAAAAAA AAAAAAA AAAAAAAA AAAAAAAAAAAAAAAAAAA AAAAAAA Address AAAAAAA AAAAS AAAASlaveAAAAAAAAAAA AAAAAAAA AAAAAAAAAAAAAAAAAAA AAAA AAAA AAAAAAAAAAAAAAA AAAAAAAA AAAAAAAA AAAAAAA
AAAAAAAAAAAAAAAAAAAAAAAA AAAAAAAAAAAAAAAAAAAAAAAA AAAAAAAA AAAAAAAAAAAAAAAAAAAAAAAA AAAAAAAAAAAAAAAAAAAAAAAA AAAAAAAA AAAAAAAAAAAAAAAAAAAAAAAA AAAAAAAAAAAAAAAAAAAAAAAA AAAAAAAA Data Data AAAAAAAAAAAAAAAAAAAAAAAA AAAAAAAAAAAAAAAAAAAAAAAA AAAAAAAA AAAAAAAAAAAAAAAAAAAAAAAA AAAAAAAAAAAAAAAAAAAAAAAA AAAAAAAA AAAAAAAA AAAAAAAAAAAAAAAA AAAAAAAAAAAAAAAAAAAAAAAA AAAAAAAA
Data transfer bytes acknowledge)
(WRITE)
AAAAAAA AAAAAAA AAAAAAA AAAAAAA
From master slave.
From slave master.
Figure 2C-bus data transfer format writing data slave
AAAAAAAAA AAAAAAAAAAAAAAA AAAA AAAAAAA AAAAAAAAA AAAAAAAAAAAAAAA AAAAAAAA AAAA AAAA AAAAS AAAASlaveAAAAAAAAAAA Address AAAAAAA AAAAAAAAA AAAAAAAAAAAAAAA AAAAAAAAAAAAAAAAAAA AAAAAAA AAAAAAAAA AAAAAAAAAAAAAAA AAAA AAAAAAA AAAAAAAAA AAAA AAAA
Data
AAAAAAA AAAAAAA AAAAAAA AAAAAAA AAAAAAA AAAAAAA
Data
AAAAAA AAAAAAAA AAAAAA AAAAAAAA AAAAAA AAAAAAAA AAAAAA AAAAAAAA AAAAAA AAAAAAAA AAAAAA AAAAAAAA
Data transfer bytes aknowledge) (READ)
AAAAAA AAAAAA AAAAAA AAAAAA AAAAAA
From master slave.
From slave master.
acknowledge last data received. (SDA HIGH)
Figure 2C-bus data transfer format reading data from slave
Semiconductor Group
AP1625 2.97
Software emulation 2C-bus using time C166 family
AAAAAAA AAAAAAAAAAAAAAA AAAA AAAA AAAAAAA AAAAAAAAAAAAAAA AAAA AAAAAAA Slave1 ddress AAAAAAA AAAAAAAAAAAAAAAA AAAAAAA AAAAAAA AAAAAAAAAAAAAAA AAAAAAAAAAAAAAAAAAA AAAA AAAAAAA AAAA AAAA
read rite
AAAA AAAAAAAA Slave1 AAAAAAAAAAA AAAAAAAAAAAAAAAAAAA AAAAAAAA ddress AAAA AAAAAAA
AAAAAAAAAAAAAAAAAAA AAAAAAA AAAA AAAAAAA AAAAAAAAAAAAAAAAAAA AAAA AAAAAAA AAAAAAAAAAAAAAAAAAA AAAA
bytes ack.)
read rite repeated condition
AAAAAAA AAAAAAA AAAAAAA AAAAAAA AAAAAAA AAAAAAA
bytes ack.)
AAAAAAA AAAAAAA AAAAAAA AAAAAAA AAAAAAA AAAAAAA
From aster slave.
Transfer dirction data acknow ledge depend bit.
acknow ledge. acknow ledge last data read aster.
Figure
combined data transfer format C-bus
Semiconductor Group
AP1625 2.97
Software emulation 2C-bus using time C166 family
Timing Diagram
clock frequency range KHz. clock C-bus minimum period minimum HIGH period
Occasionally, slave device slow down transmission holding clock line after receiving byte data from microcontroller. This event defined WAIT condition. Therefore, master needs switch output high impedance read line before transmitting another byte data slave device. Figure shows data transfer timing requirements detail. description abbreviations used shown Table minimum timing requirements needed fulfilled order 2C-bus operate properly.
Stop Start
Repeat tart Stop
HIGH
tHD;STA
tHD;STA
HD;DA
SU;DAT tSU;STA tSU;STO
Figure
C-bus timing diagram
Semiconductor Group
AP1625 2.97
Software emulation 2C-bus using time C166 family
Table Abbreviation C-bus timing diagram Parameter Symbol Limit Values min. free time between STOP START condition Hold time START condition. After this period, first pulse generated. HIGH period clock. period clock. Data hold time Rise time both signals. Fall time both signals. Data set-up time Set-up time repeated START condition. Set-up time STOP condition. clcok frequency Capacitor load each line tBUF tHD;STA tHIGH tLOW tHD;DAT tSU;DAT tSU;STA tSU;STO fSCL max. Unit
device must internally provide hold time least signal order bridge undefined region falling edge SCL.
Semiconductor Group
AP1625 2.97
Software emulation 2C-bus using time C166 family
Hardware Connection
Every device connected 2C-bus must have open drain/open collector output both clock (SCL) data (SDA) lines. Each lines connected supply common pull-up resistor value. connection among master many slave devices shown figure number devices that connected 2C-bus limited only maximum load capacitance
C16x
Figure Hardware connection among master slave devices
Semiconductor Group
AP1625 2.97
Software emulation 2C-bus using time C166 family
Software Description Software Concept
clock data 2C-bus generated time C16x microcontroller. clock frequency 2C-bus with microcontroller. Basically, time delay count-down WHILE loop, time delay depending input parameter count-down value. clock less that MHz, this software module modified achieve frequency. software modification involves reducing eliminating time delay. addition, check WAIT condition before every byte sent received rather than checking WAIT condition before every sent received.
This software module very suitable those C-bus applications that time critical. because this software module interrupted others software modules that involved hardware interrupts. other words, this software module equivalent those software modules with lowest priority interrupt level. different types software methods that used time critical applications 2C-bus timer interrupt, C-bus High-Speed Synchronous Serial channel C16x microcontroller.
advantage using time generate clock data that does hardware peripheral C16x microcontroller. Therefore, those hardware peripherals reserved other time critical software application. I2C_SW.C software module divided into software subroutines which accessed main external program. Those software subroutines used construct data transfer format 2C-bus. Those software subroutines I2cInit, I2cStart, I2cMasterWrite, I2cMasterRead, I2cStop. types data transfer format (master write, master read/combined format) written I2CSW_TS.C. I2CSW_TS.C simple test program which just verify I2C_SW.C software module. This test program transmit bytes data E2PROM from array location microcontroller. bytes data will stored word address E2PROM Next, microcontroller will read back contents bytes from word address E2PROM then store into another array location microcontroller.
Semiconductor Group
AP1625 2.97
Software emulation 2C-bus using time C166 family
Description Module Subroutines
C-BUS Software Module
Source file: Header file: User definition file: I2C_SW.C I2C.DEF
Description This module standard 2C-bus single master protocol using time C16x microcontroller. clock well transmit/receive data handled time delay.
Module Subroutines void Delay(unsigned count); void CheckClock(); unsigned char Check_SCL(); unsigned char I2cInit(); void I2cStart(); unsigned char I2cMasterWrite(unsigned char input_byte); unsigned char I2cMasterRead(unsigned char ack); unsigned char I2cStop();
void Delay(unsigned count) create time delay clock data signal. Parameter unsigned count Description number count time delay.
Semiconductor Group
AP1625 2.97
Software emulation 2C-bus using time C166 family
void CheckClock() Send HIGH read line. will wait until line been released from slave device every data sent received. Parameter None Description
unsigned char Check_SCL() Send HIGH read line. will wait until line been released from slave device with time-out Parameter None Description
Return return value clock data lines have problem. Otherwise, return value will "1".
unsigned char I2cInit() Check clock data lines faulty like pull-up resistor SDA/SCL pull-down slave device. Parameter None Description
Return return value clock data lines have problem. Otherwise, return value will "1".
void I2cStart() Generate START condition 2C-bus. Parameter None Description
Semiconductor Group
AP1625 2.97
Software emulation 2C-bus using time C166 family
unsigned char I2cMasterWrite(unsigned char input_byte) Output byte data slave device. Check WAIT condition before every sent. Parameter unsigned char Description byte data sent slave device.
input_byte
Return return value "0", writing byte data slave device successfully. Otherwise, byte data needed sent again because there acknowledge from slave device.
unsigned char I2cMasterRead(unsigned char ack) Read byte data from slave device. Check WAIT condition before every received. Parameter unsigned char Description
generate output master after byte data received. generate HIGH output master after byte data received.
Return return value "0", reading byte data from slave device successfully. Otherwise, byte data needed received again because there acknowledge from slave device.
unsigned char I2cStop() Generate STOP condition 2C-bus. addition, will generate clock pulses until line released slave device time-out before returning "HIGH" value indicating error. Parameter None Description
Return return value clock data lines have problem. Otherwise, return value will "1".
Semiconductor Group
AP1625 2.97
Software emulation 2C-bus using time C166 family
C-BUS Application Software
Source file: Header file: I2CSW_TS.C I2C_SW.H
Description This program just testing only. purpose this program make standard protocol module (I2C_SW.C) control nonvolatile memory (E2PROM). This program writes bytes data into E2PROM sequence data retrieved from array location microcontroller. Then read back bytes data from E2PROM same location which they have been programmed store them array location microcontroller.
Software subroutines unsigned char CheckWrite(); unsigned char WriteE2prom(unsigned char sub_addr,unsigned char *buffer,unsigned unsigned char ReadE2prom (unsigned char sub_addr,unsigned char *buffer,unsigned
address,signed char count); address,signed char count);
unsigned char CheckWrite() Check completion programming after memory write. programming completed, acknowledge will "0". Parameter None Return return value "0", programming E2PROM consider done. Otherwise, programming E2PROM still progress. Description
Semiconductor Group
AP1625 2.97
Software emulation 2C-bus using time C166 family
unsigned char WriteE2prom(unsigned char adress, signed sub_addr,unsigned char *buffer,unsigned char count) Write number data bytes E2PROM. flow this subroutine derived from data format writing E2PROM figure Parameter unsigned char address signed sub_addr unsigned char *buffer unsigned char count Return return value "0", programming E2PROM completed. Otherwise, data needed sent again because there acknowledge from slave device. Description specifies slave device address specifies sub-address/word address point location data sent number bytes sent
unsigned char ReadE2prom(unsigned char address, signed sub_addr,unsigned char *buffer,unsigned char count) Read number data bytes from E2PROM. flow this subroutine derived from data format reading from PROM figure Parameter unsigned char address signed sub_addr unsigned char *buffer unsigned char count Description specifies slave device address specifies sub-address point location data stored number bytes received
Return return value "0", reading E2PROM completed. Otherwise, data needed sent again because there acknowledge from slave device.
Semiconductor Group
AP1625 2.97
Software emulation 2C-bus using time C166 family
Software Compilation
compilation this software using KEIL C166 compiler. Firsts all, under PROJECT menu, clicks "New Project", then name this project files project which I2C_SW.C I2CSW_TS.C. Then, save project. After-that, OPTIONS menu click "C166 Compiler." Lastly, select option under OBJECT cross under "Enable 80C167 instructions". This option will allow C16x derivatives. project really compile link object files. compiling linking project done clicking icon "BUILD ALL". AP162501.EXE compressed file contains I2C_SW.H, I2C_DEF, I2C_SW.C, I2CSW_TS.C. these files necessary complete compilation software program.
Semiconductor Group
AP1625 2.97

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