AP1624 additional file Software emulation I2C-bus using Gene

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AP1624 additional file Software emulation I2C-bus using Gene

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AP162401.EXE available
AP1624
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Software emulation I2C-bus using General Purpose Timer unit C166 family
This software emulation I2C-bus using general purpose timers microcontroller from C166 family. I2C-bus used many applications mainly communicate between devices connected bus.
Author: Choon Hock SCPL
Semiconductor Group
1.97, Rel.
Software emulation C-bus using General Purpose Timer unit family
Introduction I2C-bus I2C-bus Specifications Data Transfer Formats. Timing Diagram. Hardware Connection Software Description Software Concept. Description Module Subroutines. Software Compilation.
AP1624 ApNote Revision History Actual Revision Rel. Previous Revision: none (Original Version) Page Page actual Rel. prev. Rel.
Semiconductor Group
AP1624 1.97
Software emulation I2C-bus using General Purpose Timer unit family
Introduction I2C-bus
I2C-bus Inter-Integrated Circuit been developed Philips. allows integrated circuits communicate directly with each other simple bi-directional 2wire bus. lines serial clock line (SCL), serial data line (SDA). Nowadays, C-bus becomes standard system which used consumer electronics, telecommunications, industrial electronics. This software module I2Cbus emulation supports single master protocol only. using timer interrupt generate clock transmit receive data. clock frequency I2C-bus achieve with C16x microcontroller.
I2C-bus Specification Data Transfer formats
HIGH-to-LOW transition data line (SDA) while clock line (SCL) HIGH indicates START condition. LOW-to-HIGH transition while HIGH defines STOP condition. data line only changed when clock signal line LOW. Therefore, data line must stable during HIGH period clock signal. considered busy after START condition considered free certain time interval after STOP condition. Each information line must 8-bit long. data transferred serially with most significant first, followed acknowledge bit. clock pulse acknowledge generated master. transmitting device release line (HIGH high impedance state) during this clock pulse while device that needs acknowledge pull down line during this clock pulse. number data bytes transferred between START STOP condition from transmitter receiver limited. receiver obliged generate acknowledge after each byte data that been received. When receiver does provide acknowledge after having received byte data, data line must left HIGH high impedance state slave. master then generate STOP condition abort transfer. reasons receiver provide acknowledge that receiver performing some real- time function. master receiving data, must signal data slave generating acknowledge last byte data received. Then, slave must release data line allow master generate STOP condition.
Semiconductor Group
AP1624 1.97
Software emulation I2C-bus using General Purpose Timer unit family
complete data transfer format shown Figure After START condition, slave address sent. address bits long followed which data direction (R/W). data direction indicates transmission (WRITE), indicates request data (READ). Figure shows I2C-bus data transfer format writing data from master slave device. Figure shows data transfer format reading data from slave device. data transfer always terminated STOP condition generated master. However, master still wishes communicate bus, generate repeated START condition address same device another slave device without first generating STOP condition. This combined data transfer format shown figure
Start Condition
Address
Data
Data
Stop Condition
AAAAAAAA AAAAAAAAAAAAAAAA AAAA AAAA AAAA AAAAAAAAAAAAAAAAAAAAAAAAAAAAA AAAAAAA AAAAAAAAAAAAAAAAAAAAAAAAA AAAAAAAA AAAAAAAA AAAAAAAA AAAAAAAAAAAAAAAA AAAA AAAA AAAA AAAAAAA AAAA AAAAAAAA AAAAAAAA AAAAAAAA SlaveAAAAAAAAAAAA AAAA AAAAAAAAAAAAAAAAAAAAAAAAAAAAA AAAAAAA AAAAAAAAAAAAAAAAAAAAAAAAA AAAAAAAA AAAAAAAA AAAAAAAA ddress AAAA Data Data A/NA AAAAAAAA AAAAAAAAAAAAAAAA AAAA AAAAAAAAAAAAAAAAAAAA AAAA AAAA PAAAA AAAAAAA AAAA AAAAAAAA AAAAAAAA AAAAAAAAAAAAAAAAAAAAAAAAAAAAA AAAAAAAA AAAAAAAAAAAAAAAA AAAA AAAA AAAA AAAAAAA AAAAAAAAAAAAAAAAAAAAAAAAA AAAAAAAAAAAAAAAAAAAAAAAAAAAAA AAAAAAAA AAAAAAAA AAAAAAAA AAAA AAAA AAAAAAAAAAAAAAAAAAAAAAAAAAAAA AAAAAAA AAAA AAAAAAAA AAAA
Start-Frame Read- rite-Frame Stop-Frame
Transfer-Fram
AAAAAAA AAAAAAA AAAAAAA from master slave. AAAAAAA AAAAAAA AAAAAAA
AAAAAAAA AAAAAAAA from master slave AAAAAAAA AAAAAAAA form slave master depends AAAAAAAA AAAAAAAA
bit.
from slave master.
A/NA cknowledge.(SDA acknow ledge(SDA HIGH) last data read master.
Figure complete data transfer format I2C-bus
Semiconductor Group
AP1624 1.97
Software emulation I2C-bus using General Purpose Timer unit family
AAAAAAA AAAAAAAAAAAAAAA AAAA AAAA AAAAAAAAAAAAAAAAAAAAAAAA AAAAAAA AAAAAAAAAAAAAAA AAAA AAAA AAAAAAA SlaveAAAAAAAAAAA AAAAAAAAAAAAAAAAAAAAAAAA AAAAAAAAAAAAAAAAAAAAAAAA AAAAAAAA Address AAAAAA Data AAAAAAA AAAAAAAAAAAAAAA AAAA AAAA AAAAAAAAAAAAAAAAAAAAAAAA AAAAAAA AAAAAAAAAAAAAAA AAAA AAAA AAAAAAAAAAAAAAAAAAAAAAAA AAAAAAA AAAAAAAAAAAAAAA AAAA AAAA AAAAAAAAAAAAAAAAAAAAAAAA
AAAAAAAAAAAAAAAAAAAAAAAA AAAAAAAA AAAAAAAAAAAAAAAAAAAAAAAA AAAAAAAA AAAAAAAAAAAAAAAAAAAAAAAA AAAAAAAA Data AAAAAAAAAAAAAAAAAAAAAAAA AAAAAAAA AAAAAAAAAAAAAAAAAAAAAAAA AAAAAAAAAAAAAAAA AAAAAAAA AAAAAAAA AAAAAAAA
Data transfer bytes acknowledge) (WRITE)
AAAAAAA AAAAAAA AAAAAAA AAAAAAA AAAAAAA
From master slave.
From slave aster.
Figure I2C-bus data transfer format writing data slave
AAAAAA AAAAAAAAAAAAAAA AAAA AAAA AAAAAA AAAAAAAAAAAAAAA AAAA AAAA AAAAAA Slave AAAAAAAAAAAR/W AAAA AAAAAAAA Address AAAAAA AAAAAAAAAAAAAAA AAAA AAAA AAAAAA AAAAAAAAAAAAAAA AAAA AAAAAAAAAAAAAAAAAAA AAAAAA AAAA AAAAAA
Data
AAAAAAA AAAAAAA AAAAAAA AAAAAAA AAAAAAA AAAAAAA
Data
AAAAAAA AAAAAAAA AAAAAAA AAAAAAAA AAAAAAA PAAAA AAAAAAAA AAAAAAAA AAAAAAA AAAA AAAAAAA AAAAAAA AAAAAAAA
Data transfer bytes acknowledge) (READ)
AAAAAA AAAAAA AAAAAA AAAAAA AAAAAA
From master slave.
From slave aster.
acknowledge last data received. (SDA HIGH)
Figure
C-bus data transfer format reading data from slave
Semiconductor Group
AP1624 1.97
Software emulation I2C-bus using General Purpose Timer unit family
AAAAAA AAAAAAAAAAAAAAA AAAA AAAA AAAAAA AAAAAAAAAAAAAAA AAAA AAAA AAAAAA Slave1AAAAAAAAAAAR/W AAAA AAAA AAAAAA AAAAAAAAAAAAAAA AAAAAAAA Address AAAAAA AAAAAA AAAAAAAAAAAAAAA AAAA AAAAAA
read write Data A/NA AAAAAA
Data
A/NAAAAAAAA Slave1 AddressAAAA AAAAAAAAAAAAAAAA AAAA
AAAAAAA AAAAAAAAAAAAAAAA AAAA AAAA AAAAAAA AAAAAAAAAAAAAAAA AAAA AAAA AAAAAAA AAAAAAAAAAAAAAAA AAAA AAAA AAAAAAA AAAAAAAAAAAAAAAA AAAA AAAA
bytes ack.)
read rite repeated START condition
AAAAAA AAAAAA AAAAAA AAAAAA
bytes ack.)
AAAAAA AAAAAA AAAAAA AAAAAA AAAAAA
From master slave.
Transfer dirction data acknow ledge depend bit.
A/NA acknowledge. (SDA acknowledge HIGH) last data read master.
Figure combined data transfer format I2C-bus
Semiconductor Group
AP1624 1.97
Software emulation I2C-bus using General Purpose Timer unit family
Timing Diagram
clock frequency range KHz. clock I2C-bus minimum period 4.7µs, minimum HIGH period 4.0µs. Occasionally, slave device slow down transmission holding clock line after receiving byte data from microcontroller. This event defined WAIT condition. Therefore, master needs switch output high impedance read line before transmitting another byte data slave device. Figure shows data transfer timing requirements detail. description abbreviations used shown Table minimum timing requirements needed fulfilled order I2C-bus operate properly.
Stop Start
Repeat Start Stop
tHIGH
tHD;STA
tBUF tHD;STA
HD;DAT
tSU;DAT tSU;STA SU;STO
Figure I2C-bus timing diagram
Semiconductor Group
AP1624 1.97
Software emulation I2C-bus using General Purpose Timer unit family
Table Abbreviation I2C-bus timing diagram Parameter Symbol Limit Values min. free time between STOP START condition Hold time START condition. After this period, first pulse generated. HIGH period clock. period clock. Data hold time Rise time both signals. Fall time both signals. Data set-up time Set-up time repeated START condition. Set-up time STOP condition. clcok frequency Capacitor load each line tBUF tHD;STA tHIGH tLOW tHD;DAT tSU;DAT tSU;STA tSU;STO max. Unit
device must internally provide hold time least signal order bridge undefined region falling edge SCL.
Semiconductor Group
AP1624 1.97
Software emulation I2C-bus using General Purpose Timer unit family
Hardware Connection
Every device connected I2C-bus must have open drain/open collector output both clock (SCL) data (SDA) lines. Each lines connected supply common pull-up resistor value. connection among master many slave devices shown Figure number devices that connected C-bus limited only maximum load capacitance 400pF.
Figure Hardware connection among master slave devices
Semiconductor Group
AP1624 1.97
Software emulation I2C-bus using General Purpose Timer unit family
Software Description Software Concept
clock data I2C-bus generated timer interrupt C16x microcontroller. clock frequency I2C-bus with microcontroller. reload mode timer required generate clock frequency 100KHz. reload mode requires general purpose timers; timer used core timer (T3) with 400ns resolution, other timer auxiliary timer reload mode (T2). reload value timer which will generate interrupt every 10µs/100KHz((24+1)*400ns) count-down mode. complete cycle clock will generated within timer interrupt service routine. priority timer interrupt lowest which changed depending priority your application. I2C_HW.C software module divided into software subroutines which accessed main external program. Those software subroutines used construct data transfer format C-bus. Those software subroutines CInit, I2CStart, I2CMasterWrite, I2CMasterRead, I2CStop. types data transfer format (master write, master read/combined format) written I2CHW_TS.C. I2CHW_TS.C simple test program which just verify I2C_HW.C software module. This test program transmits bytes data E2PROM from array location microcontroller. bytes data will stored word address E2PROM Next, microcontroller will read back contents bytes from word address E2PROM then store into another array location microcontroller.
Semiconductor Group
AP1624 1.97
Software emulation I2C-bus using General Purpose Timer unit family
Description Module Subroutines
I2C-BUS Software Module
Source file: Header file: User definition file: I2C_HW.C I2C.DEF
Description This module standard I2C-bus single master protocol using timer interrupt. clock well transmit/receive data handled timer interrupt.
Module Subroutines void Delay(unsigned count); unsigned char Check_SCL(); unsigned char I2CInit(); void I2CStart(); void I2CMasterWrite(unsigned char input_byte); void I2CMasterRead(unsigned char ack); unsigned char I2CStop();
void Delay(unsigned count) create time delay clock data signal. Parameter unsigned count Description number count time delay.
Semiconductor Group
AP1624 1.97
Software emulation I2C-bus using General Purpose Timer unit family
unsigned char Check_SCL() Send HIGH read line. will wait until line been released from slave device with time-out
Parameter None
Description
Return return value clock data lines have problem. Otherwise, return value will "1".
unsigned char I2CInit() timer reload mode which requires timers; reload timer, core timer. Those timers will like reload timer have resolution KHz.(1/(400ns 25)). After that, check clock data lines faulty like pull-up resistor SDA/SCL pull-down slave device. Parameter None Description
Return return value clock data lines have problem. Otherwise, return value will "1".
void I2CStart() Generate START condition I2C- bus. Parameter None Description
Semiconductor Group
AP1624 1.97
Software emulation I2C-bus using General Purpose Timer unit family
void I2CMasterWrite(unsigned char input_byte) Check WAIT condition before writing byte data slave device. Set-up first data right after START condition.
Parameter Description unsigned char input_byte byte data sent slave.
void I2CMasterRead(unsigned char ack) Check WAIT condition before reading byte data from slave device. Parameter unsigned char Description
generate output master after byte data received. generate HIGH output master after byte data received.
unsigned char I2CStop() Generate STOP condition bus. addition, will generate clock pulses until line released slave device time-out before returning "HIGH" value indicating error. Parameter None Description
Return return value clock data lines have problem. Otherwise, return value will "1".
Semiconductor Group
AP1624 1.97
Software emulation I2C-bus using General Purpose Timer unit family
I2C-BUS Application Software
Source file: Header file: I2CHW_TS.C I2C_HW.H
Description This program testing only. purpose this program make standard protocol module (I2C_HW.C) control nonvolatile memory (E2PROM). This program writes bytes data into E2PROM sequence data retrieved from array location microcontroller. Then read back bytes data from E2PROM same location which they have been programmed store array location microcontroller.
Software subroutines unsigned char CheckWrite() unsigned char WriteE2prom(unsigned char address,signed sub_addr,unsigned char *buffer,unsigned char count) unsigned char ReadE2prom (unsigned char address,signed sub_addr,unsigned char *buffer,unsigned char count)
unsigned char CheckWrite() Check completion programming after memory write. programming completed, acknowledge will "0". Parameter None Return return value "0", programming E2PROM considered done. Otherwise, programming E2PROM still progress. Description
Semiconductor Group
AP1624 1.97
Software emulation I2C-bus using General Purpose Timer unit family
unsigned char WriteE2prom(unsigned char adress, signed sub_addr,unsigned char *buffer,unsigned char count) Write number data bytes E2PROM. flow this subroutine derived from data format writing E2PROM figure Parameter unsigned char address signed sub_addr unsigned char *buffer unsigned char count Return return value "0", programming E2PROM completed. Otherwise, data needed sent again because there acknowledge from slave device. Description specifies slave device address specifies sub-address/word address point location data sent number bytes sent
unsigned char ReadE2prom(unsigned char address, signed sub_addr,unsigned char *buffer,unsigned char count) Read number data bytes from E2PROM. flow this subroutine derived from data format reading from E2PROM figure Parameter unsigned char address signed sub_addr unsigned char *buffer unsigned char count Return return value "0", reading E2PROM completed. Otherwise, data needed sent again because there acknowledge from slave device. Description specifies slave device address specifies sub-address point location data stored number bytes received
Semiconductor Group
AP1624 1.97
Software emulation I2C-bus using General Purpose Timer unit family
Software Compilation
compilation this software using KEIL C166 compiler. First all, under PROJECT menu, click "New Project", then name this project files project which I2C_HW.C I2CHW_TS.C. Then, save project. After that, OPTIONS menu click "C166 Compiler." Lastly, select option under OBJECT cross under "Enable 80C167 instructions". This option will allow C16x derivatives. project ready compile link object files. compiling linking project done clicking icon "BUILD ALL". AP162401.EXE compressed file contains I2C_HW.H, I2C_DEF, I2C_HW.C, I2CHW_TS.C. these files necessary complete compilation software program.
Semiconductor Group
AP1624 1.97

AP1624 additional file Software emulation I2C-bus using Gene

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