ROX-I DEBUGGING Reference Only Allayer Confidential Debuggin
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ROX-I DEBUGGING
Reference Only Allayer Confidential
Debugging
Overview
This application note created help design debugging switches based Allayer's RoX-I devices, including AL116, AL100A, AL101, AL1000 AL300A.
Design Guide
There only golden rule board design RoX-I devices; ring input, each data control signal needs minimum setup time hold time referencing ring-in clock.
(T0) Sys_CLK (T1) Rout_DT (T3) Rin_DT (T4) Rin_CLK (T5) (T6) (T2)
achieve this, have following timing calculations shown above diagram: Cycle time MHz, 13.3ns Sys_CLK Rout_DT valid, Sys_CLK Rout_DT change, Rout_DT next stage Rin_DT propagation delay, Rin_DT Rin_CLK setup time, Rin_DT Rin_CLK hold time, Rin_CLK from Sys_CLK T4=T3, then NOTE: This valid solution systems Note that AL300A doesn't have dedicated Sys_CLK, use's Rin_CLK clock Rout_DT, same timing relationship applies. Following typical layout diagram.
12/99
Reference Only Allayer Confidential
Debugging
Rout_DT Sys_CLK Device
Rin_DT Rin_CLK Device
Example Packet Forwarding
Sending packet from Ds.Ps (Source Device/Source Port) Dd.Pd (Destination Device/ Destination Port) will involve following protocol messaging flow between source device destination device.
Source Device
Destination Device
SRC_Req Get_Res
DST_Gnt
Data
64-byte data will (DST_Gnt, Data) loop, while Multicast long packets more than Get_Res message. following example captured DB116 reference design board when 64-byte packet sent from (Dev0, Port0) (Dev1, Port0) through multicast. CTLH when idle, while following indicates two-cycle control message. D[31:0] "1's" when idle, continuous "1"s indicate valid data.
12/99
Reference Only Allayer Confidential
Debugging
CONTROL MESSAGE SRC_Req
DIRECTION Dev0->Dev1 Dev0->Dev1
ROCTLH
ROCTL[7:0] 0010 1000 0000 0000 0110 1000 0100 0000 0110 1000 0100 0101 1110 1000 0000 0000 1110 1000 1100 0000
Get_Res
Dev1->Dev0 Dev1->Dev0 Dev0->Dev1 Dev0->Dev1
DST_Gnt
Dev1->Dev0 Dev1->Dev0 Dev0->Dev1 Dev0->Dev1
Data cycles)
direction Dev0->Dev1
RODH
ROD[31:0] Data
Example Table Convergence Message
following example captured DB116 reference design board with table convergence feature turn
Source Device
Destination Device
Table Conv
When address learned device, will generate table convergence message data ring. This message will circulate through whole ring will terminated when loops back original device. table convergence message will periodically generated long entry valid aged out. RODH ROD[31:0] when idle. table convergence message cycles which start with ROD[31:29] "001" RODH "0." following format used message.
12/99
Reference Only Allayer Confidential
Debugging
CYCLE
RODH
ROD[31:29]
ROD[28:26] Device
ROD[25:22] Port
ROD[21:16] Time Stamp
ROD[15:0] [47:32]
CYCLE
RODH
RODH[31:0] MAC[31:0]
Example Register Access
When AL300A issues indirect register read/write command switch device such AL116, will one-cycled command message data ring from AL300A AL116 register write additional one-cycled return message data ring from AL116 AL300 register read. following flow diagram message format. example captured DB116 reference design board with AL300A ring.
AL300A
AL116
Command
Return read)
COMMAND RETURN
RODH
ROD[31:29]
ROD[28:26] Device ROD[28:26] Device
ROD[25:24] Read Write ROD[25:24] Read
ROD[23:16] Register Address ROD[23:16] Register Address
ROD[15:0] Data Write ROD[15:0] Data from Read
RODH
ROD[31:29]
12/99
Reference Only Allayer Confidential
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