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QUAD 8-BIT MULTIPLYING CONVERTER 8408RP VREF VREFA
Top Searches for this datasheetPACE PRODUCTS QUAD 8-BIT MULTIPLYING CONVERTER 8408RP VREF VREFA Latch Tri-State Buffer RFBA 2A/OUT (LSB) DATA (MSB) Bi-Directional Line Driver Latch Tri-State Buffer IOUT RFBB RFBC Latch Tri-State Buffer Control Logic Latch IOUT 2C/OUT Memory RFBD Tri-State Buffer DGND VREF VREFD FEATURES Four DACs 28-pin RAD-PAK® endpoint linearity Microprocessor compatible TTL/CMOS compatible Four quadrant multiplication Single supply operation (5V) power consumption Total dose tolerant krads (Si); dependent orbit mission life Single event latchup immune DESCRIPTION: Space Electronics' 8408RP monolithic quad 8-bit multiplying digitalto-analog CMOS converter. Each reference input, feedback resistor, onboard data latches that feature read/write capability. readback function serves memory those systems requiring selfdiagnostics. common 8-bit TTL/CMOS compatible input port used load data into four data-latches. Control lines DS1, DS2, determine which will accept data. Data loading similar that RAMs write cycle. Data read back onto same data with control line R/W. 8408RP compatible with most 8-bit microprocessors, including 6800, 8080, 8085, Z80. device operates single supply dissipates less than Space Electronics' -PAK advanced technology incorporates radiation shielding microcircuit packages. eliminates shielding while providing lifetime orbit. This product with packaging screening Class 0512.00Rev0 data sheets subject change without notice (858) 452-4167 Fax: (858) 452-5499 www.spaceelectronics.com ©2000 Space Electronics Inc. rights reserved. 8408RP QUAD 8-BIT MULTIPLYING CONVERTER TABLE 8408RP ELECTRICAL HARACTERISTICS 10V; VOUT PARAMETER STATIC ACCURACY Resolution Nonlinearity Differential Nonlinearity Gain Error Gain Tempco Power Supply Rejection IOUT Leakage Current SYMBOL CONDITIONS GFSE TCGFS ILKG ±10% Full temperature range DAC8408 B/F/H DAC8408 B/F/H Using internal -±0.01 -±0.005 ±0.075 0.001 ±200 -±1.0 ±10.0 -±1.0 ±10.0 ppm/ %FSR/% REFERENCE INPUT Input Voltage Range Input Resistance Match Input Resistance DIGITAL INPUTS Digital Input Digital Input High Input Current Input Capacitance DATA OUTPUTS Digital Output Digital Output High Output Leakage Current OUTPUTS Propagation Delay Settling Time 9,10 Output Capacitance Feedthrough SWITCHING CHARACTERISTICS 4,11 Write Data Strobe Time Data Valid Strobe Set-Up Time Data Valid Strobe Hold Time Select Strobe Set-Up Time 0512.00Rev0 ILKG Sink Source Full temperature range Full temperature range -2.4 Memory COUT tDS1 tDS2 tDSU latches "0s" latches "1s" Vp-p Full temperature range Full temperature range data sheets subject change without notice ©2000 Space Electronics Inc. rights reserved. 8408RP PARAMETER Select Strobe Hold Time Write Select Strobe Set-Up Time Write Select Strobe Hold Time Read Data Strobe Width Data Strobe Output Valid Time Output Data Deselect Time Read Select Strobe Set-Up Time Read Select Strobe Hold Time POWER SUPPLY Voltage Range Supply Current Supply Current SYMBOL tWSU tRDS tOTD tRSU CONDITIONS QUAD 8-BIT MULTIPLYING CONVERTER TABLE 8408RP ELECTRICAL HARACTERISTICS 10V; VOUT Full temperature range Full temperature range Full temperature range Full temperature range -TYP -MAX -5.5 Memory This end-point linearity specification. Guaranteed monotonic over full operating temperature range. ppm/o (FSR Full Scale Range VREF LSB). Guaranteed design. digital inputs VREF 10V. Input resistance temperature coefficient ppm/oC. Logic inputs gates. Typical input current less than From digital input final analog output current. Digital input Extrapolated: LSB) where measured first time constant final decay. timing diagram. digital inputs digital inputs TABLE 8408RP ABSOLUTE AXIMUM RATINGS 1,2,3,4 UNLESS OTHERWISE PECIFIE PARAMETER IOUT IOUT IOUT DGND IOUT IOUT DGND FBB, RFBD 0512.00Rev0 -0.3 data sheets subject change without notice ©2000 Space Electronics Inc. rights reserved. 8408RP PARAMETER IOUT IOUT DGND through DGND Control Logic Input Voltage DGND REFA, VREFB, REFC, REFD IOUT IOUT Operating Temperature Range Commercial Grade (GP) Industrial Grade (ET, FPC, Military Grade (AT, Junction Temperature Storage Temperature Lead Temperature (soldering, sec) QUAD 8-BIT MULTIPLYING CONVERTER TABLE 8408RP ABSOLUTE AXIMUM RATINGS 1,2,3,4 UNLESS OTHERWISE PECIFIE -0.3 -0.3 -0.3 -MAX apply voltages higher than 0.3V less than -0.3V potential terminal except VREF RFB. digital control inputs diode-protected; however, permanent damage occur unconnected inputs from high energy electrostatic fields. Keep conductive foam times until ready use. proper antistatic handling procedures. Absolute Maximum Ratings apply both packaged devices DICE. Stresses above those listed under Absolute Maximum Ratings cause permanent damage device. Memory BURN-IN IRCUIT 0512.00Rev0 data sheets subject change without notice ©2000 Space Electronics Inc. rights reserved. 8408RP TYPICAL PERFORMANCE HARACTERISTICS SUPPLY CURRENT LOGIC LEVEL QUAD 8-BIT MULTIPLYING CONVERTER NALOG ROSSTALK FREQUENCY Memory TIMING DIAGRAM 0512.00Rev0 data sheets subject change without notice ©2000 Space Electronics Inc. rights reserved. 8408RP QUAD 8-BIT MULTIPLYING CONVERTER FIGURE SIMPLIFIED CIRCUIT 8408RP FIGURE N-CHANNEL URRENT STEERING SWITCH Memory FIGURE EQUIVALENT CIRCUIT (ALL DIGITAL NPUTS HIGH) FIGURE EQUIVALENT CIRCUIT DIGITAL NPUTS LOW) 0512.00Rev0 data sheets subject change without notice ©2000 Space Electronics Inc. rights reserved. 8408RP DIGITAL ECTION QUAD 8-BIT MULTIPLYING CONVERTER Figure shows digital input/output structure bit. digital controls shown figure internally generated from external A/B, R/W, DS1, signals. combination these signals decide which selected. digital inputs CMOS inverters, designed such that input levels (2.4V 0.8V) converted into CMOS logic levels. When digital input region 1.2V 1.8V, input stages operate their linear region draw current from supply (see Typical Supply Current Logic Level curve page recommended that digital input voltages close DGND practical order minimize supply currents. This allows maximum savings power dissipation inherent with CMOS devices. three state readback digital output drivers active mode) provide TTL-compatible digital outputs with fan-out load. three state digital readback leakage-current typically FIGURE DIGITAL INPUT/O UTPUT STRUCTURE Memory INTERFACE LOGIC ECTION Operating Modes DACs HOLD MODE. individually selected (WRITE MODE). individually selected (READ MODE). DACS simultaneously selected (WRITE MODE). DACs simultaneously selected (WRITE MODE). Selection: Control inputs, DS1, DS2, select which accept data from input port (see Mode Selection Table). Mode Selection: Control inputs control operating mode selected DAC. Write Mode: When control inputs both low, selected write mode. input data latches selected transparent, analog output responds activity data inputs DB0-DB7. Hold Mode: selected latch retains data that present line just prior going high state. analog outputs remain values corresponding data their respective latches. Read Mode: When high, selected read mode, data held appropriate latch back onto data bus. 0512.00Rev0 data sheets subject change without notice ©2000 Space Electronics Inc. rights reserved. 8408RP QUAD 8-BIT MULTIPLYING CONVERTER TABLE MODE ELECTION TABLE TATE, HIGH STATE, RRELEVANT) CONTROL LOGIC MODE WRITE WRITE WRITE WRITE READ READ READ READ WRITE WRITE HOLD HOLD HOLD A/B/C/D A/B/C/D A/B/C/D Memory BASIC APPLICATIONS Same basic circuit configurations shown Figures Figure shows 8408RP connected unipolar configuration (2-Quadrant Multiplication) Table shows code table. Resistors used trim full scale output. Full-scale output volta VREF VREF VREF (255/256) with digital inputs high. temperature coefficient (approximately ppm/ resistors trimmers should selected used. Full scale also adjusted using VREF voltage. This will eliminate resistors many applications, through required, maximum gain error will then that DAC. Each exhibits variable output resistance that code-dependent. This produces code-dependent, differential non-linearity term amplifier's output which have maximum value 0.67 amplifier's offset voltage. This differential nonlinearity term adds R-2R resistor ladder differential-nonlinearity; output longer monotonic. maintain monotonicity minimize gain linearity errors, recommended that offset voltage adjusted less than VREF 1/256 VREF less than over operating temperature range. Zero-scale output voltage (with difital inputs low) adjusted using offset adjustment. Capacitors provide phase compensation help prevent overshoot ringing when using high speed amps. Figure shows recommended circuit configuration bipolar operation (4-quadrant multiplication), Table shows code table. Trimmer resistors R17, R18, R19, used only gain error adjustments required range between 1000 Resistors R21, R22, R23, will range between these resistors ued, essential that resistor pairs R9-R13, R10-R14, R11-R15, R12-R16 matched both value tempco. They should within 0.01%; wire wound metal foil types preferred best temperature coefficient matching. circuits Figure either used fixed reference converter, attenuator with input voltage 0512.00Rev0 data sheets subject change without notice ©2000 Space Electronics Inc. rights reserved. 8408RP INPUT QUAD 8-BIT MULTIPLYING CONVERTER TABLE UNIPOLAR BINARY TABLE REFER IGURE NALOG UTPUT (255 /256) (129 /256) -VREF 128/256) -VIN/2 (127 /256) -VREF /256) /256 (2-8) (VREF) /256 REF) Memory FIGURE NIPOLAR OPERATION (2-QUADRANT MULTIPLICATION) Note: amplifiers OP-27s, OP-420s, OP-421s. 0512.00Rev0 data sheets subject change without notice ©2000 Space Electronics Inc. rights reserved. 8408RP QUAD 8-BIT MULTIPLYING CONVERTER FIGURE IPOLAR OPERATION (4-QUADRANT MULTIPLICATION) Memory Note: amplifiers OP-27s, OP-420s, OP-421s. TABLE IPOLAR (OFFSET BINARY) CODE TABLE (REFERE IGURE INPUT NALOG UTPUT (DAC 127/128) VREF 1/128) -VREF 1/128) (127 /128) (128 /128) APPLICATION HINTS General Ground Management: transient voltages between AGND DGND appear noise analog output. Note that Figures 2A/IOUT IOUT 2C/IOUT connected AGND. Therefore, recommended that AGND DGND tied together device socket. systems where AGND DGND tied together backplace, diodes (1N914 equivalent) should connected inverse parallel between AGND DGND. Write Enable Timing: During period when both held low, latches transparent analog output responds directly digital data input. prevent unwanted variations analog output, should until data fully settled (DATA VALID). 0512.00Rev0 data sheets subject change without notice ©2000 Space Electronics Inc. rights reserved. 8408RP Single Supply, Voltage Output Operation QUAD 8-BIT MULTIPLYING CONVERTER 8408RP connected with single supply produce output voltages from 1.5V. Figure device R-2R ladder inverted from normal connection. 1.500V reference connected current output (IOUT 1A), normal VREF input becomes output. Instead normal current output, R-2R ladder outputs voltage. OP-490, consisting four precision powe op-amps that operate inputs outputs zero volts, buffers produce impedance output voltage from 1.5V full-scale. Table shows code table. With supply reference voltages shown, better than differential integral nonlinearity expected. maintain this performance level, supply must drop below 4.75V. Similarly, reference voltage must higher than 1.5V. This because CMOS switches require minimum level bias order maintain linearity performance. INGLE UPPLY INARY CODE TABLE (REFER IGURE INPUT 255/256), 1.4941V 129/256), 0.7559V 128/256), 0.7500V 127/256), 0.7441V VREF 1/256), 0.0059V VREF 0/256), 0.0000V NALOG UTPUT Memory FIGURE NIPOLAR SUPPLY, OLTAGE OUTPUT OPERATION 0512.00Rev0 data sheets subject change without notice ©2000 Space Electronics Inc. rights reserved. 8408RP QUAD 8-BIT MULTIPLYING CONVERTER FIGURE DIGITALLY PROGRAMMABLE UNIVERAL CTIVE FILTER Memory Digitally Programmable Active Filter power converter application programmable active filter design shown Figure design based state-variable filter topology that offers stable repeatable filter characteristics. programmed tandem with single digital byte load that sets center frequency filter. sets filter. sets gain filter transfer function. unique feature this design that varying gain filter does affect filter. Similarly, reverse true. This makes programmability filter extremely reliable predictable. Note that low-pass, high-pass, bandpass outputs available. This sophisticated function achieved only packages. network analyzer photo shown Figure superimposes five actual bandpass responses ranging from lowest frequency full-scale frequency 19.132 (all bits ON), that equivalent dynamic range. frequency determined where ladder resistance (RIN) 8408RP 1000 Note that from device device, resistance varies. Thus, some tuing necessary. components used available off-the-shelf. Using drift thin-film resistors, 8408RP exhibits very stable performance over temperature. wide bandwidth OP-470 produces excellent high frequency high response. addition, OP470's input offset ltage assures unusually offset filter output. FIGURE PROGRAMMABLE ACTIVE FILTER BAND-P FREQUENCY RESPONSE circuit provides full 8-bit decade) dynamic range frequency control. 0512.00Rev0 data sheets subject change without notice ©2000 Space Electronics Inc. rights reserved. 8408RP QUAD 8-BIT MULTIPLYING CONVERTER FIGURE DIGITALLY PROGRAMMABLE, LOW-DISTORTION SINEWAVE OSCILLATOR Memory Low-Distortion, Programmable Sinewave Oscillator varying previous state-variable filter topology slightly, obtain very distortion sinewave oscillator with programmable frequency feature shown Figure Again, tandem control oscillating frequency based relationship Positive feedback accomplished 82.5 potentiometer.The oscillator determined ratio series with transistor, which acts automatic gain control variable resistor. action maintains very stable sinewave ampli tude frequency. Again, only accomplish very useful function. highest frequency setting, harmonic distortion level measures 0.016%. frequencies drop, distortion also drops 0.006%. lowest frequency setting, distortion came back worst case 0.035%. 0512.00Rev0 data sheets subject change without notice ©2000 Space Electronics Inc. rights reserved. 8408RP QUAD 8-BIT MULTIPLYING CONVERTER Memory PACKAGE YMBOL 0.390 0.021 0.005 0.129 0.015 0.004 -0.400 -0.180 0.005 DIMENSION 0.142 0.017 0.005 0.720 0.410 -0.250 0.080 0.050 0.400 0.033 0.028 0.410 0.045 -MAX 0.155 0.022 0.009 0.740 0.420 0.440 F28-07 Note: dimensions inches. 0512.00Rev0 data sheets subject change without notice ©2000 Space Electronics Inc. rights reserved. 8408RP Important Notice: QUAD 8-BIT MULTIPLYING CONVERTER These data sheets created using chip manufacturers published specifications. Space Electronics verifies functionality testing parameters either 100% testing, sample testing characterization. specifications presented within these data sheets represent latest most accurate information available date. Howe ver, these specifications subject change without notice Space Electronics assumes responsibility this information. Space Electronics' products authorized critical components life support devices systems without express written approval from Space Electronics. claim against Space Electronics Inc. must made within days from date shipment from Space Electronics. Space Electronics' liability shall limited replacement defective parts. Memory 0512.00Rev0 data sheets subject change without notice ©2000 Space Electronics Inc. rights reserved. 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